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forked from me/IronOS

Shrink flash usage _just_ enough

This commit is contained in:
Ben V. Brown
2020-07-23 22:45:00 +10:00
parent 85decdc15b
commit ff65e6437b
16 changed files with 213 additions and 517 deletions

View File

@@ -48,7 +48,7 @@ void reboot();
// Returns 1 if the logo was printed so that the unit waits for the timeout or button
uint8_t showBootLogoIfavailable();
//delay wrapper for delay using the hardware timer (used before RTOS)
void delay_ms(uint16_t count);
void delay_ms(uint16_t count) ;
//Used to allow knowledge of if usb_pd is being used
uint8_t usb_pd_detect();
//Returns 0 when the irq line is pulled down

View File

@@ -51,57 +51,37 @@ static const uint16_t NTCHandleLookup[] = {
22264, 27, //
21933, 28, //
21599, 29, //
21261, 30, //
20921, 31, //
20579, 32, //
20234, 33, //
19888, 34, //
19541, 35, //
19192, 36, //
18843, 37, //
18493, 38, //
18143, 39, //
17793, 40, //
17444, 41, //
17096, 42, //
16750, 43, //
16404, 44, //
16061, 45, //
15719, 46, //
15380, 47, //
15044, 48, //
14710, 49, //
14380, 50, //
14053, 51, //
13729, 52, //
13410, 53, //
13094, 54, //
12782, 55, //
12475, 56, //
12172, 57, //
11874, 58, //
11580, 59, //
11292, 60, //
11008, 61, //
10729, 62, //
10455, 63, //
10187, 64, //
9923, 65, //
9665, 66, //
9412, 67, //
9164, 68, //
8921, 69, //
8684, 70, //
8451, 71, //
8225, 72, //
8003, 73, //
7786, 74, //
7575, 75, //
7368, 76, //
7167, 77, //
6970, 78, //
6779, 79, //
6592, 80, //
// 21261, 30, //
// 20921, 31, //
// 20579, 32, //
// 20234, 33, //
// 19888, 34, //
// 19541, 35, //
// 19192, 36, //
// 18843, 37, //
// 18493, 38, //
// 18143, 39, //
// 17793, 40, //
// 17444, 41, //
// 17096, 42, //
// 16750, 43, //
// 16404, 44, //
// 16061, 45, //
// 15719, 46, //
// 15380, 47, //
// 15044, 48, //
// 14710, 49, //
// 14380, 50, //
// 14053, 51, //
// 13729, 52, //
// 13410, 53, //
// 13094, 54, //
// 12782, 55, //
// 12475, 56, //
// 12172, 57, //
// 11874, 58, //
// 11580, 59, //
// 11292, 60, //
};
#endif
uint16_t getHandleTemperature() {
@@ -110,7 +90,7 @@ uint16_t getHandleTemperature() {
//NTCG104EF104FT1X from TDK
//For now not doing interpolation
int32_t result = getADC(0);
for (int i = 0; i < (sizeof(NTCHandleLookup) / (2 * sizeof(uint16_t)));
for (uint32_t i = 0; i < (sizeof(NTCHandleLookup) / (2 * sizeof(uint16_t)));
i++) {
if (result > NTCHandleLookup[(i * 2) + 0]) {
return NTCHandleLookup[(i * 2) + 1] * 10;

View File

@@ -44,5 +44,6 @@ void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c __unused) {
}
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
(void)GPIO_Pin;
InterruptHandler::irqCallback();
}

View File

@@ -33,9 +33,9 @@ static void MX_ADC2_Init(void);
void Setup_HAL() {
SystemClock_Config();
// __HAL_AFIO_REMAP_SWJ_DISABLE()
// ;
__HAL_AFIO_REMAP_SWJ_NOJTAG();
__HAL_AFIO_REMAP_SWJ_DISABLE()
;
// __HAL_AFIO_REMAP_SWJ_NOJTAG();
MX_GPIO_Init();
MX_DMA_Init();
MX_I2C1_Init();

View File

@@ -1041,32 +1041,32 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, injected channels sequence length is set to */
/* parameter "InjectedNbrOfConversion". */
if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
{
if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
{
/* Clear the old SQx bits for all injected ranks */
MODIFY_REG(hadc->Instance->JSQR ,
ADC_JSQR_JL |
ADC_JSQR_JSQ4 |
ADC_JSQR_JSQ3 |
ADC_JSQR_JSQ2 |
ADC_JSQR_JSQ1 ,
ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
ADC_INJECTED_RANK_1,
0x01U));
}
/* If another injected rank than rank1 was intended to be set, and could */
/* not due to ScanConvMode disabled, error is reported. */
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
tmp_hal_status = HAL_ERROR;
}
}
else
// if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
// {
// if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
// {
// /* Clear the old SQx bits for all injected ranks */
// MODIFY_REG(hadc->Instance->JSQR ,
// ADC_JSQR_JL |
// ADC_JSQR_JSQ4 |
// ADC_JSQR_JSQ3 |
// ADC_JSQR_JSQ2 |
// ADC_JSQR_JSQ1 ,
// ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
// ADC_INJECTED_RANK_1,
// 0x01U));
// }
// /* If another injected rank than rank1 was intended to be set, and could */
// /* not due to ScanConvMode disabled, error is reported. */
// else
// {
// /* Update ADC state machine to error */
// SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
//
// tmp_hal_status = HAL_ERROR;
// }
// }
// else
{
/* Since injected channels rank conv. order depends on total number of */
/* injected conversions, selected rank must be below or equal to total */

View File

@@ -369,57 +369,6 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
{
return HAL_ERROR;
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
/* Check the HSE State */
if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till HSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
{
@@ -486,121 +435,9 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSI is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
{
FlagStatus pwrclkchanged = RESET;
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
{
__HAL_RCC_PWR_CLK_ENABLE();
pwrclkchanged = SET;
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
/* Check the LSE State */
if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
/* Wait till LSE is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
{
return HAL_TIMEOUT;
}
}
}
/* Require to disable power clock if necessary */
if(pwrclkchanged == SET)
{
__HAL_RCC_PWR_CLK_DISABLE();
}
}
#if defined(RCC_CR_PLL2ON)
/*-------------------------------- PLL2 Configuration -----------------------*/

View File

@@ -3968,129 +3968,129 @@ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockCo
}
break;
case TIM_CLOCKSOURCE_ETRMODE1:
{
/* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
/* Check ETR input conditioning related parameters */
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
sClockSourceConfig->ClockPrescaler,
sClockSourceConfig->ClockPolarity,
sClockSourceConfig->ClockFilter);
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
/* Reset the SMS and TS Bits */
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
}
break;
case TIM_CLOCKSOURCE_ETRMODE2:
{
/* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
/* Check ETR input conditioning related parameters */
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
sClockSourceConfig->ClockPrescaler,
sClockSourceConfig->ClockPolarity,
sClockSourceConfig->ClockFilter);
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
}
break;
case TIM_CLOCKSOURCE_TI1:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
sClockSourceConfig->ClockPolarity,
sClockSourceConfig->ClockFilter);
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
}
break;
case TIM_CLOCKSOURCE_TI2:
{
/* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
sClockSourceConfig->ClockPolarity,
sClockSourceConfig->ClockFilter);
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
}
break;
case TIM_CLOCKSOURCE_TI1ED:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
sClockSourceConfig->ClockPolarity,
sClockSourceConfig->ClockFilter);
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
}
break;
case TIM_CLOCKSOURCE_ITR0:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
}
break;
case TIM_CLOCKSOURCE_ITR1:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
}
break;
case TIM_CLOCKSOURCE_ITR2:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
}
break;
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports external clock mode 1 */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
}
break;
// case TIM_CLOCKSOURCE_ETRMODE1:
// {
// /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
// assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
//
// /* Check ETR input conditioning related parameters */
// assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
// assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
// assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
//
// /* Configure the ETR Clock source */
// TIM_ETR_SetConfig(htim->Instance,
// sClockSourceConfig->ClockPrescaler,
// sClockSourceConfig->ClockPolarity,
// sClockSourceConfig->ClockFilter);
// /* Get the TIMx SMCR register value */
// tmpsmcr = htim->Instance->SMCR;
// /* Reset the SMS and TS Bits */
// tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
// /* Select the External clock mode1 and the ETRF trigger */
// tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
// /* Write to TIMx SMCR */
// htim->Instance->SMCR = tmpsmcr;
// }
// break;
//
// case TIM_CLOCKSOURCE_ETRMODE2:
// {
// /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
// assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
//
// /* Check ETR input conditioning related parameters */
// assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
// assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
// assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
//
// /* Configure the ETR Clock source */
// TIM_ETR_SetConfig(htim->Instance,
// sClockSourceConfig->ClockPrescaler,
// sClockSourceConfig->ClockPolarity,
// sClockSourceConfig->ClockFilter);
// /* Enable the External clock mode2 */
// htim->Instance->SMCR |= TIM_SMCR_ECE;
// }
// break;
//
// case TIM_CLOCKSOURCE_TI1:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
//
// /* Check TI1 input conditioning related parameters */
// assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
// assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
//
// TIM_TI1_ConfigInputStage(htim->Instance,
// sClockSourceConfig->ClockPolarity,
// sClockSourceConfig->ClockFilter);
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
// }
// break;
// case TIM_CLOCKSOURCE_TI2:
// {
// /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
// assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
//
// /* Check TI2 input conditioning related parameters */
// assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
// assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
//
// TIM_TI2_ConfigInputStage(htim->Instance,
// sClockSourceConfig->ClockPolarity,
// sClockSourceConfig->ClockFilter);
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
// }
// break;
// case TIM_CLOCKSOURCE_TI1ED:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
//
// /* Check TI1 input conditioning related parameters */
// assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
// assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
//
// TIM_TI1_ConfigInputStage(htim->Instance,
// sClockSourceConfig->ClockPolarity,
// sClockSourceConfig->ClockFilter);
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
// }
// break;
// case TIM_CLOCKSOURCE_ITR0:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
//
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
// }
// break;
// case TIM_CLOCKSOURCE_ITR1:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
//
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
// }
// break;
// case TIM_CLOCKSOURCE_ITR2:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
//
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
// }
// break;
// case TIM_CLOCKSOURCE_ITR3:
// {
// /* Check whether or not the timer instance supports external clock mode 1 */
// assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
//
// TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
// }
// break;
default:
break;

View File

@@ -11,7 +11,7 @@
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
#define LOCAL_BUILD
//#define LOCAL_BUILD
#ifndef LOCAL_BUILD
#define VECT_TAB_OFFSET 0x00004000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */

View File

@@ -33,7 +33,7 @@ public:
private:
static void Thread(const void *arg);
static osThreadId TaskHandle;
static const size_t TaskStackSize = 1536 / 2;
static const size_t TaskStackSize = 1536 / 3;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
static uint32_t waitForEvent(uint32_t mask, uint32_t ticksToWait =

View File

@@ -46,9 +46,7 @@ void InterruptHandler::Thread(const void *arg) {
while (true) {
/* If the INT_N line is low */
if (!notifSent) {
if (xTaskNotifyWait(0x00, 0x0F, NULL, 25) == pdPASS) {
osDelay(1);
}
xTaskNotifyWait(0x00, 0x0F, NULL, 25);
}
notifSent = false;
/* Read the FUSB302B status and interrupt registers */
@@ -96,9 +94,7 @@ void InterruptHandler::Thread(const void *arg) {
}
}
}
volatile uint8_t irqs = 0;
void InterruptHandler::irqCallback() {
irqs++;
BaseType_t taskWoke = pdFALSE;
xTaskNotifyFromISR(TaskHandle, 0x01, eNotifyAction::eSetBits, &taskWoke);
portYIELD_FROM_ISR(taskWoke);

View File

@@ -23,14 +23,12 @@
#include "hard_reset.h"
#include "fusb302b.h"
bool PolicyEngine::pdNegotiationComplete;
bool PolicyEngine::pdHasEnteredLowPower;
int PolicyEngine::current_voltage_mv;
int PolicyEngine::_requested_voltage;
bool PolicyEngine::_unconstrained_power;
union pd_msg PolicyEngine::currentMessage;
uint16_t PolicyEngine::hdr_template;
bool PolicyEngine::_explicit_contract;
bool PolicyEngine::_min_power;
int8_t PolicyEngine::_hard_reset_counter;
int8_t PolicyEngine::_old_tcc_match;
uint8_t PolicyEngine::_pps_index;
@@ -58,17 +56,7 @@ void PolicyEngine::init() {
}
void PolicyEngine::notify(uint32_t notification) {
notification = notification
& (
PDB_EVT_PE_RESET | PDB_EVT_PE_MSG_RX | PDB_EVT_PE_TX_DONE
| PDB_EVT_PE_TX_ERR | PDB_EVT_PE_HARD_SENT
| PDB_EVT_PE_I_OVRTEMP | PDB_EVT_PE_PPS_REQUEST);
if (notification) {
xEventGroupSetBits(xEventGroupHandle, notification);
} else {
asm("bkpt");
}
xEventGroupSetBits(xEventGroupHandle, notification);
}
void PolicyEngine::pe_task(const void *arg) {
@@ -310,7 +298,6 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_select_cap() {
pdbs_dpm_transition_standby();
}
_min_power = false;
return PESinkTransitionSink;
/* If the message was a Soft_Reset, do the soft reset procedure */
} else if (PD_MSGTYPE_GET(&tempMessage) == PD_MSGTYPE_SOFT_RESET
@@ -325,10 +312,6 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_select_cap() {
return PESinkWaitCap;
/* If we do have an explicit contract, go to the ready state */
} else {
/* If we got here from a Wait message, we Should run
* SinkRequestTimer in the Ready state. */
_min_power = (PD_MSGTYPE_GET(&tempMessage) == PD_MSGTYPE_WAIT);
return PESinkReady;
}
} else {
@@ -361,9 +344,7 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_transition_sink() {
_explicit_contract = true;
/* Set the output appropriately */
if (!_min_power) {
pdbs_dpm_transition_requested();
}
pdbs_dpm_transition_requested();
return PESinkReady;
/* If there was a protocol error, send a hard reset */
@@ -384,18 +365,9 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
eventmask_t evt;
/* Wait for an event */
if (_min_power) {
evt = waitForEvent(
PDB_EVT_PE_MSG_RX | PDB_EVT_PE_RESET | PDB_EVT_PE_I_OVRTEMP
| PDB_EVT_PE_GET_SOURCE_CAP | PDB_EVT_PE_NEW_POWER
| PDB_EVT_PE_PPS_REQUEST,
PD_T_SINK_REQUEST);
} else {
evt = waitForEvent(
PDB_EVT_PE_MSG_RX | PDB_EVT_PE_RESET | PDB_EVT_PE_I_OVRTEMP
| PDB_EVT_PE_GET_SOURCE_CAP | PDB_EVT_PE_NEW_POWER
| PDB_EVT_PE_PPS_REQUEST);
}
evt = waitForEvent(
PDB_EVT_PE_MSG_RX | PDB_EVT_PE_RESET | PDB_EVT_PE_I_OVRTEMP
| PDB_EVT_PE_PPS_REQUEST);
/* If we got reset signaling, transition to default */
if (evt & PDB_EVT_PE_RESET) {
@@ -407,25 +379,6 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
return PESinkHardReset;
}
/* If the DPM wants us to, send a Get_Source_Cap message */
if (evt & PDB_EVT_PE_GET_SOURCE_CAP) {
/* Tell the protocol layer we're starting an AMS */
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_START_AMS);
return PESinkGetSourceCap;
}
/* If the DPM wants new power, let it figure out what power it wants
* exactly. This isn't exactly the transition from the spec (that would be
* SelectCap, not EvalCap), but this works better with the particular
* design of this firmware. */
if (evt & PDB_EVT_PE_NEW_POWER) {
/* Tell the protocol layer we're starting an AMS */
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_START_AMS);
return PESinkEvalCap;
}
/* If SinkPPSPeriodicTimer ran out, send a new request */
if (evt & PDB_EVT_PE_PPS_REQUEST) {
/* Tell the protocol layer we're starting an AMS */
@@ -434,12 +387,6 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
return PESinkSelectCap;
}
/* If no event was received, the timer ran out. */
if (evt == 0) {
/* Repeat our Request message */
return PESinkSelectCap;
}
/* If we received a message */
if (evt & PDB_EVT_PE_MSG_RX) {
if (messageWaiting()) {
@@ -488,16 +435,9 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
/* Handle GotoMin messages */
} else if (PD_MSGTYPE_GET(&tempMessage) == PD_MSGTYPE_GOTOMIN
&& PD_NUMOBJ_GET(&tempMessage) == 0) {
if (pdbs_dpm_giveback_enabled()) {
/* Transition to the minimum current level */
pdbs_dpm_transition_min();
_min_power = true;
return PESinkTransitionSink;
} else {
/* GiveBack is not supported */
/* GiveBack is not supported */
return PESinkSendNotSupported;
return PESinkSendNotSupported;
}
/* Evaluate new Source_Capabilities */
} else if (PD_MSGTYPE_GET(&tempMessage)
== PD_MSGTYPE_SOURCE_CAPABILITIES
@@ -770,22 +710,7 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_not_supported_received()
}
PolicyEngine::policy_engine_state PolicyEngine::pe_sink_source_unresponsive() {
/* If the DPM can evaluate the Type-C Current advertisement */
//TS80P doesnt
// if (cfg->dpm.evaluate_typec_current != NULL) {
// /* Make the DPM evaluate the Type-C Current advertisement */
// int tcc_match = cfg->dpm.evaluate_typec_current(cfg,
// fusb_get_typec_current(&cfg->fusb));
//
// /* If the last two readings are the same, set the output */
// if (_old_tcc_match == tcc_match) {
// cfg->dpm.transition_typec(cfg);
// }
//
// /* Remember whether or not the last measurement succeeded */
// _old_tcc_match = tcc_match;
// }
/* Wait tPDDebounce between measurements */
//Sit and chill, as PD is not working
osDelay(PD_T_PD_DEBOUNCE);
return PESinkSourceUnresponsive;
@@ -799,13 +724,6 @@ bool PolicyEngine::pdHasNegotiated() {
return pdNegotiationComplete;
}
bool PolicyEngine::heatingAllowed() {
if (pdHasNegotiated())
return !pdHasEnteredLowPower;
//Not pd -- pass through
return true;
}
uint32_t PolicyEngine::waitForEvent(uint32_t mask, uint32_t ticksToWait) {
return xEventGroupWaitBits(xEventGroupHandle, mask, mask, pdFALSE,
ticksToWait);

View File

@@ -24,10 +24,6 @@
* Events for the Policy Engine thread, used internally + sent by user code
*
*/
/* Tell the PE to send a Get_Source_Cap message */
#define PDB_EVT_PE_GET_SOURCE_CAP EVENT_MASK(7)
/* Tell the PE that new power is required */
#define PDB_EVT_PE_NEW_POWER EVENT_MASK(8)
#define PDB_EVT_PE_RESET EVENT_MASK(0)
#define PDB_EVT_PE_MSG_RX EVENT_MASK(1)
@@ -51,11 +47,8 @@ public:
static void PPSTimerCallBack();
//Has pd negotiation completed
static bool pdHasNegotiated();
//Used in case the USB-C PD source requests minimum power
static bool heatingAllowed();
private:
static bool pdNegotiationComplete;
static bool pdHasEnteredLowPower;
static int current_voltage_mv; //The current voltage PD is expecting
static int _requested_voltage; //The voltage the unit wanted to requests
static bool _unconstrained_power; // If the source is unconstrained
@@ -65,8 +58,6 @@ private:
static uint16_t hdr_template;
/* Whether or not we have an explicit contract */
static bool _explicit_contract;
/* Whether or not we're receiving minimum power */
static bool _min_power;
/* The number of hard resets we've sent */
static int8_t _hard_reset_counter;
/* The result of the last Type-C Current match comparison */

View File

@@ -253,17 +253,12 @@ void PolicyEngine::pdbs_dpm_get_sink_capability(union pd_msg *cap) {
cap->hdr = hdr_template | PD_MSGTYPE_SINK_CAPABILITIES | PD_NUMOBJ(numobj);
}
bool PolicyEngine::pdbs_dpm_giveback_enabled() {
return false;
//We do not support giveback
}
bool PolicyEngine::pdbs_dpm_evaluate_typec_current(
enum fusb_typec_current tcc) {
//This is for evaluating 5V static current advertised by resistors
//This is for evaluating 5V static current advertised by resistors
/* We don't control the voltage anymore; it will always be 5 V. */
current_voltage_mv = _requested_voltage = 5000;
//For the soldering iron we accept this as a fallback, but it sucks
//For the soldering iron we accept this as a fallback, but it sucks
return true;
}
@@ -278,27 +273,19 @@ void PolicyEngine::pdbs_dpm_transition_default() {
current_voltage_mv = 5000;
/* Turn the output off */
pdNegotiationComplete = false;
pdHasEnteredLowPower = true;
}
void PolicyEngine::pdbs_dpm_transition_min() {
pdHasEnteredLowPower = true;
}
void PolicyEngine::pdbs_dpm_transition_standby() {
/* If the voltage is changing, enter Sink Standby */
if (_requested_voltage != current_voltage_mv) {
/* For the PD Buddy Sink, entering Sink Standby is equivalent to
* turning the output off. However, we don't want to change the LED
* state for standby mode. */
pdHasEnteredLowPower = true;
}
}
void PolicyEngine::pdbs_dpm_transition_requested() {
/* Cast the dpm_data to the right type */
pdNegotiationComplete = true;
pdHasEnteredLowPower = false;
}
void PolicyEngine::handleMessage(union pd_msg *msg) {
@@ -314,8 +301,7 @@ void PolicyEngine::readMessage() {
}
void PolicyEngine::pdbs_dpm_transition_typec() {
//This means PD failed, so we either have a dump 5V only type C or a QC charger
//This means PD failed, so we either have a dumb 5V only type C or a QC charger
//For now; treat this as failed neg
pdNegotiationComplete = false;
pdHasEnteredLowPower = false;
}

View File

@@ -126,18 +126,6 @@ const uint8_t idleScreenBG[] = {
0x8A,0x84,0x82,0x81,0x80,0x80,0x80,0x40,0x40,0x20,0x18,0x07
};
const uint8_t idleScreenBGF[] = {
//width = 84
//height = 16
0xE0,0x18,0x04,0x02,0x02,0x01,0x41,0x81,0x01,0x01,0x65,0x99,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x02,0x02,0x04,0x18,0xE0,0x00,0x00,0xE0,0x18,0x04,0x02,0x02,
0x01,0x01,0x41,0x61,0x61,0x61,0xE1,0xC1,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0xC1,
0xE1,0x61,0x61,0x61,0x41,0x01,0x02,0x02,0x04,0x18,0xE0,0x00,
0x07,0x18,0x20,0x40,0x40,0x80,0x80,0x80,0x81,0x82,0x84,0x8A,0x92,0x82,0x82,0x82,0x80,0x82,0x80,0x82,0x82,0x82,0x87,0x87,
0x85,0x87,0x85,0x87,0x87,0x85,0x85,0x85,0x85,0x87,0x82,0x80,0x40,0x40,0x20,0x18,0x07,0x00,0x00,0x07,0x18,0x20,0x40,0x40,
0x80,0x80,0x82,0x86,0x86,0x86,0x87,0x83,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x81,0x83,
0x87,0x86,0x86,0x86,0x82,0x80,0x40,0x40,0x20,0x18,0x07,0x00
};
/*
* 16x16 icons

View File

@@ -636,13 +636,22 @@ void showDebugMenu(void) {
GUIDelay();
}
}
uint8_t idleScreenBGF[sizeof(idleScreenBG)];
/* StartGUITask function */
void startGUITask(void const *argument __unused) {
uint8_t tempWarningState = 0;
bool buttonLockout = false;
bool tempOnDisplay = false;
{
//Generate the flipped screen into ram for later use
//flipped is generated by flipping each row
for(int row=0;row<2;row++){
for (int x =0;x<84;x++){
idleScreenBGF[(row*84)+x] =idleScreenBG[(row*84)+(83-x)];
}
}
}
getTipRawTemp(1); // reset filter
OLED::setRotation(systemSettings.OrientationMode & 1);
uint32_t ticks = xTaskGetTickCount();
@@ -665,16 +674,6 @@ void startGUITask(void const *argument __unused) {
OLED::refresh();
waitForButtonPressOrTimeout(1000);
}
if (usb_pd_available) {
OLED::clearScreen();
OLED::setFont(1);
OLED::setCursor(0, 0);
OLED::print(InputVoltageString);
OLED::refresh();
waitForButtonPressOrTimeout(1000);
}
if (systemSettings.autoStartMode) {
// jump directly to the autostart mode
if (systemSettings.autoStartMode == 1) {

View File

@@ -14,9 +14,9 @@ MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
/* LOCAL_BUILD*/
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 48K
/*ROM (rx) : ORIGIN = 0x08000000, LENGTH = 48K*/
/* production*/
/*ROM (rx) : ORIGIN = 0x08004000, LENGTH = 46K*/
ROM (rx) : ORIGIN = 0x08004000, LENGTH = 46K