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Still testing

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This commit is contained in:
Ben V. Brown
2020-07-21 13:39:50 +10:00
parent c70689df7d
commit b6c61cfb52
31 changed files with 674 additions and 557 deletions
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1
workspace/TS100/Core/BSP/Miniware/BSP.cpp
View File

@@ -217,6 +217,7 @@ uint8_t getButtonB() {
}
void reboot() {
asm("bkpt");
NVIC_SystemReset();
}

41
workspace/TS100/Core/BSP/Miniware/I2CBB.cpp
View File

@@ -13,9 +13,11 @@
#define SDA_LOW() HAL_GPIO_WritePin(SDA2_GPIO_Port, SDA2_Pin, GPIO_PIN_RESET)
#define SDA_READ() (HAL_GPIO_ReadPin(SDA2_GPIO_Port,SDA2_Pin)==GPIO_PIN_SET?1:0)
#define SCL_READ() (HAL_GPIO_ReadPin(SCL2_GPIO_Port,SCL2_Pin)==GPIO_PIN_SET?1:0)
#define I2C_DELAY() {for(int xx=0;xx<100;xx++){asm("nop");}}
#define I2C_DELAY() {for(int xx=0;xx<1000;xx++){asm("nop");}}
SemaphoreHandle_t I2CBB::I2CSemaphore = NULL;
StaticSemaphore_t I2CBB::xSemaphoreBuffer;
SemaphoreHandle_t I2CBB::I2CSemaphore2 = NULL;
StaticSemaphore_t I2CBB::xSemaphoreBuffer2;
void I2CBB::init() {
//Set GPIO's to output open drain
GPIO_InitTypeDef GPIO_InitStruct;
@@ -28,8 +30,14 @@ void I2CBB::init() {
SDA_HIGH();
SCL_HIGH();
I2CSemaphore = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer);
xSemaphoreGive(I2CSemaphore);
I2CSemaphore2 = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer2);
unlock();
unlock2();
//unstick bus
for (int i = 0; i < 8; i++) {
read_bit();
}
stop();
}
bool I2CBB::probe(uint8_t address) {
@@ -73,8 +81,8 @@ bool I2CBB::Mem_Read(uint16_t DevAddress, uint16_t MemAddress, uint8_t *pData,
return true;
}
bool I2CBB::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *pData,
uint16_t Size) {
bool I2CBB::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
const uint8_t *pData, uint16_t Size) {
if (!lock())
return false;
start();
@@ -205,6 +213,7 @@ void I2CBB::start() {
I2C_DELAY();
SCL_LOW();
I2C_DELAY();
SDA_HIGH();
}
void I2CBB::stop() {
@@ -224,6 +233,7 @@ bool I2CBB::send(uint8_t value) {
value <<= 1;
}
SDA_HIGH();
bool ack = read_bit() == 0;
return ack;
}
@@ -237,6 +247,7 @@ uint8_t I2CBB::read(bool ack) {
B |= read_bit();
}
SDA_HIGH();
if (ack)
write_bit(0);
else
@@ -269,7 +280,7 @@ bool I2CBB::lock() {
if (I2CSemaphore == NULL) {
asm("bkpt");
}
bool a = xSemaphoreTake(I2CSemaphore, (TickType_t) 50) == pdTRUE;
bool a = xSemaphoreTake(I2CSemaphore, (TickType_t) 100) == pdTRUE;
if (!a) {
asm("bkpt");
}
@@ -277,13 +288,29 @@ bool I2CBB::lock() {
}
void I2CBB::write_bit(uint8_t val) {
if (val > 0)
if (val) {
SDA_HIGH();
else
} else {
SDA_LOW();
}
I2C_DELAY();
SCL_HIGH();
I2C_DELAY();
SCL_LOW();
}
void I2CBB::unlock2() {
xSemaphoreGive(I2CSemaphore2);
}
bool I2CBB::lock2() {
if (I2CSemaphore2 == NULL) {
asm("bkpt");
}
bool a = xSemaphoreTake(I2CSemaphore2, (TickType_t) 500) == pdTRUE;
if (!a) {
asm("bkpt");
}
return a;
}

6
workspace/TS100/Core/BSP/Miniware/I2CBB.hpp
View File

@@ -27,14 +27,18 @@ public:
uint8_t *pData, uint16_t Size);
//Implements a register write
static bool Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
uint8_t *pData, uint16_t Size);
const uint8_t *pData, uint16_t Size);
static void Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size);
static void Receive(uint16_t DevAddress, uint8_t *pData, uint16_t Size);
static void TransmitReceive(uint16_t DevAddress, uint8_t *pData_tx,
uint16_t Size_tx, uint8_t *pData_rx, uint16_t Size_rx);
static void unlock2();
static bool lock2();
private:
static SemaphoreHandle_t I2CSemaphore;
static StaticSemaphore_t xSemaphoreBuffer;
static SemaphoreHandle_t I2CSemaphore2;
static StaticSemaphore_t xSemaphoreBuffer2;
static void unlock();
static bool lock();
static void start();

10
workspace/TS100/Core/BSP/Miniware/Power.cpp
View File

@@ -26,15 +26,7 @@ void power_check() {
uint8_t usb_pd_detect() {
#ifdef MODEL_TS80P
FUSB302_present = fusb302_detect();
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 15, 0);
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
InterruptHandler::irqCallback();
return FUSB302_present;
#endif
return false;

13
workspace/TS100/Core/BSP/Miniware/Setup.c
View File

@@ -33,9 +33,9 @@ static void MX_ADC2_Init(void);
void Setup_HAL() {
SystemClock_Config();
__HAL_AFIO_REMAP_SWJ_DISABLE()
;
// __HAL_AFIO_REMAP_SWJ_DISABLE()
// ;
__HAL_AFIO_REMAP_SWJ_NOJTAG();
MX_GPIO_Init();
MX_DMA_Init();
MX_I2C1_Init();
@@ -43,7 +43,7 @@ void Setup_HAL() {
MX_ADC2_Init();
MX_TIM3_Init();
MX_TIM2_Init();
MX_IWDG_Init();
// MX_IWDG_Init();
HAL_ADC_Start(&hadc2);
HAL_ADCEx_MultiModeStart_DMA(&hadc1, (uint32_t*) ADCReadings, 64); // start DMA of normal readings
HAL_ADCEx_InjectedStart(&hadc1); // enable injected readings
@@ -458,3 +458,8 @@ static void MX_GPIO_Init(void) {
HAL_Delay(30);
HAL_GPIO_WritePin(OLED_RESET_GPIO_Port, OLED_RESET_Pin, GPIO_PIN_SET);
}
#ifdef USE_FULL_ASSERT
void assert_failed(uint8_t* file, uint32_t line){
asm("bkpt");
}
#endif

1
workspace/TS100/Core/BSP/Miniware/system_stm32f1xx.c
View File

@@ -11,6 +11,7 @@
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
#define LOCAL_BUILD
#ifndef LOCAL_BUILD
#define VECT_TAB_OFFSET 0x00004000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */

114
workspace/TS100/Core/Drivers/FUSB302/fusb302b.cpp
View File

@@ -18,7 +18,7 @@
#include "fusb302b.h"
#include "I2CBB.hpp"
#include <pd.h>
#include "int_n.h"
/*
* Read a single byte from the FUSB302B
*
@@ -29,7 +29,9 @@
*/
static uint8_t fusb_read_byte(uint8_t addr) {
uint8_t data[1];
I2CBB::Mem_Read(FUSB302B_ADDR, addr, (uint8_t*) data, 1);
if (!I2CBB::Mem_Read(FUSB302B_ADDR, addr, (uint8_t*) data, 1)) {
asm("bkpt");
}
return data[0];
}
@@ -41,11 +43,8 @@ static uint8_t fusb_read_byte(uint8_t addr) {
* size: The number of bytes to read
* buf: The buffer into which data will be read
*/
static void fusb_read_buf(uint8_t addr, uint8_t size, uint8_t *buf) {
if(!I2CBB::Mem_Read(FUSB302B_ADDR, addr, (uint8_t*) buf, size)){
asm("bkpt");
}
static bool fusb_read_buf(uint8_t addr, uint8_t size, uint8_t *buf) {
return I2CBB::Mem_Read(FUSB302B_ADDR, addr, buf, size);
}
/*
@@ -55,11 +54,8 @@ static void fusb_read_buf(uint8_t addr, uint8_t size, uint8_t *buf) {
* addr: The memory address to which we will write
* byte: The value to write
*/
static void fusb_write_byte(uint8_t addr, uint8_t byte) {
if(!I2CBB::Mem_Write(FUSB302B_ADDR, addr, (uint8_t*) &byte, 1)){
asm("bkpt");
}
static bool fusb_write_byte(uint8_t addr, uint8_t byte) {
return I2CBB::Mem_Write(FUSB302B_ADDR, addr, (uint8_t*) &byte, 1);
}
/*
@@ -70,14 +66,12 @@ static void fusb_write_byte(uint8_t addr, uint8_t byte) {
* size: The number of bytes to write
* buf: The buffer to write
*/
static void fusb_write_buf(uint8_t addr, uint8_t size, const uint8_t *buf) {
if(!I2CBB::Mem_Write(FUSB302B_ADDR, addr, (uint8_t*) &buf, size)){
asm("bkpt");
}
static bool fusb_write_buf(uint8_t addr, uint8_t size, const uint8_t *buf) {
return I2CBB::Mem_Write(FUSB302B_ADDR, addr, buf, size);
}
void fusb_send_message(const union pd_msg *msg) {
/* Token sequences for the FUSB302B */
static uint8_t sop_seq[5] = {
FUSB_FIFO_TX_SOP1,
@@ -98,16 +92,23 @@ void fusb_send_message(const union pd_msg *msg) {
/* Set the number of bytes to be transmitted in the packet */
sop_seq[4] = FUSB_FIFO_TX_PACKSYM | msg_len;
if (!I2CBB::lock2()) {
asm("bkpt");
}
/* Write all three parts of the message to the TX FIFO */
fusb_write_buf( FUSB_FIFOS, 5, sop_seq);
fusb_write_buf( FUSB_FIFOS, msg_len, msg->bytes);
fusb_write_buf( FUSB_FIFOS, 4, eop_seq);
I2CBB::unlock2();
}
uint8_t fusb_read_message(union pd_msg *msg) {
uint8_t garbage[4];
if (!I2CBB::lock2()) {
asm("bkpt");
}
static uint8_t garbage[4];
uint8_t numobj;
/* If this isn't an SOP message, return error.
@@ -115,6 +116,8 @@ uint8_t fusb_read_message(union pd_msg *msg) {
* buffer is empty, and not try to read past a non-SOP message. */
if ((fusb_read_byte( FUSB_FIFOS) & FUSB_FIFO_RX_TOKEN_BITS)
!= FUSB_FIFO_RX_SOP) {
I2CBB::unlock2();
return 1;
}
/* Read the message header into msg */
@@ -128,33 +131,56 @@ uint8_t fusb_read_message(union pd_msg *msg) {
/* Throw the CRC32 in the garbage, since the PHY already checked it. */
fusb_read_buf( FUSB_FIFOS, 4, garbage);
I2CBB::unlock2();
return 0;
}
void fusb_send_hardrst() {
if (!I2CBB::lock2()) {
asm("bkpt");
}
/* Send a hard reset */
fusb_write_byte( FUSB_CONTROL3, 0x07 | FUSB_CONTROL3_SEND_HARD_RESET);
I2CBB::unlock2();
}
void fusb_setup() {
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 10, 0);
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
if (!I2CBB::lock2()) {
asm("bkpt");
}
}
/* Fully reset the FUSB302B */
fusb_write_byte( FUSB_RESET, FUSB_RESET_SW_RES);
delay_ms(2);
if (!fusb_read_id()) {
asm("bkpt");
}
/* Turn on all power */
fusb_write_byte( FUSB_POWER, 0x0F);
/* Set interrupt masks */
//Setting to 0 so interrupts are allowed
fusb_write_byte( FUSB_MASK1, 0x00);
fusb_write_byte( FUSB_MASKA, 0x00);
fusb_write_byte( FUSB_MASKB, 0x00);
fusb_write_byte( FUSB_CONTROL0, 0x04);
fusb_write_byte( FUSB_CONTROL0, 0b11 << 2);
/* Enable automatic retransmission */
fusb_write_byte( FUSB_CONTROL3, 0x07);
//set defaults
fusb_write_byte( FUSB_CONTROL2, 0x00);
/* Flush the RX buffer */
fusb_write_byte( FUSB_CONTROL1, FUSB_CONTROL1_RX_FLUSH);
@@ -184,29 +210,48 @@ void fusb_setup() {
fusb_write_byte( FUSB_SWITCHES0, 0x0B);
}
resetWatchdog();
/* Reset the PD logic */
fusb_write_byte( FUSB_RESET, FUSB_RESET_PD_RESET);
fusb_reset();
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
I2CBB::unlock2();
}
}
void fusb_get_status(union fusb_status *status) {
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
if (!I2CBB::lock2()) {
asm("bkpt");
}
}
/* Read the interrupt and status flags into status */
fusb_read_buf( FUSB_STATUS0A, 7, status->bytes);
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
I2CBB::unlock2();
}
}
enum fusb_typec_current fusb_get_typec_current() {
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
if (!I2CBB::lock2()) {
asm("bkpt");
}
}
/* Read the BC_LVL into a variable */
enum fusb_typec_current bc_lvl = (enum fusb_typec_current) (fusb_read_byte(
FUSB_STATUS0) & FUSB_STATUS0_BC_LVL);
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
I2CBB::unlock2();
}
return bc_lvl;
}
void fusb_reset() {
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
if (!I2CBB::lock2()) {
asm("bkpt");
}
}
/* Flush the TX buffer */
fusb_write_byte( FUSB_CONTROL0, 0x44);
@@ -214,5 +259,16 @@ void fusb_reset() {
fusb_write_byte( FUSB_CONTROL1, FUSB_CONTROL1_RX_FLUSH);
/* Reset the PD logic */
fusb_write_byte( FUSB_RESET, FUSB_RESET_PD_RESET);
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
I2CBB::unlock2();
}
}
bool fusb_read_id() {
//Return true if read of the revision ID is sane
uint8_t version = 0;
fusb_read_buf(FUSB_DEVICE_ID, 1, &version);
if (version == 0 || version == 0xFF)
return false;
return true;
}

2
workspace/TS100/Core/Drivers/FUSB302/fusb302b.h
View File

@@ -300,4 +300,6 @@ void fusb_setup();
*/
void fusb_reset();
bool fusb_read_id();
#endif /* PDB_FUSB302B_H */

3
workspace/TS100/Core/Drivers/FUSB302/fusbpd.cpp
View File

@@ -23,6 +23,7 @@ uint8_t fusb302_detect() {
void fusb302_start_processing() {
/* Initialize the FUSB302B */
fusb_setup();
resetWatchdog();
/* Create the policy engine thread. */
PolicyEngine::init();
@@ -30,7 +31,7 @@ void fusb302_start_processing() {
ProtocolReceive::init();
ProtocolTransmit::init();
ResetHandler::init();
resetWatchdog();
/* Create the INT_N thread. */
InterruptHandler::init();
}

33
workspace/TS100/Core/Drivers/FUSB302/hard_reset.cpp
View File

@@ -34,20 +34,23 @@ ResetHandler::hardrst_state ResetHandler::hardrst_reset_layer() {
/* First, wait for the signal to run a hard reset. */
eventmask_t evt = waitForEvent(
PDB_EVT_HARDRST_RESET | PDB_EVT_HARDRST_I_HARDRST);
/* Reset the Protocol RX machine */
ProtocolReceive::notify( PDB_EVT_PRLRX_RESET);
taskYIELD();
/* Reset the Protocol TX machine */
ProtocolTransmit::notify(PDB_EVT_PRLTX_RESET);
taskYIELD();
/* Continue the process based on what event started the reset. */
if (evt & PDB_EVT_HARDRST_RESET) {
/* Policy Engine started the reset. */
return PRLHRRequestHardReset;
if (evt & (PDB_EVT_HARDRST_RESET | PDB_EVT_HARDRST_I_HARDRST)) {
/* Reset the Protocol RX machine */
ProtocolReceive::notify( PDB_EVT_PRLRX_RESET);
taskYIELD();
/* Reset the Protocol TX machine */
ProtocolTransmit::notify( ProtocolTransmit::Notifications::PDB_EVT_PRLTX_RESET);
taskYIELD();
/* Continue the process based on what event started the reset. */
if (evt & PDB_EVT_HARDRST_RESET) {
/* Policy Engine started the reset. */
return PRLHRRequestHardReset;
} else {
/* PHY started the reset */
return PRLHRIndicateHardReset;
}
} else {
/* PHY started the reset */
return PRLHRIndicateHardReset;
return PRLHRResetLayer;
}
}
@@ -100,8 +103,7 @@ void ResetHandler::init() {
}
void ResetHandler::notify(uint32_t notification) {
xTaskNotify(TaskHandle, notification,
eNotifyAction::eSetBits);
xTaskNotify(TaskHandle, notification, eNotifyAction::eSetBits);
}
void ResetHandler::Thread(const void *arg) {
@@ -134,6 +136,7 @@ void ResetHandler::Thread(const void *arg) {
default:
/* This is an error. It really shouldn't happen. We might
* want to handle it anyway, though. */
state = PRLHRResetLayer;
break;
}
}

2
workspace/TS100/Core/Drivers/FUSB302/hard_reset.h
View File

@@ -33,7 +33,7 @@ public:
private:
static void Thread(const void *arg);
static osThreadId TaskHandle;
static const size_t TaskStackSize = 1024 / 4;
static const size_t TaskStackSize = 1536 / 4;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
static uint32_t waitForEvent(uint32_t mask, uint32_t ticksToWait =

42
workspace/TS100/Core/Drivers/FUSB302/int_n.cpp
View File

@@ -25,6 +25,7 @@
#include "policy_engine.h"
#include "protocol_rx.h"
#include "protocol_tx.h"
#include "task.h"
#include "BSP.h"
osThreadId InterruptHandler::TaskHandle;
@@ -32,39 +33,40 @@ uint32_t InterruptHandler::TaskBuffer[InterruptHandler::TaskStackSize];
osStaticThreadDef_t InterruptHandler::TaskControlBlock;
void InterruptHandler::init() {
osThreadStaticDef(Task, Thread, PDB_PRIO_PE, 0, TaskStackSize, TaskBuffer,
&TaskControlBlock);
osThreadStaticDef(Task, Thread, PDB_PRIO_PRL_INT_N, 0, TaskStackSize,
TaskBuffer, &TaskControlBlock);
TaskHandle = osThreadCreate(osThread(Task), NULL);
}
void InterruptHandler::Thread(const void *arg) {
(void) arg;
union fusb_status status;
eventmask_t events;
volatile uint32_t events;
while (true) {
/* If the INT_N line is low */
xTaskNotifyWait(0x00, 0x0F, NULL, 5);
xTaskNotifyWait(0x00, 0x0F, NULL, 100);
/* Read the FUSB302B status and interrupt registers */
fusb_get_status(&status);
//Check for rx alerts
/* If the I_GCRCSENT flag is set, tell the Protocol RX thread */
//This means a message was recieved with a good CRC
if (status.interruptb & FUSB_INTERRUPTB_I_GCRCSENT) {
ProtocolReceive::notify(PDB_EVT_PRLRX_I_GCRCSENT);
}
if ((status.status1 & FUSB_STATUS1_RX_EMPTY) == 0) {
ProtocolReceive::notify(PDB_EVT_PRLRX_I_GCRCSENT);
}
/* If the I_TXSENT or I_RETRYFAIL flag is set, tell the Protocol TX
* thread */
events = 0;
if (status.interrupta & FUSB_INTERRUPTA_I_RETRYFAIL) {
events |= PDB_EVT_PRLTX_I_RETRYFAIL;
}
if (status.interrupta & FUSB_INTERRUPTA_I_TXSENT) {
events |= PDB_EVT_PRLTX_I_TXSENT;
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_I_TXSENT);
}
if (events) {
ProtocolTransmit::notify(events);
if (status.interrupta & FUSB_INTERRUPTA_I_RETRYFAIL) {
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_I_RETRYFAIL);
}
/* If the I_HARDRST or I_HARDSENT flag is set, tell the Hard Reset
@@ -72,25 +74,25 @@ void InterruptHandler::Thread(const void *arg) {
events = 0;
if (status.interrupta & FUSB_INTERRUPTA_I_HARDRST) {
events |= PDB_EVT_HARDRST_I_HARDRST;
}
if (status.interrupta & FUSB_INTERRUPTA_I_HARDSENT) {
// events |= PDB_EVT_HARDRST_I_HARDRST;
} else if (status.interrupta & FUSB_INTERRUPTA_I_HARDSENT) {
events |= PDB_EVT_HARDRST_I_HARDSENT;
}
if (events) {
ResetHandler::notify(events);
}
/* If the I_OCP_TEMP and OVRTEMP flags are set, tell the Policy
* Engine thread */
if (status.interrupta & FUSB_INTERRUPTA_I_OCP_TEMP
&& status.status1 & FUSB_STATUS1_OVRTEMP) {
PolicyEngine::notify(PDB_EVT_PE_I_OVRTEMP);
}
}
}
volatile uint8_t irqs = 0;
void InterruptHandler::irqCallback() {
xTaskNotify(TaskHandle, 0x0F, eNotifyAction::eSetBits);
irqs++;
BaseType_t taskWoke = pdFALSE;
xTaskNotifyFromISR(TaskHandle, 0x0F, eNotifyAction::eSetBits, &taskWoke);
portYIELD_FROM_ISR(taskWoke);
}

2
workspace/TS100/Core/Drivers/FUSB302/int_n.h
View File

@@ -30,7 +30,7 @@ public:
private:
static void Thread(const void *arg);
static osThreadId TaskHandle;
static const size_t TaskStackSize = 1024 / 4;
static const size_t TaskStackSize = 1536 / 4;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
/*

16
workspace/TS100/Core/Drivers/FUSB302/pd.h
View File

@@ -273,18 +273,18 @@
* Where a range is specified, the middle of the range (rounded down to the
* nearest millisecond) is used.
*/
#define PD_T_CHUNKING_NOT_SUPPORTED (45)
#define PD_T_HARD_RESET_COMPLETE (4)
#define PD_T_PS_TRANSITION (500)
#define PD_T_SENDER_RESPONSE (27)
#define PD_T_SINK_REQUEST (100)
#define PD_T_TYPEC_SINK_WAIT_CAP (465)
#define PD_T_PD_DEBOUNCE (15)
#define PD_T_CHUNKING_NOT_SUPPORTED (450)
#define PD_T_HARD_RESET_COMPLETE (400)
#define PD_T_PS_TRANSITION (5000)
#define PD_T_SENDER_RESPONSE (2700)
#define PD_T_SINK_REQUEST (1000)
#define PD_T_TYPEC_SINK_WAIT_CAP (5000)
#define PD_T_PD_DEBOUNCE (2000)
/*
* Counter maximums
*/
#define PD_N_HARD_RESET_COUNT 10
#define PD_N_HARD_RESET_COUNT 20
/*
* Value parameters

41
workspace/TS100/Core/Drivers/FUSB302/policy_engine.cpp
View File

@@ -181,13 +181,13 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_wait_cap() {
if ((hdr_template & PD_HDR_SPECREV) == PD_SPECREV_1_0) {
/* If the other end is using at least version 3.0, we'll
* use version 3.0. */
if ((tempMessage.hdr & PD_HDR_SPECREV) >= PD_SPECREV_3_0) {
hdr_template |= PD_SPECREV_3_0;
/* Otherwise, use 2.0. Don't worry about the 1.0 case
* because we don't have hardware for PD 1.0 signaling. */
} else {
hdr_template |= PD_SPECREV_2_0;
}
// if ((tempMessage.hdr & PD_HDR_SPECREV) >= PD_SPECREV_3_0) {
// hdr_template |= PD_SPECREV_3_0;
// /* Otherwise, use 2.0. Don't worry about the 1.0 case
// * because we don't have hardware for PD 1.0 signaling. */
// } else {
hdr_template |= PD_SPECREV_2_0;
// }
}
return PESinkEvalCap;
/* If the message was a Soft_Reset, do the soft reset procedure */
@@ -247,7 +247,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_select_cap() {
/* Transmit the request */
ProtocolTransmit::pushMessage(&_last_dpm_request);
//Send indication that there is a message pending
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);
/* Don't free the request; we might need it again */
@@ -396,7 +397,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
/* If the DPM wants us to, send a Get_Source_Cap message */
if (evt & PDB_EVT_PE_GET_SOURCE_CAP) {
/* Tell the protocol layer we're starting an AMS */
ProtocolTransmit::notify( PDB_EVT_PRLTX_START_AMS);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_START_AMS);
return PESinkGetSourceCap;
}
@@ -406,14 +408,16 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_ready() {
* design of this firmware. */
if (evt & PDB_EVT_PE_NEW_POWER) {
/* Tell the protocol layer we're starting an AMS */
ProtocolTransmit::notify( PDB_EVT_PRLTX_START_AMS);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_START_AMS);
return PESinkEvalCap;
}
/* If SinkPPSPeriodicTimer ran out, send a new request */
if (evt & PDB_EVT_PE_PPS_REQUEST) {
/* Tell the protocol layer we're starting an AMS */
ProtocolTransmit::notify( PDB_EVT_PRLTX_START_AMS);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_START_AMS);
return PESinkSelectCap;
}
@@ -538,7 +542,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_get_source_cap() {
| PD_NUMOBJ(0);
/* Transmit the Get_Source_Cap */
ProtocolTransmit::pushMessage(get_source_cap);
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);
/* Free the sent message */
@@ -562,7 +567,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_give_sink_cap() {
/* Transmit our capabilities */
ProtocolTransmit::pushMessage(snk_cap);
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);
@@ -623,7 +629,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_soft_reset() {
accept.hdr = hdr_template | PD_MSGTYPE_ACCEPT | PD_NUMOBJ(0);
/* Transmit the Accept */
ProtocolTransmit::pushMessage(&accept);
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);
/* Free the sent message */
@@ -650,7 +657,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_send_soft_reset() {
softrst->hdr = hdr_template | PD_MSGTYPE_SOFT_RESET | PD_NUMOBJ(0);
/* Transmit the soft reset */
ProtocolTransmit::pushMessage(softrst);
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);
/* If we got reset signaling, transition to default */
@@ -711,7 +719,8 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_send_not_supported() {
/* Transmit the message */
ProtocolTransmit::pushMessage(not_supported);
ProtocolTransmit::notify( PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_MSG_TX);
eventmask_t evt = waitForEvent(
PDB_EVT_PE_TX_DONE | PDB_EVT_PE_TX_ERR | PDB_EVT_PE_RESET);

2
workspace/TS100/Core/Drivers/FUSB302/policy_engine.h
View File

@@ -116,7 +116,7 @@ private:
portMAX_DELAY);
//Task resources
static osThreadId TaskHandle;
static const size_t TaskStackSize = 1024 / 4;
static const size_t TaskStackSize = 2048 / 4;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
static union pd_msg tempMessage;

21
workspace/TS100/Core/Drivers/FUSB302/protocol_rx.cpp
View File

@@ -39,7 +39,7 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_wait_phy() {
/* If we got a reset event, reset */
if (evt & PDB_EVT_PRLRX_RESET) {
waitForEvent(PDB_EVT_PRLRX_RESET, 0);
// waitForEvent(PDB_EVT_PRLRX_RESET, 0);
return PRLRxWaitPHY;
}
/* If we got an I_GCRCSENT event, read the message and decide what to do */
@@ -73,7 +73,8 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_reset() {
_rx_messageid = -1;
/* TX transitions to its reset state */
ProtocolTransmit::notify( PDB_EVT_PRLTX_RESET);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_RESET);
taskYIELD();
/* If we got a RESET signal, reset the machine */
@@ -84,7 +85,7 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_reset() {
/* Go to the Check_MessageID state */
return PRLRxCheckMessageID;
}
volatile uint32_t rxCounter = 0;
/*
* PRL_Rx_Check_MessageID state
*/
@@ -99,9 +100,9 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_check_messageid(
/* Otherwise, there's either no stored ID or this message has an ID we
* haven't just seen. Transition to the Store_MessageID state. */
/*if (PD_MESSAGEID_GET(&tempMessage) == _rx_messageid) {
return PRLRxWaitPHY;
} else*/
return PRLRxWaitPHY;
} else*/
rxCounter++;
{
return PRLRxStoreMessageID;
}
@@ -113,7 +114,8 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_check_messageid(
ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_store_messageid() {
/* Tell ProtocolTX to discard the message being transmitted */
ProtocolTransmit::notify( PDB_EVT_PRLTX_DISCARD);
ProtocolTransmit::notify(
ProtocolTransmit::Notifications::PDB_EVT_PRLTX_DISCARD);
taskYIELD();
/* Update the stored MessageID */
@@ -122,7 +124,7 @@ ProtocolReceive::protocol_rx_state ProtocolReceive::protocol_rx_store_messageid(
/* Pass the message to the policy engine. */
PolicyEngine::handleMessage(&tempMessage);
PolicyEngine::notify( PDB_EVT_PE_MSG_RX);
PolicyEngine::notify(PDB_EVT_PE_MSG_RX);
/* Don't check if we got a RESET because we'd do nothing different. */
@@ -163,6 +165,9 @@ void ProtocolReceive::thread(const void *args) {
}
void ProtocolReceive::notify(uint32_t notification) {
if (notification == PDB_EVT_PRLRX_I_GCRCSENT) {
// asm("bkpt");
}
xTaskNotify(TaskHandle, notification, eNotifyAction::eSetBits);
}

2
workspace/TS100/Core/Drivers/FUSB302/protocol_rx.h
View File

@@ -34,7 +34,7 @@ private:
static void thread(const void *args);
static osThreadId TaskHandle;
static const size_t TaskStackSize = 512 / 4;
static const size_t TaskStackSize = 1024 / 4;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
/*

55
workspace/TS100/Core/Drivers/FUSB302/protocol_tx.cpp
View File

@@ -59,18 +59,20 @@ ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_phy_reset() {
*/
ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_wait_message() {
/* Wait for an event */
eventmask_t evt = waitForEvent(
PDB_EVT_PRLTX_RESET | PDB_EVT_PRLTX_DISCARD | PDB_EVT_PRLTX_MSG_TX);
ProtocolTransmit::Notifications evt = waitForEvent(
(uint32_t) Notifications::PDB_EVT_PRLTX_RESET
| (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD
| (uint32_t) Notifications::PDB_EVT_PRLTX_MSG_TX);
if (evt & PDB_EVT_PRLTX_RESET) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_RESET) {
return PRLTxPHYReset;
}
if (evt & PDB_EVT_PRLTX_DISCARD) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD) {
return PRLTxDiscardMessage;
}
/* If the policy engine is trying to send a message */
if (evt & PDB_EVT_PRLTX_MSG_TX) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_MSG_TX) {
/* Get the message */
getMessage();
@@ -104,13 +106,14 @@ ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_reset() {
*/
ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_construct_message() {
/* Make sure nobody wants us to reset */
eventmask_t evt = waitForEvent(
PDB_EVT_PRLTX_RESET | PDB_EVT_PRLTX_DISCARD, 0);
ProtocolTransmit::Notifications evt = waitForEvent(
(uint32_t) Notifications::PDB_EVT_PRLTX_RESET
| (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD, 0);
if (evt & PDB_EVT_PRLTX_RESET) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_RESET) {
return PRLTxPHYReset;
}
if (evt & PDB_EVT_PRLTX_DISCARD) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD) {
return PRLTxDiscardMessage;
}
@@ -121,8 +124,9 @@ ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_construct_mess
/* PD 3.0 collision avoidance */
if (PolicyEngine::isPD3_0()) {
/* If we're starting an AMS, wait for permission to transmit */
evt = waitForEvent(PDB_EVT_PRLTX_START_AMS, 0);
if (evt & PDB_EVT_PRLTX_START_AMS) {
evt = waitForEvent((uint32_t) Notifications::PDB_EVT_PRLTX_START_AMS,
0);
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_START_AMS) {
while (fusb_get_typec_current() != fusb_sink_tx_ok) {
osDelay(1);
}
@@ -141,23 +145,25 @@ ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_construct_mess
ProtocolTransmit::protocol_tx_state ProtocolTransmit::protocol_tx_wait_response() {
/* Wait for an event. There is no need to run CRCReceiveTimer, since the
* FUSB302B handles that as part of its retry mechanism. */
eventmask_t evt = waitForEvent(
PDB_EVT_PRLTX_RESET | PDB_EVT_PRLTX_DISCARD | PDB_EVT_PRLTX_I_TXSENT
| PDB_EVT_PRLTX_I_RETRYFAIL);
ProtocolTransmit::Notifications evt = waitForEvent(
(uint32_t) Notifications::PDB_EVT_PRLTX_RESET
| (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD
| (uint32_t) Notifications::PDB_EVT_PRLTX_I_TXSENT
| (uint32_t) Notifications::PDB_EVT_PRLTX_I_RETRYFAIL);
if (evt & PDB_EVT_PRLTX_RESET) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_RESET) {
return PRLTxPHYReset;
}
if (evt & PDB_EVT_PRLTX_DISCARD) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_DISCARD) {
return PRLTxDiscardMessage;
}
/* If the message was sent successfully */
if (evt & PDB_EVT_PRLTX_I_TXSENT) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_I_TXSENT) {
return PRLTxMatchMessageID;
}
/* If the message failed to be sent */
if (evt & PDB_EVT_PRLTX_I_RETRYFAIL) {
if ((uint32_t)evt & (uint32_t) Notifications::PDB_EVT_PRLTX_I_RETRYFAIL) {
return PRLTxTransmissionError;
}
@@ -253,16 +259,16 @@ void ProtocolTransmit::thread(const void *args) {
}
}
void ProtocolTransmit::notify(uint32_t notification) {
xTaskNotify(TaskHandle, notification, eNotifyAction::eSetBits);
void ProtocolTransmit::notify(ProtocolTransmit::Notifications notification) {
xTaskNotify(TaskHandle, (uint32_t )notification, eNotifyAction::eSetBits);
}
void ProtocolTransmit::init() {
messagesWaiting = xQueueCreateStatic(PDB_MSG_POOL_SIZE,
sizeof(union pd_msg), ucQueueStorageArea, &xStaticQueue);
osThreadStaticDef(pd_txTask, thread, PDB_PRIO_PRL, 0,
TaskStackSize, TaskBuffer, &TaskControlBlock);
osThreadStaticDef(pd_txTask, thread, PDB_PRIO_PE, 0, TaskStackSize,
TaskBuffer, &TaskControlBlock);
TaskHandle = osThreadCreate(osThread(pd_txTask), NULL);
}
@@ -279,8 +285,9 @@ void ProtocolTransmit::getMessage() {
xQueueReceive(messagesWaiting, &temp_msg, 1);
}
uint32_t ProtocolTransmit::waitForEvent(uint32_t mask, uint32_t ticksToWait) {
ProtocolTransmit::Notifications ProtocolTransmit::waitForEvent(uint32_t mask,
uint32_t ticksToWait) {
uint32_t pulNotificationValue;
xTaskNotifyWait(0x00, mask, &pulNotificationValue, ticksToWait);
return pulNotificationValue & mask;
return (Notifications) (pulNotificationValue & mask);
}

24
workspace/TS100/Core/Drivers/FUSB302/protocol_tx.h
View File

@@ -24,24 +24,28 @@
#include <pd.h>
/* Events for the Protocol TX thread */
#define PDB_EVT_PRLTX_RESET EVENT_MASK(0)
#define PDB_EVT_PRLTX_I_TXSENT EVENT_MASK(1)
#define PDB_EVT_PRLTX_I_RETRYFAIL EVENT_MASK(2)
#define PDB_EVT_PRLTX_DISCARD EVENT_MASK(3)
#define PDB_EVT_PRLTX_MSG_TX EVENT_MASK(4)
#define PDB_EVT_PRLTX_START_AMS EVENT_MASK(5)
class ProtocolTransmit {
public:
static void init();
//Push a message to the queue to be sent out the pd comms bus
static void pushMessage(union pd_msg *msg);
static void notify(uint32_t notification);
enum class Notifications {
PDB_EVT_PRLTX_RESET = EVENT_MASK(0), //
PDB_EVT_PRLTX_I_TXSENT = EVENT_MASK(1), //
PDB_EVT_PRLTX_I_RETRYFAIL = EVENT_MASK(2), //
PDB_EVT_PRLTX_DISCARD = EVENT_MASK(3), //
PDB_EVT_PRLTX_MSG_TX = EVENT_MASK(4), //
PDB_EVT_PRLTX_START_AMS = EVENT_MASK(5), //
};
static void notify(Notifications notification);
private:
static void thread(const void *args);
static osThreadId TaskHandle;
static const size_t TaskStackSize = 512 / 4;
static const size_t TaskStackSize = 1024 / 4;
static uint32_t TaskBuffer[TaskStackSize];
static osStaticThreadDef_t TaskControlBlock;
/*
@@ -83,8 +87,8 @@ private:
//Reads a message off the queue into the temp message
static void getMessage();
static union pd_msg temp_msg;
static uint32_t waitForEvent(uint32_t mask, uint32_t ticksToWait =
portMAX_DELAY);
static Notifications waitForEvent(uint32_t mask, uint32_t ticksToWait =
portMAX_DELAY);
};

2
workspace/TS100/Core/Drivers/OLED.cpp
View File

@@ -213,7 +213,7 @@ void OLED::useSecondaryFramebuffer(bool useSecondary) {
}
void OLED::setRotation(bool leftHanded) {
#ifdef MODEL_TS80
#if defined( MODEL_TS80) +defined( MODEL_TS80P) > 0
leftHanded = !leftHanded;
#endif
if (inLeftHandedMode == leftHanded) {

5
workspace/TS100/Core/Drivers/TipThermoModel.cpp
View File

@@ -27,12 +27,11 @@
* This was bought to my attention by <Kuba Sztandera>
*/
uint32_t TipThermoModel::convertTipRawADCTouV(uint16_t rawADC) {
// This takes the raw ADC samples, converts these to uV
// Then divides this down by the gain to convert to the uV on the input to the op-amp (A+B terminals)
// Then remove the calibration value that is stored as a tip offset
uint32_t vddRailmVX10 = 33000; //The vreg is +-2%, but we have no higher accuracy available
uint32_t vddRailmVX10 = 33000;//The vreg is +-2%, but we have no higher accuracy available
// 4096 * 8 readings for full scale
// Convert the input ADC reading back into mV times 10 format.
uint32_t rawInputmVX10 = (rawADC * vddRailmVX10) / (4096 * 8);
@@ -76,7 +75,7 @@ uint32_t TipThermoModel::convertuVToDegC(uint32_t tipuVDelta) {
tipuVDelta *= 10;
tipuVDelta /= systemSettings.TipGain;
#ifdef MODEL_TS80
#if defined( MODEL_TS80)+defined( MODEL_TS80P)>0
tipuVDelta /= OP_AMP_GAIN_STAGE_TS100 / OP_AMP_GAIN_STAGE_TS80;
#endif

4
workspace/TS100/Core/Inc/FreeRTOSConfig.h
View File

@@ -98,11 +98,11 @@ extern uint32_t SystemCoreClock;
#define configUSE_IDLE_HOOK 1
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)100)
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 6 )
#define configMINIMAL_STACK_SIZE ((uint16_t)256)
#define configTOTAL_HEAP_SIZE ((size_t)1024*14) /*Currently use about 9000*/
#define configMAX_TASK_NAME_LEN ( 24 )
#define configMAX_TASK_NAME_LEN ( 32 )
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8

729
workspace/TS100/Core/Inc/stm32f1xx_hal_conf.h
View File

@@ -1,365 +1,364 @@
/**
******************************************************************************
* @file stm32f1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_CONF_H
#define __STM32F1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_PCCARD_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_HCD_MODULE_ENABLED */
/*#define HAL_PWR_MODULE_ENABLED */
/*#define HAL_RCC_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_SDRAM_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
/*#define HAL_UART_MODULE_ENABLED */
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1 */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2
#define MAC_ADDR1 0
#define MAC_ADDR2 0
#define MAC_ADDR3 0
#define MAC_ADDR4 0
#define MAC_ADDR5 0
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
#define PHY_READ_TO ((uint32_t)0x0000FFFF)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f1xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f1xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f1xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f1xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f1xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f1xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f1xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f1xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f1xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/**
******************************************************************************
* @file stm32f1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_CONF_H
#define __STM32F1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_PCCARD_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_HCD_MODULE_ENABLED */
/*#define HAL_PWR_MODULE_ENABLED */
/*#define HAL_RCC_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_MMC_MODULE_ENABLED */
/*#define HAL_SDRAM_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
/*#define HAL_UART_MODULE_ENABLED */
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1 */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2
#define MAC_ADDR1 0
#define MAC_ADDR2 0
#define MAC_ADDR3 0
#define MAC_ADDR4 0
#define MAC_ADDR5 0
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FF)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
#define PHY_READ_TO ((uint32_t)0x0000FFFF)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f1xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f1xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f1xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f1xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f1xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f1xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f1xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f1xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f1xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1
workspace/TS100/Core/Src/FreeRTOSHooks.c
View File

@@ -37,6 +37,7 @@ void vApplicationStackOverflowHook(xTaskHandle *pxTask,
signed portCHAR *pcTaskName) {
(void) pxTask;
(void) pcTaskName;
asm("bkpt");
// We dont have a good way to handle a stack overflow at this point in time
reboot();
}

18
workspace/TS100/Core/Src/QC3.c
View File

@@ -30,16 +30,16 @@ void QC_SeekContMode() {
}
void QC_SeekContPlus() {
QC_SeekContMode();
vTaskDelay(3);
osDelay(30);
QC_Seek20V();
vTaskDelay(1);
osDelay(10);
QC_SeekContMode();
}
void QC_SeekContNeg() {
QC_SeekContMode();
vTaskDelay(3);
osDelay(30);
QC_Seek12V();
vTaskDelay(1);
osDelay(10);
QC_SeekContMode();
}
uint8_t QCMode = 0;
@@ -65,15 +65,15 @@ void seekQC(int16_t Vx10, uint16_t divisor) {
if (steps > -2 && steps < 2) return; // dont bother with small steps
while (steps < 0) {
QC_SeekContNeg();
vTaskDelay(3);
osDelay(30);
steps++;
}
while (steps > 0) {
QC_SeekContPlus();
vTaskDelay(3);
osDelay(30);
steps--;
}
vTaskDelay(10);
osDelay(100);
}
#ifdef ENABLE_QC2
// Re-measure
@@ -118,7 +118,7 @@ void startQC(uint16_t divisor) {
// Delay 1.25 seconds
uint8_t enteredQC = 0;
for (uint16_t i = 0; i < 200 && enteredQC == 0; i++) {
vTaskDelay(1); // 10mS pause
osDelay(10); // 10mS pause
if (i > 130) {
if (QC_DM_PulledDown()) {
enteredQC = 1;
@@ -143,7 +143,7 @@ void startQC(uint16_t divisor) {
QCMode = 3; // We have at least QC2, pray for 3
return;
}
vTaskDelay(10); // 100mS
osDelay(100); // 100mS
}
QCMode = 5;
QCTries++;

18
workspace/TS100/Core/Src/gui.cpp
View File

@@ -120,14 +120,14 @@ static void settings_enterAdvancedMenu(void);
*
*/
const menuitem rootSettingsMenu[] {
/*
* Power Source
* Soldering Menu
* Power Saving Menu
* UI Menu
* Advanced Menu
* Exit
*/
/*
* Power Source
* Soldering Menu
* Power Saving Menu
* UI Menu
* Advanced Menu
* Exit
*/
#ifdef MODEL_TS100
{ (const char*) SettingsDescriptions[0], { settings_setInputVRange }, {
settings_displayInputVRange } }, /*Voltage input*/
@@ -739,7 +739,7 @@ static void settings_setCalibrateVIN(void) {
osDelay(40);
// Cap to sensible values
#ifdef MODEL_TS80
#if defined(MODEL_TS80)+defined(MODEL_TS80P)>0
if (systemSettings.voltageDiv < 500) {
systemSettings.voltageDiv = 500;
} else if (systemSettings.voltageDiv > 900) {

10
workspace/TS100/Core/Src/main.cpp
View File

@@ -43,7 +43,7 @@ int main(void) {
OLED::setFont(0); // default to bigger font
// Testing for which accelerometer is mounted
resetWatchdog();
usb_pd_available = usb_pd_detect();
usb_pd_available = true;//usb_pd_detect();
resetWatchdog();
settingsWereReset = restoreSettings(); // load the settings from flash
/*if (MMA8652FC::detect()) {
@@ -68,10 +68,10 @@ int main(void) {
GUITaskStackSize, GUITaskBuffer, &GUITaskControlBlock);
GUITaskHandle = osThreadCreate(osThread(GUITask), NULL);
/* definition and creation of PIDTask */
osThreadStaticDef(PIDTask, startPIDTask, osPriorityRealtime, 0,
PIDTaskStackSize, PIDTaskBuffer, &PIDTaskControlBlock);
PIDTaskHandle = osThreadCreate(osThread(PIDTask), NULL);
// /* definition and creation of PIDTask */
// osThreadStaticDef(PIDTask, startPIDTask, osPriorityRealtime, 0,
// PIDTaskStackSize, PIDTaskBuffer, &PIDTaskControlBlock);
// PIDTaskHandle = osThreadCreate(osThread(PIDTask), NULL);
osThreadStaticDef(MOVTask, startMOVTask, osPriorityNormal, 0,
MOVTaskStackSize, MOVTaskBuffer, &MOVTaskControlBlock);

8
workspace/TS100/Core/Threads/GUIThread.cpp
View File

@@ -247,7 +247,7 @@ static void gui_solderingTempAdjust() {
if (xTaskGetTickCount() - lastChange > 200)
return; // exit if user just doesn't press anything for a bit
#ifdef MODEL_TS80
#if defined (MODEL_TS80P)+defined(MODEL_TS80)>0
if (!OLED::getRotation()) {
#else
if (OLED::getRotation()) {
@@ -272,7 +272,7 @@ static void gui_solderingTempAdjust() {
OLED::drawSymbol(1);
}
OLED::print(SymbolSpace);
#ifdef MODEL_TS80
#if defined (MODEL_TS80P)+defined(MODEL_TS80)>0
if (!OLED::getRotation()) {
#else
if (OLED::getRotation()) {
@@ -770,7 +770,7 @@ void startGUITask(void const *argument __unused) {
} else {
OLED::setFont(0);
#ifdef MODEL_TS80
#if defined (MODEL_TS80P)+defined(MODEL_TS80)>0
if (!OLED::getRotation()) {
#else
if (OLED::getRotation()) {
@@ -791,7 +791,7 @@ void startGUITask(void const *argument __unused) {
if (tempOnDisplay) {
// draw temp over the start soldering button
// Location changes on screen rotation
#ifdef MODEL_TS80
#if defined (MODEL_TS80P)+defined(MODEL_TS80)>0
if (!OLED::getRotation()) {
#else
if (OLED::getRotation()) {

4
workspace/TS100/LinkerScript.ld
View File

@@ -14,9 +14,9 @@ MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
/* LOCAL_BUILD*/
/*ROM (rx) : ORIGIN = 0x08000000, LENGTH = 46K*/
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 46K
/* production*/
ROM (rx) : ORIGIN = 0x08004000, LENGTH = 46K
/*ROM (rx) : ORIGIN = 0x08004000, LENGTH = 46K*/

1
workspace/TS100/configuration.h
View File

@@ -108,7 +108,6 @@
#endif
#ifdef MODEL_TS80
#define VOLTAGE_DIV_TS80P 768 // Default for TS80P with slightly different resistors
#define VOLTAGE_DIV 780 // Default divider from schematic
#define PID_POWER_LIMIT 24 // Sets the max pwm power limit
#define CALIBRATION_OFFSET 900 // the adc offset in uV