sv/IronOS
1
0
Fork 0
forked from me/IronOS
Code Pull Requests Activity

Format adc headers

Browse Source
This commit is contained in:
Ben V. Brown
2022-04-18 19:24:23 +10:00
parent fc1f28f2b8
commit 0c13aae5f0
3 changed files with 1491 additions and 1598 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
source/Core/BSP/Magic/IRQ.cpp
View File

@@ -70,7 +70,7 @@ void start_adc_tip(void) {
// The ADC has a 32 sample FiFo; we set this up to fire and interrupt at 16 samples
// Then using that IRQ to know that sampling is done and can be stored
ADC_Stop();
ADC_Scan_Channel_Config((ADC_Chan_Type *)adc_tip_pos_chans, (ADC_Chan_Type *)adc_tip_neg_chans, 2, ENABLE);
ADC_Scan_Channel_Config((ADC_Chan_Type *)adc_tip_pos_chans, (ADC_Chan_Type *)adc_tip_neg_chans, 1, ENABLE);
ADC_Start();
}
const ADC_Chan_Type adc_misc_pos_chans[] = {TMP36_ADC_CHANNEL, VIN_ADC_CHANNEL};

147
source/Core/BSP/Magic/bl_mcu_sdk/drivers/bl702_driver/std_drv/inc/bl702_adc.h
View File

@@ -37,8 +37,9 @@
#define __BL702_ADC_H__
#include "aon_reg.h"
#include "gpip_reg.h"
#include "bl702_common.h"
#include "gpip_reg.h"
/** @addtogroup BL702_Peripheral_Driver
* @{
@@ -235,8 +236,7 @@ typedef enum {
/**
* @brief ADC mic type definition
*/
typedef struct
{
typedef struct {
ADC_MICBOOST_DB_Type micboostDb; /*!< MIC boost db */
ADC_PGA2_GAIN_Type micPga2Gain; /*!< MIC pga2 gain */
ADC_MIC_MODE_Type mic1Mode; /*!< MIC1 single or diff */
@@ -250,8 +250,7 @@ typedef struct
/**
* @brief ADC configuration type definition
*/
typedef struct
{
typedef struct {
ADC_V18_SEL_Type v18Sel; /*!< ADC 1.8V select */
ADC_V11_SEL_Type v11Sel; /*!< ADC 1.1V select */
ADC_CLK_Type clkDiv; /*!< Clock divider */
@@ -270,8 +269,7 @@ typedef struct
/**
* @brief ADC configuration type definition
*/
typedef struct
{
typedef struct {
int8_t posChan; /*!< Positive channel */
int8_t negChan; /*!< Negative channel */
uint16_t value; /*!< ADC value */
@@ -304,8 +302,7 @@ typedef enum {
/**
* @brief ADC FIFO configuration structure type definition
*/
typedef struct
{
typedef struct {
ADC_FIFO_Threshold_Type fifoThreshold; /*!< ADC FIFO threshold */
BL_Fun_Type dmaEn; /*!< ADC DMA enable */
} ADC_FIFO_Cfg_Type;
@@ -313,8 +310,7 @@ typedef struct
/**
* @brief ADC REG GAIN CAL
*/
typedef struct
{
typedef struct {
BL_Fun_Type adcGainCoeffEnable; /*!< ADC_Gain_Coeff enable */
uint16_t adcgainCoeffVal; /*!< ADC_Gain_Coeff value */
float coe; /*!< ADC_Gain_Coeff result */
@@ -329,169 +325,106 @@ typedef struct
/** @defgroup ADC_CHAN_TYPE
* @{
*/
#define IS_ADC_CHAN_TYPE(type) (((type) == ADC_CHAN0) || \
((type) == ADC_CHAN1) || \
((type) == ADC_CHAN2) || \
((type) == ADC_CHAN3) || \
((type) == ADC_CHAN4) || \
((type) == ADC_CHAN5) || \
((type) == ADC_CHAN6) || \
((type) == ADC_CHAN7) || \
((type) == ADC_CHAN8) || \
((type) == ADC_CHAN9) || \
((type) == ADC_CHAN10) || \
((type) == ADC_CHAN11) || \
((type) == ADC_CHAN_DAC_OUTA) || \
((type) == ADC_CHAN_DAC_OUTB) || \
((type) == ADC_CHAN_TSEN_P) || \
((type) == ADC_CHAN_TSEN_N) || \
((type) == ADC_CHAN_VREF) || \
((type) == ADC_CHAN_DCTEST) || \
((type) == ADC_CHAN_VABT_HALF) || \
((type) == ADC_CHAN_SENP3) || \
((type) == ADC_CHAN_SENP2) || \
((type) == ADC_CHAN_SENP1) || \
((type) == ADC_CHAN_SENP0) || \
((type) == ADC_CHAN_GND))
#define IS_ADC_CHAN_TYPE(type) \
(((type) == ADC_CHAN0) || ((type) == ADC_CHAN1) || ((type) == ADC_CHAN2) || ((type) == ADC_CHAN3) || ((type) == ADC_CHAN4) || ((type) == ADC_CHAN5) || ((type) == ADC_CHAN6) \
|| ((type) == ADC_CHAN7) || ((type) == ADC_CHAN8) || ((type) == ADC_CHAN9) || ((type) == ADC_CHAN10) || ((type) == ADC_CHAN11) || ((type) == ADC_CHAN_DAC_OUTA) || ((type) == ADC_CHAN_DAC_OUTB) \
|| ((type) == ADC_CHAN_TSEN_P) || ((type) == ADC_CHAN_TSEN_N) || ((type) == ADC_CHAN_VREF) || ((type) == ADC_CHAN_DCTEST) || ((type) == ADC_CHAN_VABT_HALF) || ((type) == ADC_CHAN_SENP3) \
|| ((type) == ADC_CHAN_SENP2) || ((type) == ADC_CHAN_SENP1) || ((type) == ADC_CHAN_SENP0) || ((type) == ADC_CHAN_GND))
/** @defgroup ADC_V18_SEL_TYPE
* @{
*/
#define IS_ADC_V18_SEL_TYPE(type) (((type) == ADC_V18_SEL_1P62V) || \
((type) == ADC_V18_SEL_1P72V) || \
((type) == ADC_V18_SEL_1P82V) || \
((type) == ADC_V18_SEL_1P92V))
#define IS_ADC_V18_SEL_TYPE(type) (((type) == ADC_V18_SEL_1P62V) || ((type) == ADC_V18_SEL_1P72V) || ((type) == ADC_V18_SEL_1P82V) || ((type) == ADC_V18_SEL_1P92V))
/** @defgroup ADC_V11_SEL_TYPE
* @{
*/
#define IS_ADC_V11_SEL_TYPE(type) (((type) == ADC_V11_SEL_1P0V) || \
((type) == ADC_V11_SEL_1P1V) || \
((type) == ADC_V11_SEL_1P18V) || \
((type) == ADC_V11_SEL_1P26V))
#define IS_ADC_V11_SEL_TYPE(type) (((type) == ADC_V11_SEL_1P0V) || ((type) == ADC_V11_SEL_1P1V) || ((type) == ADC_V11_SEL_1P18V) || ((type) == ADC_V11_SEL_1P26V))
/** @defgroup ADC_CLK_TYPE
* @{
*/
#define IS_ADC_CLK_TYPE(type) (((type) == ADC_CLK_DIV_1) || \
((type) == ADC_CLK_DIV_4) || \
((type) == ADC_CLK_DIV_8) || \
((type) == ADC_CLK_DIV_12) || \
((type) == ADC_CLK_DIV_16) || \
((type) == ADC_CLK_DIV_20) || \
((type) == ADC_CLK_DIV_24) || \
((type) == ADC_CLK_DIV_32))
#define IS_ADC_CLK_TYPE(type) \
(((type) == ADC_CLK_DIV_1) || ((type) == ADC_CLK_DIV_4) || ((type) == ADC_CLK_DIV_8) || ((type) == ADC_CLK_DIV_12) || ((type) == ADC_CLK_DIV_16) || ((type) == ADC_CLK_DIV_20) \
|| ((type) == ADC_CLK_DIV_24) || ((type) == ADC_CLK_DIV_32))
/** @defgroup ADC_DELAY_SEL_TYPE
* @{
*/
#define IS_ADC_DELAY_SEL_TYPE(type) (((type) == ADC_DELAY_SEL_0) || \
((type) == ADC_DELAY_SEL_1) || \
((type) == ADC_DELAY_SEL_2) || \
((type) == ADC_DELAY_SEL_3) || \
((type) == ADC_DELAY_SEL_4) || \
((type) == ADC_DELAY_SEL_5) || \
((type) == ADC_DELAY_SEL_6) || \
((type) == ADC_DELAY_SEL_7))
#define IS_ADC_DELAY_SEL_TYPE(type) \
(((type) == ADC_DELAY_SEL_0) || ((type) == ADC_DELAY_SEL_1) || ((type) == ADC_DELAY_SEL_2) || ((type) == ADC_DELAY_SEL_3) || ((type) == ADC_DELAY_SEL_4) || ((type) == ADC_DELAY_SEL_5) \
|| ((type) == ADC_DELAY_SEL_6) || ((type) == ADC_DELAY_SEL_7))
/** @defgroup ADC_PGA_GAIN_TYPE
* @{
*/
#define IS_ADC_PGA_GAIN_TYPE(type) (((type) == ADC_PGA_GAIN_NONE) || \
((type) == ADC_PGA_GAIN_1) || \
((type) == ADC_PGA_GAIN_2) || \
((type) == ADC_PGA_GAIN_4) || \
((type) == ADC_PGA_GAIN_8) || \
((type) == ADC_PGA_GAIN_16) || \
((type) == ADC_PGA_GAIN_32))
#define IS_ADC_PGA_GAIN_TYPE(type) \
(((type) == ADC_PGA_GAIN_NONE) || ((type) == ADC_PGA_GAIN_1) || ((type) == ADC_PGA_GAIN_2) || ((type) == ADC_PGA_GAIN_4) || ((type) == ADC_PGA_GAIN_8) || ((type) == ADC_PGA_GAIN_16) \
|| ((type) == ADC_PGA_GAIN_32))
/** @defgroup ADC_BIAS_SEL_TYPE
* @{
*/
#define IS_ADC_BIAS_SEL_TYPE(type) (((type) == ADC_BIAS_SEL_MAIN_BANDGAP) || \
((type) == ADC_BIAS_SEL_AON_BANDGAP))
#define IS_ADC_BIAS_SEL_TYPE(type) (((type) == ADC_BIAS_SEL_MAIN_BANDGAP) || ((type) == ADC_BIAS_SEL_AON_BANDGAP))
/** @defgroup ADC_CHOP_MOD_TYPE
* @{
*/
#define IS_ADC_CHOP_MOD_TYPE(type) (((type) == ADC_CHOP_MOD_ALL_OFF) || \
((type) == ADC_CHOP_MOD_AZ_ON) || \
((type) == ADC_CHOP_MOD_AZ_PGA_ON) || \
((type) == ADC_CHOP_MOD_AZ_PGA_RPC_ON))
#define IS_ADC_CHOP_MOD_TYPE(type) (((type) == ADC_CHOP_MOD_ALL_OFF) || ((type) == ADC_CHOP_MOD_AZ_ON) || ((type) == ADC_CHOP_MOD_AZ_PGA_ON) || ((type) == ADC_CHOP_MOD_AZ_PGA_RPC_ON))
/** @defgroup ADC_PGA_VCM_TYPE
* @{
*/
#define IS_ADC_PGA_VCM_TYPE(type) (((type) == ADC_PGA_VCM_1V) || \
((type) == ADC_PGA_VCM_1P2V) || \
((type) == ADC_PGA_VCM_1P4V) || \
((type) == ADC_PGA_VCM_1P6V))
#define IS_ADC_PGA_VCM_TYPE(type) (((type) == ADC_PGA_VCM_1V) || ((type) == ADC_PGA_VCM_1P2V) || ((type) == ADC_PGA_VCM_1P4V) || ((type) == ADC_PGA_VCM_1P6V))
/** @defgroup ADC_TSEN_MOD_TYPE
* @{
*/
#define IS_ADC_TSEN_MOD_TYPE(type) (((type) == ADC_TSEN_MOD_INTERNAL_DIODE) || \
((type) == ADC_TSEN_MOD_EXTERNAL_DIODE))
#define IS_ADC_TSEN_MOD_TYPE(type) (((type) == ADC_TSEN_MOD_INTERNAL_DIODE) || ((type) == ADC_TSEN_MOD_EXTERNAL_DIODE))
/** @defgroup ADC_VREF_TYPE
* @{
*/
#define IS_ADC_VREF_TYPE(type) (((type) == ADC_VREF_3P3V) || \
((type) == ADC_VREF_2V))
#define IS_ADC_VREF_TYPE(type) (((type) == ADC_VREF_3P3V) || ((type) == ADC_VREF_2V))
/** @defgroup ADC_SIG_INPUT_TYPE
* @{
*/
#define IS_ADC_SIG_INPUT_TYPE(type) (((type) == ADC_INPUT_SINGLE_END) || \
((type) == ADC_INPUT_DIFF))
#define IS_ADC_SIG_INPUT_TYPE(type) (((type) == ADC_INPUT_SINGLE_END) || ((type) == ADC_INPUT_DIFF))
/** @defgroup ADC_DATA_WIDTH_TYPE
* @{
*/
#define IS_ADC_DATA_WIDTH_TYPE(type) (((type) == ADC_DATA_WIDTH_12) || \
((type) == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || \
((type) == ADC_DATA_WIDTH_14_WITH_64_AVERAGE) || \
((type) == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || \
((type) == ADC_DATA_WIDTH_16_WITH_256_AVERAGE))
#define IS_ADC_DATA_WIDTH_TYPE(type) \
(((type) == ADC_DATA_WIDTH_12) || ((type) == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || ((type) == ADC_DATA_WIDTH_14_WITH_64_AVERAGE) || ((type) == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) \
|| ((type) == ADC_DATA_WIDTH_16_WITH_256_AVERAGE))
/** @defgroup ADC_MICBOOST_DB_TYPE
* @{
*/
#define IS_ADC_MICBOOST_DB_TYPE(type) (((type) == ADC_MICBOOST_DB_16DB) || \
((type) == ADC_MICBOOST_DB_32DB))
#define IS_ADC_MICBOOST_DB_TYPE(type) (((type) == ADC_MICBOOST_DB_16DB) || ((type) == ADC_MICBOOST_DB_32DB))
/** @defgroup ADC_PGA2_GAIN_TYPE
* @{
*/
#define IS_ADC_PGA2_GAIN_TYPE(type) (((type) == ADC_PGA2_GAIN_0DB) || \
((type) == ADC_PGA2_GAIN_6DB) || \
((type) == ADC_PGA2_GAIN_N6DB) || \
((type) == ADC_PGA2_GAIN_12DB))
#define IS_ADC_PGA2_GAIN_TYPE(type) (((type) == ADC_PGA2_GAIN_0DB) || ((type) == ADC_PGA2_GAIN_6DB) || ((type) == ADC_PGA2_GAIN_N6DB) || ((type) == ADC_PGA2_GAIN_12DB))
/** @defgroup ADC_MIC_MODE_TYPE
* @{
*/
#define IS_ADC_MIC_MODE_TYPE(type) (((type) == ADC_MIC_MODE_SINGLE) || \
((type) == ADC_MIC_MODE_DIFF))
#define IS_ADC_MIC_MODE_TYPE(type) (((type) == ADC_MIC_MODE_SINGLE) || ((type) == ADC_MIC_MODE_DIFF))
/** @defgroup ADC_FIFO_THRESHOLD_TYPE
* @{
*/
#define IS_ADC_FIFO_THRESHOLD_TYPE(type) (((type) == ADC_FIFO_THRESHOLD_1) || \
((type) == ADC_FIFO_THRESHOLD_4) || \
((type) == ADC_FIFO_THRESHOLD_8) || \
((type) == ADC_FIFO_THRESHOLD_16))
#define IS_ADC_FIFO_THRESHOLD_TYPE(type) (((type) == ADC_FIFO_THRESHOLD_1) || ((type) == ADC_FIFO_THRESHOLD_4) || ((type) == ADC_FIFO_THRESHOLD_8) || ((type) == ADC_FIFO_THRESHOLD_16))
/** @defgroup ADC_INT_TYPE
* @{
*/
#define IS_ADC_INT_TYPE(type) (((type) == ADC_INT_POS_SATURATION) || \
((type) == ADC_INT_NEG_SATURATION) || \
((type) == ADC_INT_FIFO_UNDERRUN) || \
((type) == ADC_INT_FIFO_OVERRUN) || \
((type) == ADC_INT_ADC_READY) || \
((type) == ADC_INT_FIFO_READY) || \
((type) == ADC_INT_ALL))
#define IS_ADC_INT_TYPE(type) \
(((type) == ADC_INT_POS_SATURATION) || ((type) == ADC_INT_NEG_SATURATION) || ((type) == ADC_INT_FIFO_UNDERRUN) || ((type) == ADC_INT_FIFO_OVERRUN) || ((type) == ADC_INT_ADC_READY) \
|| ((type) == ADC_INT_FIFO_READY) || ((type) == ADC_INT_ALL))
/*@} end of group ADC_Public_Constants */
@@ -514,7 +447,7 @@ void ADC_Enable(void);
void ADC_Disable(void);
void ADC_Init(ADC_CFG_Type *cfg);
void ADC_Channel_Config(ADC_Chan_Type posCh, ADC_Chan_Type negCh, BL_Fun_Type contEn);
void ADC_Scan_Channel_Config(ADC_Chan_Type posChList[], ADC_Chan_Type negChList[], uint8_t scanLength, BL_Fun_Type contEn);
void ADC_Scan_Channel_Config(const ADC_Chan_Type posChList[], const ADC_Chan_Type negChList[], uint8_t scanLength, BL_Fun_Type contEn);
void ADC_Start(void);
void ADC_Stop(void);
void ADC_FIFO_Cfg(ADC_FIFO_Cfg_Type *fifoCfg);

120
source/Core/BSP/Magic/bl_mcu_sdk/drivers/bl702_driver/std_drv/src/bl702_adc.c
View File

@@ -113,8 +113,7 @@ static ADC_Gain_Coeff_Type adcGainCoeffCal = {
* @return None
*
*******************************************************************************/
void ADC_Reset(void)
{
void ADC_Reset(void) {
uint32_t regCmd;
/* reset ADC */
@@ -132,8 +131,7 @@ void ADC_Reset(void)
* @return None
*
*******************************************************************************/
void ADC_Enable(void)
{
void ADC_Enable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
@@ -149,8 +147,7 @@ void ADC_Enable(void)
* @return None
*
*******************************************************************************/
void ADC_Disable(void)
{
void ADC_Disable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
@@ -166,8 +163,7 @@ void ADC_Disable(void)
* @return None
*
*******************************************************************************/
void ADC_Init(ADC_CFG_Type *cfg)
{
void ADC_Init(ADC_CFG_Type *cfg) {
uint32_t regCfg1;
uint32_t regCfg2;
uint32_t regCalib;
@@ -244,8 +240,7 @@ void ADC_Init(ADC_CFG_Type *cfg)
* @return None
*
*******************************************************************************/
void ADC_Channel_Config(ADC_Chan_Type posCh, ADC_Chan_Type negCh, BL_Fun_Type contEn)
{
void ADC_Channel_Config(ADC_Chan_Type posCh, ADC_Chan_Type negCh, BL_Fun_Type contEn) {
uint32_t regCmd;
uint32_t regCfg1;
@@ -276,8 +271,7 @@ void ADC_Channel_Config(ADC_Chan_Type posCh, ADC_Chan_Type negCh, BL_Fun_Type co
* @return None
*
*******************************************************************************/
void ADC_Scan_Channel_Config(ADC_Chan_Type posChList[], ADC_Chan_Type negChList[], uint8_t scanLength, BL_Fun_Type contEn)
{
void ADC_Scan_Channel_Config(const ADC_Chan_Type posChList[], const ADC_Chan_Type negChList[], uint8_t scanLength, BL_Fun_Type contEn) {
uint32_t tmpVal, i;
uint32_t dealLen;
@@ -347,8 +341,7 @@ void ADC_Scan_Channel_Config(ADC_Chan_Type posChList[], ADC_Chan_Type negChList[
* @return None
*
*******************************************************************************/
void ADC_Start(void)
{
void ADC_Start(void) {
uint32_t regCmd;
/* disable convert start */
@@ -372,8 +365,7 @@ void ADC_Start(void)
* @return None
*
*******************************************************************************/
void ADC_Stop(void)
{
void ADC_Stop(void) {
uint32_t regCmd;
/* disable convert start */
@@ -390,8 +382,7 @@ void ADC_Stop(void)
* @return None
*
*******************************************************************************/
void ADC_FIFO_Cfg(ADC_FIFO_Cfg_Type *fifoCfg)
{
void ADC_FIFO_Cfg(ADC_FIFO_Cfg_Type *fifoCfg) {
uint32_t tmpVal;
/* Check the parameters */
@@ -424,8 +415,7 @@ void ADC_FIFO_Cfg(ADC_FIFO_Cfg_Type *fifoCfg)
* @return data count in FIFO
*
*******************************************************************************/
uint8_t ADC_Get_FIFO_Count(void)
{
uint8_t ADC_Get_FIFO_Count(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
@@ -441,8 +431,7 @@ uint8_t ADC_Get_FIFO_Count(void)
* @return SET or RESET
*
*******************************************************************************/
BL_Sts_Type ADC_FIFO_Is_Full(void)
{
BL_Sts_Type ADC_FIFO_Is_Full(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
@@ -462,8 +451,7 @@ BL_Sts_Type ADC_FIFO_Is_Full(void)
* @return SET or RESET
*
*******************************************************************************/
BL_Sts_Type ADC_FIFO_Is_Empty(void)
{
BL_Sts_Type ADC_FIFO_Is_Empty(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
@@ -483,8 +471,7 @@ BL_Sts_Type ADC_FIFO_Is_Empty(void)
* @return ADC result if return 0 that means this is error data,user should ignore this data.
*
*******************************************************************************/
uint32_t ADC_Read_FIFO(void)
{
uint32_t ADC_Read_FIFO(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_DMA_RDATA);
@@ -502,8 +489,7 @@ uint32_t ADC_Read_FIFO(void)
* @return None
*
*******************************************************************************/
void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result)
{
void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result) {
uint8_t neg = 0;
uint32_t tmpVal1 = 0, tmpVal2 = 0;
ADC_Data_Width_Type dataType;
@@ -534,12 +520,10 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result)
if (dataType == ADC_DATA_WIDTH_12) {
result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 4) / coe);
result[i].volt = result[i].value / 4096.0 * ref;
} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) ||
(dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || (dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 2) / coe);
result[i].volt = result[i].value / 16384.0 * ref;
} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) ||
(dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || (dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
result[i].value = (unsigned int)((orgVal[i] & 0xffff) / coe);
result[i].volt = result[i].value / 65536.0 * ref;
}
@@ -559,12 +543,10 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result)
if (dataType == ADC_DATA_WIDTH_12) {
result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 4) / coe);
result[i].volt = result[i].value / 2048.0 * ref;
} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) ||
(dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || (dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 2) / coe);
result[i].volt = result[i].value / 8192.0 * ref;
} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) ||
(dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || (dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
result[i].value = (unsigned int)((orgVal[i] & 0xffff) / coe);
result[i].volt = result[i].value / 32768.0 * ref;
}
@@ -585,8 +567,7 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result)
* @return None
*
*******************************************************************************/
BL_Mask_Type ADC_IntGetMask(ADC_INT_Type intType)
{
BL_Mask_Type ADC_IntGetMask(ADC_INT_Type intType) {
uint32_t tmpVal;
/* Check the parameters */
@@ -638,8 +619,7 @@ BL_Mask_Type ADC_IntGetMask(ADC_INT_Type intType)
* @return None
*
*******************************************************************************/
void ADC_IntMask(ADC_INT_Type intType, BL_Mask_Type intMask)
{
void ADC_IntMask(ADC_INT_Type intType, BL_Mask_Type intMask) {
uint32_t tmpVal;
/* Check the parameters */
@@ -773,8 +753,7 @@ void ADC_IntMask(ADC_INT_Type intType, BL_Mask_Type intMask)
* @return None
*
*******************************************************************************/
void ADC_IntClr(ADC_INT_Type intType)
{
void ADC_IntClr(ADC_INT_Type intType) {
uint32_t tmpVal;
/* Check the parameters */
@@ -920,8 +899,7 @@ void ADC_IntClr(ADC_INT_Type intType)
* @return SET or RESET
*
*******************************************************************************/
BL_Sts_Type ADC_GetIntStatus(ADC_INT_Type intType)
{
BL_Sts_Type ADC_GetIntStatus(ADC_INT_Type intType) {
uint32_t tmpVal;
BL_Sts_Type bitStatus = RESET;
@@ -978,8 +956,7 @@ BL_Sts_Type ADC_GetIntStatus(ADC_INT_Type intType)
* @return None
*
*******************************************************************************/
void ADC_Int_Callback_Install(ADC_INT_Type intType, intCallback_Type *cbFun)
{
void ADC_Int_Callback_Install(ADC_INT_Type intType, intCallback_Type *cbFun) {
/* Check the parameters */
CHECK_PARAM(IS_GPIP_ADC_INT_TYPE(intType));
@@ -995,8 +972,7 @@ void ADC_Int_Callback_Install(ADC_INT_Type intType, intCallback_Type *cbFun)
*
*******************************************************************************/
#ifndef BFLB_USE_HAL_DRIVER
void GPADC_DMA_IRQHandler(void)
{
void GPADC_DMA_IRQHandler(void) {
if (ADC_GetIntStatus(ADC_INT_POS_SATURATION) == SET) {
ADC_IntClr(ADC_INT_POS_SATURATION);
@@ -1055,8 +1031,7 @@ void GPADC_DMA_IRQHandler(void)
* @return None
*
*******************************************************************************/
void ADC_Vbat_Enable(void)
{
void ADC_Vbat_Enable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
@@ -1072,8 +1047,7 @@ void ADC_Vbat_Enable(void)
* @return None
*
*******************************************************************************/
void ADC_Vbat_Disable(void)
{
void ADC_Vbat_Disable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
@@ -1089,8 +1063,7 @@ void ADC_Vbat_Disable(void)
* @return None
*
*******************************************************************************/
void ADC_Tsen_Init(ADC_TSEN_MOD_Type tsenMod)
{
void ADC_Tsen_Init(ADC_TSEN_MOD_Type tsenMod) {
uint32_t tmpVal;
CHECK_PARAM(IS_AON_ADC_TSEN_MOD_TYPE(type));
@@ -1151,8 +1124,7 @@ void ADC_Tsen_Init(ADC_TSEN_MOD_Type tsenMod)
* @return None
*
*******************************************************************************/
void ADC_Tsen_Enable(void)
{
void ADC_Tsen_Enable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
@@ -1166,8 +1138,7 @@ void ADC_Tsen_Enable(void)
* @return None
*
*******************************************************************************/
void ADC_Tsen_Disable(void)
{
void ADC_Tsen_Disable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
@@ -1181,8 +1152,7 @@ void ADC_Tsen_Disable(void)
* @return None
*
*******************************************************************************/
void ADC_FIFO_Clear(void)
{
void ADC_FIFO_Clear(void) {
uint32_t tmpVal;
/* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
@@ -1199,8 +1169,7 @@ void ADC_FIFO_Clear(void)
* @return None
*
*******************************************************************************/
void ADC_PGA_Config(uint8_t pga_vcmi_enable, uint8_t pga_os_cal)
{
void ADC_PGA_Config(uint8_t pga_vcmi_enable, uint8_t pga_os_cal) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
@@ -1223,8 +1192,7 @@ void ADC_PGA_Config(uint8_t pga_vcmi_enable, uint8_t pga_os_cal)
* @return None
*
*******************************************************************************/
uint32_t TSEN_Get_V_Error(void)
{
uint32_t TSEN_Get_V_Error(void) {
uint32_t v0 = 0, v1 = 0;
uint32_t v_error = 0;
uint32_t regVal = 0;
@@ -1283,8 +1251,7 @@ uint32_t TSEN_Get_V_Error(void)
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type ATTR_CLOCK_SECTION ADC_Trim_TSEN(uint16_t *tsen_offset)
{
BL_Err_Type ATTR_CLOCK_SECTION ADC_Trim_TSEN(uint16_t *tsen_offset) {
Efuse_TSEN_Refcode_Corner_Type trim;
EF_Ctrl_Read_TSEN_Trim(&trim);
@@ -1307,8 +1274,7 @@ BL_Err_Type ATTR_CLOCK_SECTION ADC_Trim_TSEN(uint16_t *tsen_offset)
* @return None
*
*******************************************************************************/
void ADC_SET_TSVBE_LOW(void)
{
void ADC_SET_TSVBE_LOW(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
tmpVal = BL_CLR_REG_BIT(tmpVal, AON_GPADC_TSVBE_LOW);
@@ -1323,8 +1289,7 @@ void ADC_SET_TSVBE_LOW(void)
* @return None
*
*******************************************************************************/
void ADC_SET_TSVBE_HIGH(void)
{
void ADC_SET_TSVBE_HIGH(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
tmpVal = BL_SET_REG_BIT(tmpVal, AON_GPADC_TSVBE_LOW);
@@ -1339,8 +1304,7 @@ void ADC_SET_TSVBE_HIGH(void)
* @return tempture
*
*******************************************************************************/
float TSEN_Get_Temp(uint32_t tsen_offset)
{
float TSEN_Get_Temp(uint32_t tsen_offset) {
uint32_t v0 = 0, v1 = 0;
float temp = 0;
uint32_t regVal = 0;
@@ -1404,8 +1368,7 @@ float TSEN_Get_Temp(uint32_t tsen_offset)
* @return success or not
*
*******************************************************************************/
BL_Err_Type ADC_Mic_Init(ADC_MIC_Type *adc_mic_config)
{
BL_Err_Type ADC_Mic_Init(ADC_MIC_Type *adc_mic_config) {
uint32_t tmpVal1 = 0, tmpVal2 = 0;
CHECK_PARAM(IS_ADC_MICBOOST_DB_Type(adc_mic_config->micboostDb));
@@ -1449,8 +1412,7 @@ BL_Err_Type ADC_Mic_Init(ADC_MIC_Type *adc_mic_config)
* @return None
*
*******************************************************************************/
void ADC_MIC_Bias_Enable(void)
{
void ADC_MIC_Bias_Enable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
@@ -1466,8 +1428,7 @@ void ADC_MIC_Bias_Enable(void)
* @return None
*
*******************************************************************************/
void ADC_MIC_Bias_Disable(void)
{
void ADC_MIC_Bias_Disable(void) {
uint32_t tmpVal;
tmpVal = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
@@ -1483,8 +1444,7 @@ void ADC_MIC_Bias_Disable(void)
* @return SUCCESS or ERROR
*
*******************************************************************************/
BL_Err_Type ATTR_CLOCK_SECTION ADC_Gain_Trim(void)
{
BL_Err_Type ATTR_CLOCK_SECTION ADC_Gain_Trim(void) {
Efuse_ADC_Gain_Coeff_Type trim;
uint32_t tmp;