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Fix heater drive

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Needed to enable the AFIO clock for the disabling reset to work.
This commit is contained in:
Ben V. Brown
2016-09-16 21:52:28 +10:00
parent 252c98372d
commit 96bda69a0a
3 changed files with 10 additions and 8 deletions
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8
workspace/ts100/.cproject
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@@ -30,10 +30,10 @@
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1
workspace/ts100/.gitignore vendored Normal file
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@@ -0,0 +1 @@
/Debug/

9
workspace/ts100/src/Bios.c
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@@ -8,13 +8,11 @@
2015/07/07 ͳһ<CDB3><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*******************************************************************************/
#include <Hardware.h>
#include "APP_Version.h"
#include "Bios.h"
#include "I2C.h"
#include "CTRL.h"
#include <Hardware.h>
/******************************************************************************/
#define ADC1_DR_Address ((u32)0x4001244C)
@@ -137,6 +135,10 @@ void NVIC_Config(u16 tab_offset) {
*******************************************************************************/
void GPIO_Config(void) {
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); // GPIOB & AFIO
GPIO_PinRemapConfig(GPIO_Remap_SWJ_NoJTRST, ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
GPIOA_OUTPUT()
;
@@ -164,7 +166,6 @@ void GPIO_Config(void) {
GPIO_Init(GPIOA, &GPIO_InitStructure);
//------- Heat_Pin - Iron enable output PB4--------------------------------------------------------//
GPIO_PinRemapConfig(GPIO_Remap_SWJ_NoJTRST, ENABLE); //Disable PB4=JNTRST
GPIO_InitStructure.GPIO_Pin = HEAT_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;