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Tuning in ADC

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This commit is contained in:
Ben V. Brown
2022-04-21 18:25:14 +10:00
parent 82a8eb5a2c
commit 8ea1edf7a7
3 changed files with 5 additions and 5 deletions
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4
source/Core/BSP/Magic/BSP.cpp
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@@ -12,8 +12,8 @@
// These control the period's of time used for the PWM // These control the period's of time used for the PWM
const uint16_t powerPWM = 255; const uint16_t powerPWM = 255;
const uint8_t holdoffTicks = 14; const uint8_t holdoffTicks = 3; // This is the tick delay
const uint8_t tempMeasureTicks = 10; const uint8_t tempMeasureTicks = 4;
uint16_t totalPWM = 255; // Total length of the cycle's ticks uint16_t totalPWM = 255; // Total length of the cycle's ticks

4
source/Core/BSP/Magic/IRQ.cpp
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@@ -108,7 +108,7 @@ void switchToFastPWM(void) {
uint32_t tmpVal = BL_RD_REG(TIMER_BASE, TIMER_TCDR); uint32_t tmpVal = BL_RD_REG(TIMER_BASE, TIMER_TCDR);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TIMER_TCDR2, 20); tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TIMER_TCDR2, 11);
BL_WR_REG(TIMER_BASE, TIMER_TCDR, tmpVal); BL_WR_REG(TIMER_BASE, TIMER_TCDR, tmpVal);
} }
@@ -126,7 +126,7 @@ void switchToSlowPWM(void) {
uint32_t tmpVal = BL_RD_REG(TIMER_BASE, TIMER_TCDR); uint32_t tmpVal = BL_RD_REG(TIMER_BASE, TIMER_TCDR);
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TIMER_TCDR2, 40); tmpVal = BL_SET_REG_BITS_VAL(tmpVal, TIMER_TCDR2, 22);
BL_WR_REG(TIMER_BASE, TIMER_TCDR, tmpVal); BL_WR_REG(TIMER_BASE, TIMER_TCDR, tmpVal);
} }

2
source/Core/BSP/Magic/Setup.cpp
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@@ -86,7 +86,7 @@ void setup_adc(void) {
ADC_Reset(); ADC_Reset();
ADC_Init(&adc_cfg); ADC_Init(&adc_cfg);
adc_fifo_cfg.dmaEn = DISABLE; adc_fifo_cfg.dmaEn = DISABLE;
adc_fifo_cfg.fifoThreshold = ADC_FIFO_THRESHOLD_8; adc_fifo_cfg.fifoThreshold = ADC_FIFO_THRESHOLD_4;
ADC_FIFO_Cfg(&adc_fifo_cfg); ADC_FIFO_Cfg(&adc_fifo_cfg);
ADC_MIC_Bias_Disable(); ADC_MIC_Bias_Disable();