Merge pull request #891 from Ralim/enable-more-compiler-warnings

Enable more compiler warnings
This commit is contained in:
Ben V. Brown
2021-03-18 23:04:52 +11:00
committed by GitHub
9 changed files with 65 additions and 441 deletions

View File

@@ -3,7 +3,51 @@ name: CI
on: [push, pull_request]
jobs:
build_TS80:
build:
runs-on: ubuntu-20.04
strategy:
matrix:
model: ["TS100", "TS80", "TS80P", "Pinecil"]
steps:
- uses: actions/checkout@v2
- name: chmod
run: chmod +x setup.sh && chmod +x source/build.sh && sudo mkdir -p /build/cache && sudo chmod -R 777 /build
- name: Cached compiler source files
uses: actions/cache@v2.1.4
env:
cache-name: cache-compilers
with:
path: /build/cache
key: ${{ runner.os }}-build-${{ env.cache-name }}
restore-keys: |
${{ runner.os }}-
- name: setup
run: ./setup.sh
- name: build ${{ matrix.model }}
run: cd source && ./build.sh -m ${{ matrix.model }}
- name: copy license text
run: |
cp LICENSE source/Hexfile/LICENSE
cp LICENSE_RELEASE.md source/Hexfile/LICENSE_RELEASE.md
- name: Archive ${{ matrix.model }} artifacts
uses: actions/upload-artifact@v2
with:
name: ${{ matrix.model }}
path: |
source/Hexfile/${{ matrix.model }}_*.hex
source/Hexfile/${{ matrix.model }}_*.bin
source/Hexfile/LICENSE
source/Hexfile/LICENSE_RELEASE.md
if-no-files-found: error
check_formatting:
runs-on: ubuntu-20.04
steps:
@@ -26,145 +70,5 @@ jobs:
- name: setup
run: ./setup.sh
- name: build TS80
run: cd source && ./build.sh -m TS80
- name: copy license text
run: |
cp LICENSE source/Hexfile/LICENSE
cp LICENSE_RELEASE.md source/Hexfile/LICENSE_RELEASE.md
- name: Archive TS80 artifacts
uses: actions/upload-artifact@v2
with:
name: TS80
path: |
source/Hexfile/TS80_*.hex
source/Hexfile/TS80_*.bin
source/Hexfile/LICENSE
source/Hexfile/LICENSE_RELEASE.md
if-no-files-found: error
build_TS80P:
runs-on: ubuntu-20.04
steps:
- uses: actions/checkout@v2
- name: chmod
run: chmod +x setup.sh && chmod +x source/build.sh && sudo mkdir -p /build/cache && sudo chmod -R 777 /build
- name: Cached compiler source files
uses: actions/cache@v2.1.4
env:
cache-name: cache-compilers
with:
# we deliberately persist a cache folder forwards
path: /build/cache
key: ${{ runner.os }}-build-${{ env.cache-name }}
restore-keys: |
${{ runner.os }}-
- name: setup
run: ./setup.sh
- name: build TS80P
run: cd source && ./build.sh -m TS80P
- name: copy license text
run: |
cp LICENSE source/Hexfile/LICENSE
cp LICENSE_RELEASE.md source/Hexfile/LICENSE_RELEASE.md
- name: Archive TS80P artifacts
uses: actions/upload-artifact@v2
with:
name: TS80P
path: |
source/Hexfile/TS80P_*.hex
source/Hexfile/TS80P_*.bin
source/Hexfile/LICENSE
source/Hexfile/LICENSE_RELEASE.md
if-no-files-found: error
build_TS100:
runs-on: ubuntu-20.04
steps:
- uses: actions/checkout@v2
- name: chmod
run: chmod +x setup.sh && chmod +x source/build.sh && sudo mkdir -p /build/cache && sudo chmod -R 777 /build
- name: Cached compiler source files
uses: actions/cache@v2.1.4
env:
cache-name: cache-compilers
with:
# we deliberately persist a cache folder forwards
path: /build/cache
key: ${{ runner.os }}-build-${{ env.cache-name }}
restore-keys: |
${{ runner.os }}-
- name: setup
run: ./setup.sh
- name: build TS100
run: cd source && ./build.sh -m TS100
- name: copy license text
run: |
cp LICENSE source/Hexfile/LICENSE
cp LICENSE_RELEASE.md source/Hexfile/LICENSE_RELEASE.md
- name: Archive TS100 artifacts
uses: actions/upload-artifact@v2
with:
name: TS100
path: |
source/Hexfile/TS100_*.hex
source/Hexfile/TS100_*.bin
source/Hexfile/LICENSE
source/Hexfile/LICENSE_RELEASE.md
if-no-files-found: error
build_Pinecil:
runs-on: ubuntu-20.04
steps:
- uses: actions/checkout@v2
- name: chmod
run: chmod +x setup.sh && chmod +x source/build.sh && sudo mkdir -p /build/cache && sudo chmod -R 777 /build
- name: Cached compiler source files
uses: actions/cache@v2.1.4
env:
cache-name: cache-compilers
with:
# we deliberately persist a cache folder forwards
path: /build/cache
key: ${{ runner.os }}-build-${{ env.cache-name }}
restore-keys: |
${{ runner.os }}-
- name: setup
run: ./setup.sh
- name: build Pinecil
run: cd source && ./build.sh -m Pinecil
- name: copy license text
run: |
cp LICENSE source/Hexfile/LICENSE
cp LICENSE_RELEASE.md source/Hexfile/LICENSE_RELEASE.md
- name: Archive Pinecil artifacts
uses: actions/upload-artifact@v2
with:
name: Pinecil
path: |
source/Hexfile/Pinecil_*.hex
source/Hexfile/Pinecil_*.bin
source/Hexfile/LICENSE
source/Hexfile/LICENSE_RELEASE.md
if-no-files-found: error
- name: Check formatting with clang-format
run: cd source && make clean && make check-style

View File

@@ -312,13 +312,6 @@ static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
/**
* @}
*/
@@ -3206,7 +3199,6 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) {
tmp4 = hi2c->PreviousState;
if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U)
&& ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX)))) {
I2C_Slave_AF(hi2c);
} else {
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
@@ -3870,249 +3862,6 @@ static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c) {
return HAL_OK;
}
/**
* @brief Handle TXE flag for Slave
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) {
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
uint32_t CurrentState = hi2c->State;
if (hi2c->XferCount != 0U) {
/* Write data to DR */
hi2c->Instance->DR = (*hi2c->pBuffPtr++);
hi2c->XferCount--;
if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) {
/* Last Byte is received, disable Interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
/* Set state at HAL_I2C_STATE_LISTEN */
hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
hi2c->State = HAL_I2C_STATE_LISTEN;
/* Call the Tx complete callback to inform upper layer of the end of receive process */
HAL_I2C_SlaveTxCpltCallback(hi2c);
}
}
return HAL_OK;
}
/**
* @brief Handle BTF flag for Slave transmitter
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) {
if (hi2c->XferCount != 0U) {
/* Write data to DR */
hi2c->Instance->DR = (*hi2c->pBuffPtr++);
hi2c->XferCount--;
}
return HAL_OK;
}
/**
* @brief Handle RXNE flag for Slave
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) {
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
uint32_t CurrentState = hi2c->State;
if (hi2c->XferCount != 0U) {
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)) {
/* Last Byte is received, disable Interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
/* Set state at HAL_I2C_STATE_LISTEN */
hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
hi2c->State = HAL_I2C_STATE_LISTEN;
/* Call the Rx complete callback to inform upper layer of the end of receive process */
HAL_I2C_SlaveRxCpltCallback(hi2c);
}
}
return HAL_OK;
}
/**
* @brief Handle BTF flag for Slave receiver
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) {
if (hi2c->XferCount != 0U) {
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
}
return HAL_OK;
}
/**
* @brief Handle ADD flag for Slave
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) {
uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
uint16_t SlaveAddrCode = 0U;
/* Transfer Direction requested by Master */
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET) {
TransferDirection = I2C_DIRECTION_TRANSMIT;
}
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET) {
SlaveAddrCode = hi2c->Init.OwnAddress1;
} else {
SlaveAddrCode = hi2c->Init.OwnAddress2;
}
/* Call Slave Addr callback */
HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
return HAL_OK;
}
/**
* @brief Handle STOPF flag for Slave
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) {
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
uint32_t CurrentState = hi2c->State;
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Clear STOPF flag */
__HAL_I2C_CLEAR_STOPFLAG(hi2c);
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
/* If a DMA is ongoing, Update handle size context */
if ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN) {
if ((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) {
hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
} else {
hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
}
}
/* All data are not transferred, so set error code accordingly */
if (hi2c->XferCount != 0U) {
/* Store Last receive data if any */
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) {
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
}
/* Store Last receive data if any */
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) {
/* Read data from DR */
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
}
/* Set ErrorCode corresponding to a Non-Acknowledge */
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
}
if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) {
/* Call the corresponding callback to inform upper layer of End of Transfer */
I2C_ITError(hi2c);
} else {
if ((CurrentState == HAL_I2C_STATE_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN)) {
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
HAL_I2C_ListenCpltCallback(hi2c);
} else {
if ((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX)) {
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
HAL_I2C_SlaveRxCpltCallback(hi2c);
}
}
}
return HAL_OK;
}
/**
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for I2C module
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) {
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
uint32_t CurrentState = hi2c->State;
uint32_t CurrentXferOptions = hi2c->XferOptions;
if (((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && (CurrentState == HAL_I2C_STATE_LISTEN)) {
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Clear AF flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
HAL_I2C_ListenCpltCallback(hi2c);
} else if (CurrentState == HAL_I2C_STATE_BUSY_TX) {
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
hi2c->State = HAL_I2C_STATE_READY;
hi2c->Mode = HAL_I2C_MODE_NONE;
/* Disable EVT, BUF and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
/* Clear AF flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
HAL_I2C_SlaveTxCpltCallback(hi2c);
} else {
/* Clear AF flag only */
/* State Listen, but XferOptions == FIRST or NEXT */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
}
return HAL_OK;
}
/**
* @brief I2C interrupts error process
* @param hi2c I2C handle.

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@@ -119,7 +119,6 @@
*/
/* Private function prototypes -----------------------------------------------*/
static void RCC_Delay(uint32_t mdelay);
/* Exported functions --------------------------------------------------------*/
@@ -1070,18 +1069,6 @@ void HAL_RCC_NMI_IRQHandler(void) {
}
}
/**
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay) {
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
do {
__NOP();
} while (Delay--);
}
/**
* @brief RCC Clock Security System interrupt callback
* @retval none

View File

@@ -154,7 +154,6 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
static void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource);
static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig);
@@ -4748,33 +4747,6 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
TIMx->CCER = tmpccer;
}
/**
* @brief Selects the Input Trigger source
* @param TIMx to select the TIM peripheral
* @param InputTriggerSource : The Input Trigger source.
* This parameter can be one of the following values:
* @arg TIM_TS_ITR0 : Internal Trigger 0
* @arg TIM_TS_ITR1 : Internal Trigger 1
* @arg TIM_TS_ITR2 : Internal Trigger 2
* @arg TIM_TS_ITR3 : Internal Trigger 3
* @arg TIM_TS_TI1F_ED : TI1 Edge Detector
* @arg TIM_TS_TI1FP1 : Filtered Timer Input 1
* @arg TIM_TS_TI2FP2 : Filtered Timer Input 2
* @arg TIM_TS_ETRF : External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource) {
uint32_t tmpsmcr = 0U;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1;
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
}
/**
* @brief Configures the TIMx External Trigger (ETR).
* @param TIMx to select the TIM peripheral

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@@ -45,8 +45,8 @@
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configUSE_TRACE_FACILITY 1
#define configUSE_STATS_FORMATTING_FUNCTIONS 1
#define configUSE_TRACE_FACILITY 0
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine related definitions. */
#define configUSE_CO_ROUTINES 0

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@@ -261,7 +261,7 @@ static uint32_t usbd_int_epout(usb_core_driver *udev) {
if (USB_USE_DMA == udev->bp.transfer_mode) {
__IO uint32_t eplen = udev->regs.er_out[ep_num]->DOEPLEN;
udev->dev.transc_out[ep_num].xfer_count = udev->dev.transc_out[ep_num].max_len - eplen & DEPLEN_TLEN;
udev->dev.transc_out[ep_num].xfer_count = udev->dev.transc_out[ep_num].max_len - (eplen & DEPLEN_TLEN);
}
/* inform upper layer: data ready */

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@@ -376,7 +376,7 @@ uint32_t usbh_int_pipe_in(usb_core_driver *pudev, uint32_t pp_num) {
usb_pp_halt(pudev, pp_num, HCHINTF_REQOVR, PIPE_REQOVR);
} else if (intr_pp & HCHINTF_TF) {
if (USB_USE_DMA == pudev->bp.transfer_mode) {
pudev->host.backup_xfercount[pp_num] = pp->xfer_len - pp_reg->HCHLEN & HCHLEN_TLEN;
pudev->host.backup_xfercount[pp_num] = pp->xfer_len - (pp_reg->HCHLEN & HCHLEN_TLEN);
}
pp->pp_status = PIPE_XF;

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@@ -567,6 +567,7 @@ void i2c_flag_clear(uint32_t i2c_periph, i2c_flag_enum flag) {
/* read I2C_STAT0 and then read I2C_STAT1 to clear ADDSEND */
temp = I2C_STAT0(i2c_periph);
temp = I2C_STAT1(i2c_periph);
(void)temp;
} else {
I2C_REG_VAL(i2c_periph, flag) &= ~BIT(I2C_BIT_POS(flag));
}
@@ -667,6 +668,7 @@ void i2c_interrupt_flag_clear(uint32_t i2c_periph, i2c_interrupt_flag_enum int_f
/* read I2C_STAT0 and then read I2C_STAT1 to clear ADDSEND */
temp = I2C_STAT0(i2c_periph);
temp = I2C_STAT1(i2c_periph);
(void)temp;
} else {
I2C_REG_VAL2(i2c_periph, int_flag) &= ~BIT(I2C_BIT_POS2(int_flag));
}

View File

@@ -216,7 +216,7 @@ CHECKOPTIONS= -Wall \
CHECKOPTIONS_C= -Wbad-function-cast
CHECKOPTIONS_C= $(CHECKOPTIONS) -Wbad-function-cast
CXXFLAGS=$(DEV_CXXFLAGS) \
@@ -227,7 +227,7 @@ CXXFLAGS=$(DEV_CXXFLAGS) \
-D${COMPILER} \
-MMD \
$(CHECKOPTIONS) \
-std=c++11 \
-std=c++14 \
$(OPTIM) \
-fno-common \
-ffreestanding \
@@ -336,6 +336,16 @@ style:
done
@echo "Done"
check-style:
@for src in $(ALL_SOURCE) $(ALL_INCLUDES) ; do \
var=`clang-format "$$src" | diff "$$src" - | wc -l` ; \
if [ $$var -ne 0 ] ; then \
echo "$$src does not respect the coding style (diff: $$var lines)" ; \
exit 1 ; \
fi ; \
done
@echo "Style check passed"
.PHONY: style all clean default
.SECONDARY: