mirror of
https://github.com/Ralim/IronOS.git
synced 2025-02-26 07:53:55 +00:00
Allow P64 i2c before rtos
This commit is contained in:
@@ -25,8 +25,7 @@ uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
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return temp;
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}
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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uint8_t *p_buffer, uint16_t number_of_byte) {
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address, uint8_t *p_buffer, uint16_t number_of_byte) {
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if (!lock())
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return false;
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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@@ -61,8 +60,7 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)
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&& (timeout < I2C_TIME_OUT )) {
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -83,8 +81,7 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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break;
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case I2C_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -104,15 +101,13 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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break;
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case I2C_CLEAR_ADDRESS_FLAG:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200)
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&& (timeout < I2C_TIME_OUT )) {
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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// Address NACK'd
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@@ -138,8 +133,7 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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case I2C_TRANSMIT_DATA:
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if (0 == in_rx_cycle) {
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -152,8 +146,7 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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in_rx_cycle = 0;
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}
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/* wait until BTC bit is set */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -239,8 +232,7 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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return true;
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}
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bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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uint8_t *p_buffer, uint16_t number_of_byte) {
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bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *p_buffer, uint16_t number_of_byte) {
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if (!lock())
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return false;
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@@ -257,8 +249,7 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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switch (state) {
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case I2C_START:
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)
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&& (timeout < I2C_TIME_OUT )) {
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -273,8 +264,7 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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break;
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case I2C_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -290,15 +280,13 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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break;
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case I2C_CLEAR_ADDRESS_FLAG:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200)
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&& (timeout < I2C_TIME_OUT )) {
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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// Address NACK'd
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@@ -323,8 +311,7 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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break;
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case I2C_TRANSMIT_DATA:
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/* wait until the transmit data buffer is empty */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -409,18 +396,22 @@ bool FRToSI2C::lock() {
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if (I2CSemaphore == nullptr) {
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return false;
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}
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if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) {
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return true;
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}
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return xSemaphoreTake(I2CSemaphore, TICKS_SECOND) == pdTRUE;
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}
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void FRToSI2C::unlock() {
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if (xTaskGetSchedulerState() != taskSCHEDULER_RUNNING) {
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return;
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}
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xSemaphoreGive(I2CSemaphore);
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}
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bool FRToSI2C::writeRegistersBulk(const uint8_t address,
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const I2C_REG *registers, const uint8_t registersLength) {
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bool FRToSI2C::writeRegistersBulk(const uint8_t address, const I2C_REG *registers, const uint8_t registersLength) {
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for (int index = 0; index < registersLength; index++) {
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if (!I2C_RegisterWrite(address, registers[index].reg,
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registers[index].val)) {
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if (!I2C_RegisterWrite(address, registers[index].reg, registers[index].val)) {
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return false;
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}
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if (registers[index].pause_ms) {
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@@ -447,8 +438,7 @@ bool FRToSI2C::wakePart(uint16_t DevAddress) {
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switch (state) {
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case I2C_START:
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)
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&& (timeout < I2C_TIME_OUT )) {
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -463,8 +453,7 @@ bool FRToSI2C::wakePart(uint16_t DevAddress) {
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break;
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case I2C_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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@@ -480,15 +469,13 @@ bool FRToSI2C::wakePart(uint16_t DevAddress) {
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break;
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case I2C_CLEAR_ADDRESS_FLAG:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND))
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&& (timeout < I2C_TIME_OUT )) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200)
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&& (timeout < I2C_TIME_OUT )) {
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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// Address NACK'd
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