Merge branch 'main' of https://github.com/s-allius/tsun-gen3-proxy into s-allius/issue415
This commit is contained in:
Stefan Allius
@@ -462,6 +462,39 @@ def inverter_ind_msg800(): # 0x4210 rated Power 800W
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msg += b'\x15'
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return msg
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@pytest.fixture
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def inverter_ind_msg900(): # 0x4210 rated Power 900W
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msg = b'\xa5\x99\x01\x10\x42\xe6\x9e' +get_sn() +b'\x01\xb0\x02\xbc\xc8'
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msg += b'\x24\x32\x6c\x1f\x00\x00\xa0\x47\xe4\x33\x01\x00\x03\x08\x00\x00'
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msg += b'\x59\x31\x37\x45\x37\x41\x30\x46\x30\x31\x30\x42\x30\x31\x33\x45'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x01\x00\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x40\x10\x08\xc8\x00\x49\x13\x8d\x00\x36\x00\x00\x03\x84\x06\x7a'
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msg += b'\x01\x61\x00\xa8\x02\x54\x01\x5a\x00\x8a\x01\xe4\x01\x5a\x00\xbd'
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msg += b'\x02\x8f\x00\x11\x00\x01\x00\x00\x00\x0b\x00\x00\x27\x98\x00\x04'
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msg += b'\x00\x00\x0c\x04\x00\x03\x00\x00\x0a\xe7\x00\x05\x00\x00\x0c\x75'
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msg += b'\x00\x00\x00\x00\x06\x16\x02\x00\x00\x00\x55\xaa\x00\x01\x00\x00'
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msg += b'\x00\x00\x00\x00\xff\xff\x03\x84\x00\x03\x04\x00\x04\x00\x04\x00'
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msg += b'\x04\x00\x00\x01\xff\xff\x00\x01\x00\x06\x00\x68\x00\x68\x05\x00'
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msg += b'\x09\xcd\x07\xb6\x13\x9c\x13\x24\x00\x01\x07\xae\x04\x0f\x00\x41'
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msg += b'\x00\x0f\x0a\x64\x0a\x64\x00\x06\x00\x06\x09\xf6\x12\x8c\x12\x8c'
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msg += b'\x00\x10\x00\x10\x14\x52\x14\x52\x00\x10\x00\x10\x01\x51\x00\x05'
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msg += b'\x04\x00\x00\x01\x13\x9c\x0f\xa0\x00\x4e\x00\x66\x03\xe8\x04\x00'
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msg += b'\x09\xce\x07\xa8\x13\x9c\x13\x26\x00\x00\x00\x00\x00\x00\x00\x00'
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msg += b'\x00\x00\x00\x00\x04\x00\x04\x00\x00\x00\x00\x00\xff\xff\x00\x00'
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msg += b'\x00\x00\x00\x00'
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msg += correct_checksum(msg)
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msg += b'\x15'
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return msg
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@pytest.fixture
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def inverter_ind_msg_81(): # 0x4210 fcode 0x81
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msg = b'\xa5\x99\x01\x10\x42\x02\x03' +get_sn() +b'\x81\xb0\x02\xbc\xc8'
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@@ -676,6 +709,19 @@ def msg_modbus_rsp(): # 0x1510
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msg += b'\x15'
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return msg
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@pytest.fixture
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def msg_modbus_rsp_mb_4(): # 0x1510, MODBUS Type:4
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msg = b'\xa5\x3b\x00\x10\x15\x03\x03' +get_sn() +b'\x02\x01'
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msg += total()
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msg += hb()
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msg += b'\x0a\xe2\xfa\x33\x01\x04\x28\x40\x10\x08\xd8'
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msg += b'\x00\x00\x13\x87\x00\x31\x00\x68\x02\x58\x00\x00\x01\x53\x00\x02'
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msg += b'\x00\x00\x01\x52\x00\x02\x00\x00\x01\x53\x00\x03\x00\x00\x00\x04'
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msg += b'\x00\x01\x00\x00\x9e\xa4'
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msg += correct_checksum(msg)
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msg += b'\x15'
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return msg
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@pytest.fixture
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def msg_modbus_interim_rsp(): # 0x0510
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msg = b'\xa5\x3b\x00\x10\x15\x03\x03' +get_sn() +b'\x02\x01'
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@@ -1435,6 +1481,7 @@ async def test_build_modell_600(my_loop, config_tsun_allow_all, inverter_ind_msg
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m.read() # read complete msg, and dispatch msg
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assert 2000 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 600 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 4 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MS2000(600)' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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assert '02b0' == m.db.get_db_value(Register.SENSOR_LIST, None)
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assert 0 == m.sensor_list # must not been set by an inverter data ind
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@@ -1454,6 +1501,7 @@ async def test_build_modell_1600(my_loop, config_tsun_allow_all, inverter_ind_ms
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m.read() # read complete msg, and dispatch msg
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assert 1600 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 1600 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 4 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MS1600' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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m.close()
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@@ -1467,6 +1515,7 @@ async def test_build_modell_1800(my_loop, config_tsun_allow_all, inverter_ind_ms
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m.read() # read complete msg, and dispatch msg
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assert 1800 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 1800 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 4 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MS1800' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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m.close()
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@@ -1480,6 +1529,7 @@ async def test_build_modell_2000(my_loop, config_tsun_allow_all, inverter_ind_ms
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m.read() # read complete msg, and dispatch msg
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assert 2000 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 2000 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 4 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MS2000' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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m.close()
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@@ -1493,6 +1543,21 @@ async def test_build_modell_800(my_loop, config_tsun_allow_all, inverter_ind_msg
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m.read() # read complete msg, and dispatch msg
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assert 800 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 800 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 2 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MS800' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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m.close()
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@pytest.mark.asyncio
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async def test_build_modell_900(my_loop, config_tsun_allow_all, inverter_ind_msg900):
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_ = config_tsun_allow_all
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m = MemoryStream(inverter_ind_msg900, (0,))
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assert 0 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert None == m.db.get_db_value(Register.RATED_POWER, None)
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assert None == m.db.get_db_value(Register.INVERTER_TEMP, None)
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m.read() # read complete msg, and dispatch msg
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assert 900 == m.db.get_db_value(Register.MAX_DESIGNED_POWER, 0)
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assert 900 == m.db.get_db_value(Register.RATED_POWER, 0)
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assert 2 == m.db.get_db_value(Register.NO_INPUTS, 0)
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assert 'TSOL-MSxx00' == m.db.get_db_value(Register.EQUIPMENT_MODEL, 0)
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m.close()
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@@ -2189,6 +2254,61 @@ async def test_modbus_scaning(config_tsun_scan, heartbeat_ind_msg, heartbeat_rsp
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assert next(m.mb_timer.exp_count) == 3
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m.close()
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@pytest.mark.asyncio
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async def test_modbus_scaning_inv_rsp(config_tsun_scan, heartbeat_ind_msg, heartbeat_rsp_msg, msg_modbus_rsp_mb_4):
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_ = config_tsun_scan
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assert asyncio.get_running_loop()
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m = MemoryStream(heartbeat_ind_msg, (0x15,0x56,0))
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m.append_msg(msg_modbus_rsp_mb_4)
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assert m.mb_scan == False
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assert asyncio.get_running_loop() == m.mb_timer.loop
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m.db.stat['proxy']['Unknown_Ctrl'] = 0
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assert m.mb_timer.tim == None
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m.read() # read complete msg, and dispatch msg
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assert m.mb_scan == True
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assert m.mb_start_reg == 0xff80
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assert m.mb_step == 0x40
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assert m.mb_bytes == 0x14
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assert asyncio.get_running_loop() == m.mb_timer.loop
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assert not m.header_valid # must be invalid, since msg was handled and buffer flushed
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assert m.msg_count == 1
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assert m.snr == 2070233889
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assert m.control == 0x4710
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assert m.msg_recvd[0]['control']==0x4710
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assert m.msg_recvd[0]['seq']=='84:11'
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assert m.msg_recvd[0]['data_len']==0x1
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assert m.ifc.tx_fifo.get()==heartbeat_rsp_msg
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assert m.ifc.fwd_fifo.get()==heartbeat_ind_msg
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assert m.db.stat['proxy']['Unknown_Ctrl'] == 0
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m.ifc.tx_clear() # clear send buffer for next test
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assert isclose(m.mb_timeout, 0.5)
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assert next(m.mb_timer.exp_count) == 0
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await asyncio.sleep(0.5)
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assert m.sent_pdu==b'\xa5\x17\x00\x10E\x12\x84!Ce{\x02\xb0\x02\x00\x00\x00\x00\x00\x00' \
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b'\x00\x00\x00\x00\x00\x00\x01\x03\xff\xc0\x00\x14\x75\xed\x33\x15'
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assert m.ifc.tx_fifo.get()==b''
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m.read() # read complete msg, and dispatch msg
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assert not m.header_valid # must be invalid, since msg was handled and buffer flushed
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assert m.msg_count == 2
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assert m.msg_recvd[1]['control']==0x1510
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assert m.msg_recvd[1]['seq']=='03:03'
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assert m.msg_recvd[1]['data_len']==0x3b
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assert m.mb.last_addr == 1
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assert m.mb.last_fcode == 3
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assert m.mb.last_reg == 0xffc0 # mb_start_reg + mb_step
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assert m.mb.last_len == 20
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assert m.mb.err == 3
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assert next(m.mb_timer.exp_count) == 2
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m.close()
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@pytest.mark.asyncio
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async def test_start_client_mode(my_loop, config_tsun_inv1, str_test_ip):
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_ = config_tsun_inv1
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