78 lines
3.9 KiB
C
78 lines
3.9 KiB
C
/********************* (C) COPYRIGHT 2015 e-Design Co.,Ltd. ********************
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Brief : <20>ײ<EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Author : bure
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Modified by Ben V. Brown into English
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*******************************************************************************/
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#include "stm32f10x.h"
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#define PRODUCT_INFO "TS100"
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#define MCU_TYPE "STM32F103T8"
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#define ADC_TYPE "MCU's ADC"
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#define FPGA_TYPE "None"
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#define SCH_VER "2.46"
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// #define SSD1316 1
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// #define MFTSEEED "Manufacturer"
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// #define MFTMINI "Manufacturer"
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#define SPIx SPI1
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#define FLASH_PAGE 0x0400
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//--------------------------- key Definitions ------------------------------//
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#define KEY1_PIN GPIO_Pin_9 //PA8
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#define KEY2_PIN GPIO_Pin_6 //PA6
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#define KEY_1 !(GPIOA->IDR & KEY1_PIN)
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#define KEY_2 !(GPIOA->IDR & KEY2_PIN)
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#define KEY_DFU KEY_1
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#define KEY_ON 0
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#define I2C1_DMA_CHANNEL_TX DMA1_Channel6
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#define I2C1_DMA_CHANNEL_RX DMA1_Channel7
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#define I2C2_DMA_CHANNEL_TX DMA1_Channel4
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#define I2C2_DMA_CHANNEL_RX DMA1_Channel5
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#define I2C1_DR_Address 0x40005410
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#define I2C2_DR_Address 0x40005810
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//--------------------------- OLED <20><>ؿ<EFBFBD><D8BF><EFBFBD><EFBFBD>ź<EFBFBD> ------------------------------//
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#define OLED_RST_PIN GPIO_Pin_8 //PA9
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#define OLED_RST() GPIO_ResetBits(GPIOA, OLED_RST_PIN)
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#define OLED_ACT() GPIO_SetBits (GPIOA, OLED_RST_PIN)
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//------------------------------ <20><><EFBFBD>ȿ<EFBFBD><C8BF><EFBFBD><EFBFBD>ź<EFBFBD> --------------------------------//
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#define HEAT_PIN GPIO_Pin_4
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#define HEAT_OFF() GPIOB->BRR = HEAT_PIN
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#define HEAT_ON() GPIOB->BSRR = HEAT_PIN
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//---------------------<2D><><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>--VB---------------------------------------//
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#define VB_PIN GPIO_Pin_1 //PB1(Ai9)
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//----------------------------ADX345 INT1,INT2--------------------------------//
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#define INT1_PIN GPIO_Pin_5 //PB5
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#define INT2_PIN GPIO_Pin_3 //PB3
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//------------------------------ GPIO <20>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD> -------------------------------//
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#define GPIOA_OUTPUT() GPIOA->ODR = 0xFFFF;
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#define GPIOA_L_DEF() GPIOA->CRL = 0x08888888; /* Ai7 K2 xxx xxx xxx xxx xxx xxx */
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#define GPIOA_H_DEF() GPIOA->CRH = 0x8BBBB883; /* xxx SWC SWD D+ D- xxx K1 nCR */
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#define GPIOB_OUTPUT() GPIOB->ODR = 0xFFFF;
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#define GPIOB_L_DEF() GPIOB->CRL = 0x44838800; /* SDA SCL It1 Po It2 xxx Ai9 Ai8 */
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#define GPIOB_H_DEF() GPIOB->CRH = 0x88888888; /* xxx xxx xxx xxx xxx xxx xxx xxx */
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//--------------------------------- RCC <20><><EFBFBD><EFBFBD> ---------------------------------//
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#define RCC_PLL_EN() RCC->CR |= 0x01000000;// PLL En
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#define RCC_CFGR_CFG() RCC->CFGR |= 0x0068840A;/*RCC peripheral clock config
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|||||||+--Bits3~0 = 1010 PLL used as sys clock
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||||||+---Bits7~4 = 0000 AHB clock = SYSCLK
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|||||+----Bits10~8 = 100 PCLK1=HCLK divided by 2
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||||++----Bits13~11 = 000 PCLK2=HCLK
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||||+-----Bits15~14 = 10 ADC prescaler PCLK2 divided by 6
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|||+------Bit17~16 = 00 HSI/2 clock selected as PLL input clock
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||++------Bits21~18 = 1010 PLL input clock x12
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||+-------Bit22 = 1 USB prescaler is PLL clock
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++--------Bits31~27 Reserved*/
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/******************************** END OF FILE *********************************/
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