90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
/*
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* Si7210_defines.h
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*
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* Created on: 5 Oct. 2020
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* Author: Ralim
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*/
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#ifndef CORE_DRIVERS_SI7210_DEFINES_H_
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#define CORE_DRIVERS_SI7210_DEFINES_H_
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#define SI7210_ADDRESS (0x30 << 1)
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#define SI7210_REG_ID 0xC0
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/* Si7210 Register addresses */
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#define SI7210_HREVID 0xC0U
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#define SI7210_DSPSIGM 0xC1U
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#define SI7210_DSPSIGL 0xC2U
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#define SI7210_DSPSIGSEL 0xC3U
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#define SI7210_POWER_CTRL 0xC4U
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#define SI7210_ARAUTOINC 0xC5U
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#define SI7210_CTRL1 0xC6U
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#define SI7210_CTRL2 0xC7U
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#define SI7210_SLTIME 0xC8U
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#define SI7210_CTRL3 0xC9U
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#define SI7210_A0 0xCAU
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#define SI7210_A1 0xCBU
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#define SI7210_A2 0xCCU
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#define SI7210_CTRL4 0xCDU
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#define SI7210_A3 0xCEU
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#define SI7210_A4 0xCFU
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#define SI7210_A5 0xD0U
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#define SI7210_OTP_ADDR 0xE1U
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#define SI7210_OTP_DATA 0xE2U
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#define SI7210_OTP_CTRL 0xE3U
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#define SI7210_TM_FG 0xE4U
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/* Si7210 Register bit masks */
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#define CHIP_ID_MASK 0xF0U
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#define REV_ID_MASK 0x0FU
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#define DSP_SIGSEL_MASK 0x07U
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#define MEAS_MASK 0x80U
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#define USESTORE_MASK 0x08U
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#define ONEBURST_MASK 0x04U
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#define STOP_MASK 0x02U
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#define SLEEP_MASK 0x01U
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#define ARAUTOINC_MASK 0x01U
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#define SW_LOW4FIELD_MASK 0x80U
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#define SW_OP_MASK 0x7FU
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#define SW_FIELDPOLSEL_MASK 0xC0U
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#define SW_HYST_MASK 0x3FU
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#define SW_TAMPER_MASK 0xFCU
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#define SL_FAST_MASK 0x02U
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#define SL_TIMEENA_MASK 0x01U
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#define DF_BURSTSIZE_MASK 0xE0U
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#define DF_BW_MASK 0x1EU
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#define DF_IIR_MASK 0x01U
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#define OTP_READ_EN_MASK 0x02U
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#define OTP_BUSY_MASK 0x01U
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#define TM_FG_MASK 0x03U
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#define DSP_SIGM_DATA_FLAG 0x80U
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#define DSP_SIGM_DATA_MASK 0x7FU
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#define DSP_SIGSEL_TEMP_MASK 0x01U
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#define DSP_SIGSEL_FIELD_MASK 0x04U
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/* Burst sizes */
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#define DF_BW_1 0x0U << 1
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#define DF_BW_2 0x1U << 1
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#define DF_BW_4 0x2U << 1
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#define DF_BW_8 0x3U << 1
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#define DF_BW_16 0x4U << 1
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#define DF_BW_32 0x5U << 1
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#define DF_BW_64 0x6U << 1
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#define DF_BW_128 0x7U << 1
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#define DF_BW_256 0x8U << 1
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#define DF_BW_512 0x9U << 1
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#define DF_BW_1024 0xAU << 1
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#define DF_BW_2048 0xBU << 1
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#define DF_BW_4096 0xCU << 1
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#define DF_BURSTSIZE_1 0x0U << 5
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#define DF_BURSTSIZE_2 0x1U << 5
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#define DF_BURSTSIZE_4 0x2U << 5
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#define DF_BURSTSIZE_8 0x3U << 5
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#define DF_BURSTSIZE_16 0x4U << 5
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#define DF_BURSTSIZE_32 0x5U << 5
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#define DF_BURSTSIZE_64 0x6U << 5
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#define DF_BURSTSIZE_128 0x7U << 5
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#endif /* CORE_DRIVERS_SI7210_DEFINES_H_ */
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