Cleanup more unrequired logic
This commit is contained in:
@@ -18,7 +18,7 @@
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#define SOFT_SDA_LOW() HAL_GPIO_WritePin(SDA2_GPIO_Port, SDA2_Pin, GPIO_PIN_RESET)
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#define SOFT_SDA_LOW() HAL_GPIO_WritePin(SDA2_GPIO_Port, SDA2_Pin, GPIO_PIN_RESET)
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#define SOFT_SDA_READ() (HAL_GPIO_ReadPin(SDA2_GPIO_Port,SDA2_Pin)==GPIO_PIN_SET?1:0)
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#define SOFT_SDA_READ() (HAL_GPIO_ReadPin(SDA2_GPIO_Port,SDA2_Pin)==GPIO_PIN_SET?1:0)
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#define SOFT_SCL_READ() (HAL_GPIO_ReadPin(SCL2_GPIO_Port,SCL2_Pin)==GPIO_PIN_SET?1:0)
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#define SOFT_SCL_READ() (HAL_GPIO_ReadPin(SCL2_GPIO_Port,SCL2_Pin)==GPIO_PIN_SET?1:0)
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#define SOFT_I2C_DELAY() {for(int xx=0;xx<100;xx++){asm("nop");}}
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#define SOFT_I2C_DELAY() {for(int xx=0;xx<40;xx++){asm("nop");}}
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#endif
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#endif
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@@ -149,7 +149,7 @@ void fusb_setup() {
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GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
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GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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GPIO_InitStruct.Pull = GPIO_PULLUP;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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HAL_NVIC_SetPriority(EXTI9_5_IRQn, 10, 0);
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HAL_NVIC_SetPriority(EXTI9_5_IRQn, 12, 0);
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HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
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HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
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if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
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if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
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@@ -157,12 +157,10 @@ void fusb_setup() {
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return;
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return;
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}
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}
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}
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}
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/* Fully reset the FUSB302B */
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fusb_write_byte( FUSB_RESET, FUSB_RESET_SW_RES);
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osDelay(2);
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if (!fusb_read_id()) {
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if (!fusb_read_id()) {
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return;
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return;
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}
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}
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/* Turn on all power */
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/* Turn on all power */
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fusb_write_byte( FUSB_POWER, 0x0F);
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fusb_write_byte( FUSB_POWER, 0x0F);
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@@ -181,21 +179,14 @@ void fusb_setup() {
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fusb_write_byte( FUSB_CONTROL1,
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fusb_write_byte( FUSB_CONTROL1,
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FUSB_CONTROL1_RX_FLUSH | FUSB_CONTROL1_ENSOP2 | FUSB_CONTROL1_ENSOP1);
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FUSB_CONTROL1_RX_FLUSH | FUSB_CONTROL1_ENSOP2 | FUSB_CONTROL1_ENSOP1);
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resetWatchdog();
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/* Measure CC1 */
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/* Measure CC1 */
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fusb_write_byte( FUSB_SWITCHES0, 0x07);
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fusb_write_byte( FUSB_SWITCHES0, 0x07);
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resetWatchdog();
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osDelay(10);
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osDelay(10);
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resetWatchdog();
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uint8_t cc1 = fusb_read_byte( FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
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uint8_t cc1 = fusb_read_byte( FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
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resetWatchdog();
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/* Measure CC2 */
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/* Measure CC2 */
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resetWatchdog();
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fusb_write_byte( FUSB_SWITCHES0, 0x0B);
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fusb_write_byte( FUSB_SWITCHES0, 0x0B);
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resetWatchdog();
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osDelay(10);
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osDelay(10);
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resetWatchdog();
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uint8_t cc2 = fusb_read_byte( FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
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uint8_t cc2 = fusb_read_byte( FUSB_STATUS0) & FUSB_STATUS0_BC_LVL;
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/* Select the correct CC line for BMC signaling; also enable AUTO_CRC */
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/* Select the correct CC line for BMC signaling; also enable AUTO_CRC */
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@@ -206,7 +197,6 @@ void fusb_setup() {
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fusb_write_byte( FUSB_SWITCHES1, 0x26);
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fusb_write_byte( FUSB_SWITCHES1, 0x26);
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fusb_write_byte( FUSB_SWITCHES0, 0x0B);
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fusb_write_byte( FUSB_SWITCHES0, 0x0B);
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}
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}
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resetWatchdog();
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if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
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if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
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I2CBB::unlock2();
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I2CBB::unlock2();
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}
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}
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@@ -171,7 +171,7 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_wait_cap() {
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}
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}
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/* If we got reset signaling, transition to default */
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/* If we got reset signaling, transition to default */
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if (evt & PDB_EVT_PE_RESET) {
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if (evt & PDB_EVT_PE_RESET) {
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return PESinkTransitionDefault;
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return PESinkWaitCap;
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}
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}
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/* If we're too hot, we shouldn't negotiate power yet */
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/* If we're too hot, we shouldn't negotiate power yet */
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if (evt & PDB_EVT_PE_I_OVRTEMP) {
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if (evt & PDB_EVT_PE_I_OVRTEMP) {
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@@ -187,22 +187,22 @@ PolicyEngine::policy_engine_state PolicyEngine::pe_sink_wait_cap() {
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&& PD_NUMOBJ_GET(&tempMessage) > 0) {
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&& PD_NUMOBJ_GET(&tempMessage) > 0) {
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/* First, determine what PD revision we're using */
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/* First, determine what PD revision we're using */
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if ((hdr_template & PD_HDR_SPECREV) == PD_SPECREV_1_0) {
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if ((hdr_template & PD_HDR_SPECREV) == PD_SPECREV_1_0) {
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/* If the other end is using at least version 3.0, we'll
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// /* If the other end is using at least version 3.0, we'll
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* use version 3.0. */
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// * use version 3.0. */
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if ((tempMessage.hdr & PD_HDR_SPECREV) >= PD_SPECREV_3_0) {
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// if ((tempMessage.hdr & PD_HDR_SPECREV) >= PD_SPECREV_3_0) {
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hdr_template |= PD_SPECREV_3_0;
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// hdr_template |= PD_SPECREV_3_0;
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/* Otherwise, use 2.0. Don't worry about the 1.0 case
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// /* Otherwise, use 2.0. Don't worry about the 1.0 case
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* because we don't have hardware for PD 1.0 signaling. */
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// * because we don't have hardware for PD 1.0 signaling. */
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} else {
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// } else {
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hdr_template |= PD_SPECREV_2_0;
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hdr_template |= PD_SPECREV_2_0;
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}
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// }
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}
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}
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return PESinkEvalCap;
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return PESinkEvalCap;
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/* If the message was a Soft_Reset, do the soft reset procedure */
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/* If the message was a Soft_Reset, do the soft reset procedure */
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}
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}
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evt = 0;
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evt = 0;
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}
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}
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return PESinkWaitCap; //unknown message == soft reset
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return PESinkWaitCap; //wait for more messages?
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}
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}
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@@ -27,12 +27,7 @@ void I2CBB::init() {
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I2CSemaphore2 = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer2);
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I2CSemaphore2 = xSemaphoreCreateBinaryStatic(&xSemaphoreBuffer2);
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unlock();
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unlock();
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unlock2();
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unlock2();
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//unstick bus
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// start();
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// for (int i = 0; i < 8; i++) {
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// read_bit();
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// }
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// stop();
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}
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}
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bool I2CBB::probe(uint8_t address) {
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bool I2CBB::probe(uint8_t address) {
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