From c9172f0f9b4034ca7a4ef3807654fc1f9004028a Mon Sep 17 00:00:00 2001 From: "Ben V. Brown" Date: Fri, 25 Sep 2020 18:50:41 +1000 Subject: [PATCH] Move to basic DMA I2C | handle poll FUSB better --- .../TS100/Core/BSP/Miniware/fusb302b.cpp | 31 +- .../TS100/Core/BSP/Pine64/I2C_Wrapper.cpp | 401 ++++++++++++++---- workspace/TS100/Core/BSP/Pine64/IRQ.cpp | 206 +-------- workspace/TS100/Core/BSP/Pine64/IRQ.h | 5 + workspace/TS100/Core/BSP/Pine64/Setup.c | 30 +- workspace/TS100/Core/BSP/Pine64/Setup.h | 1 + workspace/TS100/Core/BSP/Pine64/fusb302b.cpp | 9 +- .../TS100/Core/Drivers/FUSB302/fusb302b.h | 2 +- .../TS100/Core/Drivers/FUSB302/fusbpd.cpp | 11 +- 9 files changed, 375 insertions(+), 321 deletions(-) diff --git a/workspace/TS100/Core/BSP/Miniware/fusb302b.cpp b/workspace/TS100/Core/BSP/Miniware/fusb302b.cpp index ac1c5e83..7ff579f6 100644 --- a/workspace/TS100/Core/BSP/Miniware/fusb302b.cpp +++ b/workspace/TS100/Core/BSP/Miniware/fusb302b.cpp @@ -78,16 +78,16 @@ void fusb_send_message(const union pd_msg *msg) { } /* Token sequences for the FUSB302B */ static uint8_t sop_seq[5] = { - FUSB_FIFO_TX_SOP1, - FUSB_FIFO_TX_SOP1, - FUSB_FIFO_TX_SOP1, - FUSB_FIFO_TX_SOP2, - FUSB_FIFO_TX_PACKSYM }; + FUSB_FIFO_TX_SOP1, + FUSB_FIFO_TX_SOP1, + FUSB_FIFO_TX_SOP1, + FUSB_FIFO_TX_SOP2, + FUSB_FIFO_TX_PACKSYM}; static const uint8_t eop_seq[4] = { - FUSB_FIFO_TX_JAM_CRC, - FUSB_FIFO_TX_EOP, - FUSB_FIFO_TX_TXOFF, - FUSB_FIFO_TX_TXON }; + FUSB_FIFO_TX_JAM_CRC, + FUSB_FIFO_TX_EOP, + FUSB_FIFO_TX_TXOFF, + FUSB_FIFO_TX_TXON}; /* Take the I2C2 mutex now so there can't be a race condition on sop_seq */ /* Get the length of the message: a two-octet header plus NUMOBJ four-octet @@ -142,16 +142,16 @@ void fusb_send_hardrst() { I2CBB::unlock2(); } -void fusb_setup() { +bool fusb_setup() { if (!I2CBB::lock2()) { - return; + return false; } /* Fully reset the FUSB302B */ // fusb_write_byte( FUSB_RESET, FUSB_RESET_SW_RES); // osDelay(2); if (!fusb_read_id()) { - return; + return false; } /* Turn on all power */ @@ -170,7 +170,7 @@ void fusb_setup() { fusb_write_byte( FUSB_CONTROL2, 0x00); /* Flush the RX buffer */ fusb_write_byte( FUSB_CONTROL1, - FUSB_CONTROL1_RX_FLUSH); + FUSB_CONTROL1_RX_FLUSH); /* Measure CC1 */ fusb_write_byte( FUSB_SWITCHES0, 0x07); @@ -200,6 +200,7 @@ void fusb_setup() { HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_NVIC_SetPriority(EXTI9_5_IRQn, 10, 0); HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + return true; } void fusb_get_status(union fusb_status *status) { @@ -225,7 +226,7 @@ enum fusb_typec_current fusb_get_typec_current() { } /* Read the BC_LVL into a variable */ enum fusb_typec_current bc_lvl = (enum fusb_typec_current) (fusb_read_byte( - FUSB_STATUS0) & FUSB_STATUS0_BC_LVL); + FUSB_STATUS0) & FUSB_STATUS0_BC_LVL); if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) { I2CBB::unlock2(); } @@ -255,7 +256,7 @@ bool fusb_read_id() { uint8_t version = 0; fusb_read_buf(FUSB_DEVICE_ID, 1, &version); if (version == 0 || version == 0xFF) - return false; + return false; return true; } uint8_t fusb302_detect() { diff --git a/workspace/TS100/Core/BSP/Pine64/I2C_Wrapper.cpp b/workspace/TS100/Core/BSP/Pine64/I2C_Wrapper.cpp index 57cd78c2..a43dcb76 100644 --- a/workspace/TS100/Core/BSP/Pine64/I2C_Wrapper.cpp +++ b/workspace/TS100/Core/BSP/Pine64/I2C_Wrapper.cpp @@ -10,7 +10,7 @@ #include SemaphoreHandle_t FRToSI2C::I2CSemaphore = nullptr; StaticSemaphore_t FRToSI2C::xSemaphoreBuffer; -#define FLAG_TIMEOUT 1000 +#define I2C_TIME_OUT (uint16_t)(5000) void FRToSI2C::CpltCallback() { //TODO } @@ -31,46 +31,189 @@ bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address, uint8_t *p_b i2c_interrupt_disable(I2C0, I2C_INT_ERR); i2c_interrupt_disable(I2C0, I2C_INT_BUF); i2c_interrupt_disable(I2C0, I2C_INT_EV); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_AERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBALT); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBTO); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_OUERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_LOSTARB); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_BERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_PECERR); - /* wait until I2C bus is idle */ - uint8_t timeout = 0; - while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)) { - timeout++; - osDelay(1); - if (timeout > 20) { - unlock(); - return false; - } - } - i2c_slave_address = DevAddress; - i2c_read = p_buffer; - i2c_read_dress = read_address; - i2c_nbytes = number_of_byte; - i2c_error_code = 0; - i2c_process_flag = 1; - i2c_write_process = I2C_SEND_ADDRESS_FIRST; - i2c_read_process = I2C_SEND_ADDRESS_FIRST; + dma_parameter_struct dma_init_struct; -// if (2 == number_of_byte) { -// i2c_ackpos_config(I2C0, I2C_ACKPOS_NEXT); -// } - /* enable the I2C0 interrupt */ - i2c_interrupt_enable(I2C0, I2C_INT_ERR); - i2c_interrupt_enable(I2C0, I2C_INT_EV); - i2c_interrupt_enable(I2C0, I2C_INT_BUF); - /* send a start condition to I2C bus */ - i2c_start_on_bus(I2C0); - while ((i2c_nbytes > 0)) { - osDelay(1); - if (i2c_error_code != 0) { - unlock(); - return false; + uint8_t state = I2C_START; + uint8_t in_rx_cycle = 0; + uint16_t timeout = 0; + uint8_t i2c_timeout_flag = 0; + while (!(i2c_timeout_flag)) { + switch (state) { + case I2C_START: + if (0 == in_rx_cycle) { + /* disable I2C0 */ + i2c_disable(I2C0); + /* enable I2C0 */ + i2c_enable(I2C0); + + /* enable acknowledge */ + i2c_ack_config(I2C0, I2C_ACK_ENABLE); + /* i2c master sends start signal only when the bus is idle */ + while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + /* send the start signal */ + i2c_start_on_bus(I2C0); + timeout = 0; + state = I2C_SEND_ADDRESS; + } else { + I2C_Unstick(); + timeout = 0; + state = I2C_START; + } + } else { + i2c_start_on_bus(I2C0); + timeout = 0; + state = I2C_SEND_ADDRESS; + } + break; + case I2C_SEND_ADDRESS: + /* i2c master sends START signal successfully */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + if (RESET == in_rx_cycle) { + i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER); + state = I2C_CLEAR_ADDRESS_FLAG; + } else { + i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER); + state = I2C_CLEAR_ADDRESS_FLAG; + } + timeout = 0; + } else { + timeout = 0; + state = I2C_START; + in_rx_cycle = 0; + } + break; + case I2C_CLEAR_ADDRESS_FLAG: + /* address flag set means i2c slave sends ACK */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) { + timeout++; + if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) { + i2c_flag_clear(I2C0, I2C_FLAG_AERR); + i2c_stop_on_bus(I2C0); + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + //Address NACK'd + unlock(); + return false; + } + } + if (timeout < I2C_TIME_OUT) { + i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND); + timeout = 0; + state = I2C_TRANSMIT_DATA; + } else { + i2c_stop_on_bus(I2C0); + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + //Address NACK'd + unlock(); + return false; + } + break; + case I2C_TRANSMIT_DATA: + if (0 == in_rx_cycle) { + /* wait until the transmit data buffer is empty */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + //Write out the 8 byte address + i2c_data_transmit(I2C0, read_address); + timeout = 0; + } else { + timeout = 0; + state = I2C_START; + in_rx_cycle = 0; + } + /* wait until BTC bit is set */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + timeout = 0; + state = I2C_START; + in_rx_cycle=1; + } else { + timeout = 0; + state = I2C_START; + in_rx_cycle = 0; + } + } else { + /* one byte master reception procedure (polling) */ + if (number_of_byte < 2) { + /* disable acknowledge */ + i2c_ack_config(I2C0, I2C_ACK_DISABLE); + /* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register (I2C_STAT0 has already been read) */ + i2c_flag_get(I2C0, I2C_FLAG_ADDSEND); + /* send a stop condition to I2C bus*/ + i2c_stop_on_bus(I2C0); + /* wait for the byte to be received */ + while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) + ; + /* read the byte received from the EEPROM */ + *p_buffer = i2c_data_receive(I2C0); + /* decrement the read bytes counter */ + number_of_byte--; + timeout = 0; + } else { /* more than one byte master reception procedure (DMA) */ + dma_deinit(DMA0, DMA_CH6); + dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY; + dma_init_struct.memory_addr = (uint32_t) p_buffer; + dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; + dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT; + dma_init_struct.number = number_of_byte; + dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0); + dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; + dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT; + dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; + dma_init(DMA0, DMA_CH6, &dma_init_struct); + + i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON); + /* enable I2C0 DMA */ + i2c_dma_enable(I2C0, I2C_DMA_ON); + /* enable DMA0 channel5 */ + dma_channel_enable(DMA0, DMA_CH6); + /* wait until BTC bit is set */ + while (!dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) { + osDelay(1); + } + /* send a stop condition to I2C bus*/ + i2c_stop_on_bus(I2C0); + } + timeout = 0; + state = I2C_STOP; + } + break; + case I2C_STOP: + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + timeout = 0; + state = I2C_END; + i2c_timeout_flag = I2C_OK; + } else { + timeout = 0; + state = I2C_START; + in_rx_cycle = 0; + } + break; + default: + state = I2C_START; + in_rx_cycle = 0; + i2c_timeout_flag = I2C_OK; + timeout = 0; + break; } } unlock(); @@ -81,48 +224,150 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *p_bu if (!lock()) return false; - i2c_slave_address = DevAddress; - i2c_write = p_buffer; - i2c_write_dress = MemAddress; - i2c_nbytes = number_of_byte; - i2c_error_code = 0; - i2c_process_flag = 0; - i2c_write_process = I2C_SEND_ADDRESS_FIRST; - i2c_read_process = I2C_SEND_ADDRESS_FIRST; - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_AERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBALT); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBTO); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_OUERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_LOSTARB); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_BERR); - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_PECERR); - /* enable the I2C0 interrupt */ - i2c_interrupt_enable(I2C0, I2C_INT_ERR); - i2c_interrupt_enable(I2C0, I2C_INT_EV); - i2c_interrupt_enable(I2C0, I2C_INT_BUF); - /* wait until I2C bus is idle */ - uint8_t timeout = 0; - while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)) { - timeout++; - osDelay(1); - if (timeout > 20) { - unlock(); - return false; - } - } + i2c_interrupt_disable(I2C0, I2C_INT_ERR); + i2c_interrupt_disable(I2C0, I2C_INT_EV); + i2c_interrupt_disable(I2C0, I2C_INT_BUF); + dma_parameter_struct dma_init_struct; - /* send a start condition to I2C bus */ - //This sending will kickoff the IRQ's - i2c_start_on_bus(I2C0); - while ((i2c_nbytes > 0)) { - osDelay(1); - if (i2c_error_code != 0) { - unlock(); - return false; + uint8_t state = I2C_START; + uint16_t timeout = 0; + uint8_t i2c_timeout_flag = 0; + bool done = false; + bool timedout = false; + while (!(done || timedout)) { + switch (state) { + case I2C_START: + /* i2c master sends start signal only when the bus is idle */ + while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + i2c_start_on_bus(I2C0); + timeout = 0; + state = I2C_SEND_ADDRESS; + } else { + I2C_Unstick(); + timeout = 0; + state = I2C_START; + } + break; + case I2C_SEND_ADDRESS: + /* i2c master sends START signal successfully */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER); + timeout = 0; + state = I2C_CLEAR_ADDRESS_FLAG; + } else { + timedout = true; + done = true; + timeout = 0; + state = I2C_START; + } + break; + case I2C_CLEAR_ADDRESS_FLAG: + /* address flag set means i2c slave sends ACK */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) { + timeout++; + if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) { + i2c_flag_clear(I2C0, I2C_FLAG_AERR); + i2c_stop_on_bus(I2C0); + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + //Address NACK'd + unlock(); + return false; + } + } + if (timeout < I2C_TIME_OUT) { + i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND); + timeout = 0; + state = I2C_TRANSMIT_DATA; + } else { + //Dont retry as this means a NAK + i2c_stop_on_bus(I2C0); + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + unlock(); + return false; + + } + break; + case I2C_TRANSMIT_DATA: + /* wait until the transmit data buffer is empty */ + while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + /* send the EEPROM's internal address to write to : only one byte address */ + i2c_data_transmit(I2C0, MemAddress); + timeout = 0; + } else { + timedout = true; + timeout = 0; + state = I2C_START; + } + /* wait until BTC bit is set */ + while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) + ; + dma_deinit(DMA0, DMA_CH5); + dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL; + dma_init_struct.memory_addr = (uint32_t) p_buffer; + dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; + dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT; + dma_init_struct.number = number_of_byte; + dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0); + dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; + dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT; + dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; + dma_init(DMA0, DMA_CH5, &dma_init_struct); + /* enable I2C0 DMA */ + i2c_dma_enable(I2C0, I2C_DMA_ON); + /* enable DMA0 channel5 */ + dma_channel_enable(DMA0, DMA_CH5); + /* wait until BTC bit is set */ + while (!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) { + osDelay(1); + } + /* wait until BTC bit is set */ + while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) + ; + state = I2C_STOP; + break; + case I2C_STOP: + /* send a stop condition to I2C bus */ + i2c_stop_on_bus(I2C0); + /* i2c master sends STOP signal successfully */ + while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) { + timeout++; + } + if (timeout < I2C_TIME_OUT) { + timeout = 0; + state = I2C_END; + i2c_timeout_flag = I2C_OK; + done = true; + } else { + timedout = true; + done = true; + timeout = 0; + state = I2C_START; + } + break; + default: + state = I2C_START; + i2c_timeout_flag = I2C_OK; + timeout = 0; + break; } } unlock(); - return true; + return timedout == false; } bool FRToSI2C::Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size) { diff --git a/workspace/TS100/Core/BSP/Pine64/IRQ.cpp b/workspace/TS100/Core/BSP/Pine64/IRQ.cpp index 1049fc18..8a726beb 100644 --- a/workspace/TS100/Core/BSP/Pine64/IRQ.cpp +++ b/workspace/TS100/Core/BSP/Pine64/IRQ.cpp @@ -74,215 +74,11 @@ void EXTI5_9_IRQHandler(void) { #endif } -/*! - \brief handle I2C0 event interrupt request - \param[in] none - \param[out] none - \retval none - */ +//These are unused for now void I2C0_EV_IRQHandler(void) { - if (RESET == i2c_process_flag) { - switch (i2c_write_process) { - case I2C_SEND_ADDRESS_FIRST: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_SBSEND)) { - /* send slave address */ - i2c_master_addressing(I2C0, i2c_slave_address, I2C_TRANSMITTER); - i2c_write_process = I2C_CLEAR_ADDRESS_FLAG_FIRST; - } - break; - case I2C_CLEAR_ADDRESS_FLAG_FIRST: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_ADDSEND)) { - /*clear ADDSEND bit */ - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_ADDSEND); - i2c_write_process = I2C_TRANSMIT_WRITE_READ_ADD; - } - break; - case I2C_TRANSMIT_WRITE_READ_ADD: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_TBE)) { - i2c_data_transmit(I2C0, i2c_write_dress); - /* wait until BTC bit is set */ - while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) - ; - i2c_write_process = I2C_TRANSMIT_DATA; - } - break; - case I2C_TRANSMIT_DATA: - if (i2c_nbytes) { - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_TBE)) { - /* the master sends a data byte */ - i2c_data_transmit(I2C0, *i2c_write++); - i2c_nbytes--; - if (0 == i2c_nbytes) { - i2c_write_process = I2C_STOP; - } - } - } else { - i2c_write_process = I2C_STOP; - } - break; - case I2C_STOP: - /* the master sends a stop condition to I2C bus */ - i2c_stop_on_bus(I2C0); - /* disable the I2C0 interrupt */ - i2c_interrupt_disable(I2C0, I2C_INT_ERR); - i2c_interrupt_disable(I2C0, I2C_INT_BUF); - i2c_interrupt_disable(I2C0, I2C_INT_EV); - i2c_write_process = I2C_SEND_ADDRESS_FIRST; - break; - default: - break; - } - } else if (SET == i2c_process_flag) { - switch (i2c_read_process) { - case I2C_SEND_ADDRESS_FIRST: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_SBSEND)) { - /* send slave address */ - i2c_master_addressing(I2C0, i2c_slave_address, I2C_TRANSMITTER); - i2c_read_process = I2C_CLEAR_ADDRESS_FLAG_FIRST; - } - break; - case I2C_CLEAR_ADDRESS_FLAG_FIRST: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_ADDSEND)) { - /*clear ADDSEND bit */ - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_ADDSEND); - i2c_read_process = I2C_TRANSMIT_WRITE_READ_ADD; - } - break; - case I2C_TRANSMIT_WRITE_READ_ADD: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_TBE)) { - i2c_data_transmit(I2C0, i2c_read_dress); - /* wait until BTC bit is set */ - while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) - ; - /* send a start condition to I2C bus */ - i2c_start_on_bus(I2C0); - i2c_read_process = I2C_SEND_ADDRESS_SECOND; - } - break; - case I2C_SEND_ADDRESS_SECOND: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_SBSEND)) { - i2c_master_addressing(I2C0, i2c_slave_address, I2C_RECEIVER); - if ((1 == i2c_nbytes) || (2 == i2c_nbytes)) { - i2c_ackpos_config(I2C0, i2c_nbytes == 1 ? I2C_ACKPOS_CURRENT : I2C_ACKPOS_NEXT); - /* clear the ACKEN before the ADDSEND is cleared */ - i2c_ack_config(I2C0, I2C_ACK_DISABLE); - } else { - i2c_ack_config(I2C0, I2C_ACK_ENABLE); - } - i2c_read_process = I2C_CLEAR_ADDRESS_FLAG_SECOND; - } - break; - case I2C_CLEAR_ADDRESS_FLAG_SECOND: - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_ADDSEND)) { - - /*clear ADDSEND bit */ - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_ADDSEND); - i2c_read_process = I2C_TRANSMIT_DATA; - - } - break; - case I2C_TRANSMIT_DATA: - if (i2c_nbytes > 0) { - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_RBNE)) { - /* read a byte from the EEPROM */ - if (i2c_nbytes == 2) { - /* wait until BTC bit is set */ - i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT); - /* clear the ACKEN before the ADDSEND is cleared */ - i2c_ack_config(I2C0, I2C_ACK_DISABLE); - } - *i2c_read = i2c_data_receive(I2C0); - i2c_read++; - i2c_nbytes--; - if (i2c_nbytes == 0) { - /* the master sends a stop condition to I2C bus */ - i2c_stop_on_bus(I2C0); - /* disable the I2C0 interrupt */ - i2c_interrupt_disable(I2C0, I2C_INT_ERR); - i2c_interrupt_disable(I2C0, I2C_INT_BUF); - i2c_interrupt_disable(I2C0, I2C_INT_EV); - i2c_process_flag = RESET; - i2c_read_process = I2C_DONE; - } - } - } else { - i2c_read_process = I2C_STOP; - /* the master sends a stop condition to I2C bus */ - i2c_stop_on_bus(I2C0); - /* disable the I2C0 interrupt */ - i2c_interrupt_disable(I2C0, I2C_INT_ERR); - i2c_interrupt_disable(I2C0, I2C_INT_BUF); - i2c_interrupt_disable(I2C0, I2C_INT_EV); - i2c_process_flag = RESET; - i2c_read_process = I2C_DONE; - } - break; - case I2C_STOP: - /* the master sends a stop condition to I2C bus */ - i2c_stop_on_bus(I2C0); - /* disable the I2C0 interrupt */ - i2c_interrupt_disable(I2C0, I2C_INT_ERR); - i2c_interrupt_disable(I2C0, I2C_INT_BUF); - i2c_interrupt_disable(I2C0, I2C_INT_EV); - i2c_process_flag = RESET; - i2c_read_process = I2C_DONE; - break; - default: - break; - } - } } -/*! - \brief handle I2C0 error interrupt request - \param[in] none - \param[out] none - \retval none - */ void I2C0_ER_IRQHandler(void) { - /* no acknowledge received */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_AERR)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_AERR); - i2c_error_code = 1; //NAK - } - - /* SMBus alert */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_SMBALT)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBALT); - i2c_error_code = 2; //SMB Alert - } - - /* bus timeout in SMBus mode */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_SMBTO)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_SMBTO); - i2c_error_code = 3; //SMB Timeout - } - - /* over-run or under-run when SCL stretch is disabled */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_OUERR)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_OUERR); - i2c_error_code = 4; //OverRun - } - - /* arbitration lost */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_LOSTARB)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_LOSTARB); - i2c_error_code = 5; //Lost ARB -- multi master -- shouldnt happen - } - - /* bus error */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_BERR)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_BERR); - i2c_error_code = 6; //Bus Error - } - - /* CRC value doesn't match */ - if (i2c_interrupt_flag_get(I2C0, I2C_INT_FLAG_PECERR)) { - i2c_interrupt_flag_clear(I2C0, I2C_INT_FLAG_PECERR); - i2c_error_code = 7; //CRC Fail -- Shouldnt Happen - } - - i2c_stop_on_bus(I2C0); } diff --git a/workspace/TS100/Core/BSP/Pine64/IRQ.h b/workspace/TS100/Core/BSP/Pine64/IRQ.h index 354a8d6a..e0465ac7 100644 --- a/workspace/TS100/Core/BSP/Pine64/IRQ.h +++ b/workspace/TS100/Core/BSP/Pine64/IRQ.h @@ -34,6 +34,11 @@ typedef enum { I2C_STOP, //Send stop I2C_ABORTED, // I2C_DONE,// I2C transfer is complete + I2C_START , + I2C_END, + I2C_OK, + I2C_SEND_ADDRESS, + I2C_CLEAR_ADDRESS_FLAG, } i2c_process_enum; extern volatile uint8_t i2c_slave_address; extern volatile uint8_t i2c_read_process; diff --git a/workspace/TS100/Core/BSP/Pine64/Setup.c b/workspace/TS100/Core/BSP/Pine64/Setup.c index 08a2c7d4..3dd25f03 100644 --- a/workspace/TS100/Core/BSP/Pine64/Setup.c +++ b/workspace/TS100/Core/BSP/Pine64/Setup.c @@ -35,7 +35,7 @@ void hardware_init() { //Timers setup_timers(); //Watchdog - setup_iwdg(); + setup_iwdg(); /* enable TIMER1 - PWM control timing*/ timer_enable(TIMER1); @@ -65,7 +65,7 @@ void setup_gpio() { gpio_init(OLED_RESET_GPIO_Port, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ, OLED_RESET_Pin); //I2C as AF Open Drain - gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, SDA_Pin | SCL_Pin); + gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, SDA_Pin | SCL_Pin); //PWM output as AF Push Pull gpio_init(PWM_Out_GPIO_Port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, PWM_Out_Pin); @@ -78,15 +78,6 @@ void setup_gpio() { //Remap PB4 away from JTAG NJRST gpio_pin_remap_config(GPIO_SWJ_NONJTRST_REMAP, ENABLE); - //Setup IRQ for USB-PD - gpio_init(FUSB302_IRQ_GPIO_Port, GPIO_MODE_IPU, GPIO_OSPEED_2MHZ, FUSB302_IRQ_Pin); - eclic_irq_enable(EXTI5_9_IRQn, 1, 1); - /* connect key EXTI line to key GPIO pin */ - gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_5); - - /* configure key EXTI line */ - exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_FALLING); - exti_interrupt_flag_clear(EXTI_5); //TODO - rest of pins as floating } @@ -121,7 +112,6 @@ void setup_dma() { } } void setup_i2c() { - //TODO - DMA /* enable I2C0 clock */ rcu_periph_clock_enable(RCU_I2C0); //Setup I20 at 400kHz @@ -130,8 +120,8 @@ void setup_i2c() { i2c_enable(I2C0); /* enable acknowledge */ i2c_ack_config(I2C0, I2C_ACK_ENABLE); - eclic_irq_enable(I2C0_EV_IRQn,1,0); - eclic_irq_enable(I2C0_ER_IRQn,2,0); + eclic_irq_enable(I2C0_EV_IRQn, 1, 0); + eclic_irq_enable(I2C0_ER_IRQn, 2, 0); } void setup_adc() { @@ -290,3 +280,15 @@ void setup_timers() { void setup_iwdg() { //TODO } + +void setupFUSBIRQ() { + //Setup IRQ for USB-PD + gpio_init(FUSB302_IRQ_GPIO_Port, GPIO_MODE_IPU, GPIO_OSPEED_2MHZ, FUSB302_IRQ_Pin); + eclic_irq_enable(EXTI5_9_IRQn, 1, 1); + /* connect key EXTI line to key GPIO pin */ + gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_5); + + /* configure key EXTI line */ + exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_FALLING); + exti_interrupt_flag_clear(EXTI_5); +} diff --git a/workspace/TS100/Core/BSP/Pine64/Setup.h b/workspace/TS100/Core/BSP/Pine64/Setup.h index 805a78de..8bc6fdeb 100644 --- a/workspace/TS100/Core/BSP/Pine64/Setup.h +++ b/workspace/TS100/Core/BSP/Pine64/Setup.h @@ -15,6 +15,7 @@ extern "C" { #endif uint16_t getADC(uint8_t channel); void hardware_init(); +void setupFUSBIRQ(); #ifdef __cplusplus } #endif diff --git a/workspace/TS100/Core/BSP/Pine64/fusb302b.cpp b/workspace/TS100/Core/BSP/Pine64/fusb302b.cpp index 2d1a89b8..1e96dc7c 100644 --- a/workspace/TS100/Core/BSP/Pine64/fusb302b.cpp +++ b/workspace/TS100/Core/BSP/Pine64/fusb302b.cpp @@ -16,6 +16,7 @@ */ #include "Model_Config.h" #ifdef POW_PD +#include "Setup.h" #include "BSP.h" #include "fusb302b.h" #include "I2C_Wrapper.hpp" @@ -133,9 +134,9 @@ void fusb_send_hardrst() { } -void fusb_setup() { +bool fusb_setup() { if (!FRToSI2C::probe(FUSB302B_ADDR)) { - return; + return false; } /* Fully reset the FUSB302B */ fusb_write_byte( FUSB_RESET, FUSB_RESET_SW_RES); @@ -145,7 +146,7 @@ void fusb_setup() { osDelay(10); tries++; if (tries > 5) { - return; //Welp :( + return false; //Welp :( } } @@ -187,6 +188,8 @@ void fusb_setup() { } fusb_reset(); + setupFUSBIRQ(); + return true; } void fusb_get_status(union fusb_status *status) { diff --git a/workspace/TS100/Core/Drivers/FUSB302/fusb302b.h b/workspace/TS100/Core/Drivers/FUSB302/fusb302b.h index bcd66407..1276e276 100644 --- a/workspace/TS100/Core/Drivers/FUSB302/fusb302b.h +++ b/workspace/TS100/Core/Drivers/FUSB302/fusb302b.h @@ -293,7 +293,7 @@ enum fusb_typec_current fusb_get_typec_current(); /* * Initialization routine for the FUSB302B */ -void fusb_setup(); +bool fusb_setup(); /* * Reset the FUSB302B diff --git a/workspace/TS100/Core/Drivers/FUSB302/fusbpd.cpp b/workspace/TS100/Core/Drivers/FUSB302/fusbpd.cpp index fb8c833c..f8624fbe 100644 --- a/workspace/TS100/Core/Drivers/FUSB302/fusbpd.cpp +++ b/workspace/TS100/Core/Drivers/FUSB302/fusbpd.cpp @@ -18,10 +18,11 @@ void fusb302_start_processing() { /* Initialize the FUSB302B */ - fusb_setup(); - PolicyEngine::init(); - ProtocolTransmit::init(); - ProtocolReceive::init(); - InterruptHandler::init(); + if (fusb_setup()) { + PolicyEngine::init(); + ProtocolTransmit::init(); + ProtocolReceive::init(); + InterruptHandler::init(); + } } #endif