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forked from me/IronOS

Cleanup stubs so that LTO can be used on Pinecil

This commit is contained in:
Ben V. Brown
2020-10-31 00:03:44 +11:00
parent 4496cfd41d
commit ba5bd39e43
35 changed files with 639 additions and 537 deletions

View File

@@ -12,392 +12,403 @@ SemaphoreHandle_t FRToSI2C::I2CSemaphore = nullptr;
StaticSemaphore_t FRToSI2C::xSemaphoreBuffer;
#define I2C_TIME_OUT (uint16_t)(5000)
void FRToSI2C::CpltCallback() {
//TODO
//TODO
}
bool FRToSI2C::I2C_RegisterWrite(uint8_t address, uint8_t reg, uint8_t data) {
return Mem_Write(address, reg, &data, 1);
return Mem_Write(address, reg, &data, 1);
}
uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
uint8_t temp = 0;
Mem_Read(add, reg, &temp, 1);
return temp;
uint8_t temp = 0;
Mem_Read(add, reg, &temp, 1);
return temp;
}
bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address, uint8_t *p_buffer, uint16_t number_of_byte) {
if (!lock())
return false;
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
i2c_interrupt_disable(I2C0, I2C_INT_EV);
dma_parameter_struct dma_init_struct;
if (!lock())
return false;
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
i2c_interrupt_disable(I2C0, I2C_INT_EV);
dma_parameter_struct dma_init_struct;
uint8_t state = I2C_START;
uint8_t in_rx_cycle = 0;
uint16_t timeout = 0;
uint8_t i2c_timeout_flag = 0;
while (!(i2c_timeout_flag)) {
switch (state) {
case I2C_START:
if (0 == in_rx_cycle) {
/* disable I2C0 */
i2c_disable(I2C0);
/* enable I2C0 */
i2c_enable(I2C0);
uint8_t state = I2C_START;
uint8_t in_rx_cycle = 0;
uint16_t timeout = 0;
uint8_t tries = 0;
uint8_t i2c_timeout_flag = 0;
while (!(i2c_timeout_flag)) {
switch (state) {
case I2C_START:
tries++;
if (tries > 64) {
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
unlock();
return false;
}
if (0 == in_rx_cycle) {
/* disable I2C0 */
i2c_disable(I2C0);
/* enable I2C0 */
i2c_enable(I2C0);
/* enable acknowledge */
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
/* i2c master sends start signal only when the bus is idle */
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
/* send the start signal */
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
} else {
I2C_Unstick();
timeout = 0;
state = I2C_START;
}
} else {
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
}
break;
case I2C_SEND_ADDRESS:
/* i2c master sends START signal successfully */
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
if (RESET == in_rx_cycle) {
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
state = I2C_CLEAR_ADDRESS_FLAG;
} else {
i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER);
state = I2C_CLEAR_ADDRESS_FLAG;
}
timeout = 0;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
break;
case I2C_CLEAR_ADDRESS_FLAG:
/* address flag set means i2c slave sends ACK */
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
timeout++;
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
}
if (timeout < I2C_TIME_OUT) {
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
timeout = 0;
state = I2C_TRANSMIT_DATA;
} else {
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
break;
case I2C_TRANSMIT_DATA:
if (0 == in_rx_cycle) {
/* wait until the transmit data buffer is empty */
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
//Write out the 8 byte address
i2c_data_transmit(I2C0, read_address);
timeout = 0;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
/* wait until BTC bit is set */
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_START;
in_rx_cycle = 1;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
} else {
/* one byte master reception procedure (polling) */
if (number_of_byte < 2) {
/* disable acknowledge */
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register (I2C_STAT0 has already been read) */
i2c_flag_get(I2C0, I2C_FLAG_ADDSEND);
/* send a stop condition to I2C bus*/
i2c_stop_on_bus(I2C0);
/* wait for the byte to be received */
while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
;
/* read the byte received from the EEPROM */
*p_buffer = i2c_data_receive(I2C0);
/* decrement the read bytes counter */
number_of_byte--;
timeout = 0;
} else { /* more than one byte master reception procedure (DMA) */
dma_deinit(DMA0, DMA_CH6);
dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_addr = (uint32_t)p_buffer;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = number_of_byte;
dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH6, &dma_init_struct);
/* enable acknowledge */
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
/* i2c master sends start signal only when the bus is idle */
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
/* send the start signal */
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
} else {
I2C_Unstick();
timeout = 0;
state = I2C_START;
}
} else {
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
}
break;
case I2C_SEND_ADDRESS:
/* i2c master sends START signal successfully */
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
if (RESET == in_rx_cycle) {
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
state = I2C_CLEAR_ADDRESS_FLAG;
} else {
i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER);
state = I2C_CLEAR_ADDRESS_FLAG;
}
timeout = 0;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
break;
case I2C_CLEAR_ADDRESS_FLAG:
/* address flag set means i2c slave sends ACK */
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
timeout++;
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
}
if (timeout < I2C_TIME_OUT) {
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
timeout = 0;
state = I2C_TRANSMIT_DATA;
} else {
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
break;
case I2C_TRANSMIT_DATA:
if (0 == in_rx_cycle) {
/* wait until the transmit data buffer is empty */
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
//Write out the 8 byte address
i2c_data_transmit(I2C0, read_address);
timeout = 0;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
/* wait until BTC bit is set */
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_START;
in_rx_cycle = 1;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
} else {
/* one byte master reception procedure (polling) */
if (number_of_byte < 2) {
/* disable acknowledge */
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register (I2C_STAT0 has already been read) */
i2c_flag_get(I2C0, I2C_FLAG_ADDSEND);
/* send a stop condition to I2C bus*/
i2c_stop_on_bus(I2C0);
/* wait for the byte to be received */
while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
;
/* read the byte received from the EEPROM */
*p_buffer = i2c_data_receive(I2C0);
/* decrement the read bytes counter */
number_of_byte--;
timeout = 0;
} else { /* more than one byte master reception procedure (DMA) */
dma_deinit(DMA0, DMA_CH6);
dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
dma_init_struct.memory_addr = (uint32_t) p_buffer;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = number_of_byte;
dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH6, &dma_init_struct);
i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
/* enable I2C0 DMA */
i2c_dma_enable(I2C0, I2C_DMA_ON);
/* enable DMA0 channel5 */
dma_channel_enable(DMA0, DMA_CH6);
/* wait until BTC bit is set */
while (!dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
osDelay(1);
}
/* send a stop condition to I2C bus*/
i2c_stop_on_bus(I2C0);
}
timeout = 0;
state = I2C_STOP;
}
break;
case I2C_STOP:
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_END;
i2c_timeout_flag = I2C_OK;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
break;
default:
state = I2C_START;
in_rx_cycle = 0;
i2c_timeout_flag = I2C_OK;
timeout = 0;
break;
}
}
unlock();
return true;
i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
/* enable I2C0 DMA */
i2c_dma_enable(I2C0, I2C_DMA_ON);
/* enable DMA0 channel5 */
dma_channel_enable(DMA0, DMA_CH6);
/* wait until BTC bit is set */
while (!dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
osDelay(1);
}
/* send a stop condition to I2C bus*/
i2c_stop_on_bus(I2C0);
}
timeout = 0;
state = I2C_STOP;
}
break;
case I2C_STOP:
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_END;
i2c_timeout_flag = I2C_OK;
} else {
timeout = 0;
state = I2C_START;
in_rx_cycle = 0;
}
break;
default:
state = I2C_START;
in_rx_cycle = 0;
i2c_timeout_flag = I2C_OK;
timeout = 0;
break;
}
}
unlock();
return true;
}
bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *p_buffer, uint16_t number_of_byte) {
if (!lock())
return false;
if (!lock())
return false;
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
i2c_interrupt_disable(I2C0, I2C_INT_EV);
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
dma_parameter_struct dma_init_struct;
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
i2c_interrupt_disable(I2C0, I2C_INT_EV);
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
dma_parameter_struct dma_init_struct;
uint8_t state = I2C_START;
uint16_t timeout = 0;
bool done = false;
bool timedout = false;
while (!(done || timedout)) {
switch (state) {
case I2C_START:
/* i2c master sends start signal only when the bus is idle */
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
} else {
I2C_Unstick();
timeout = 0;
state = I2C_START;
}
break;
case I2C_SEND_ADDRESS:
/* i2c master sends START signal successfully */
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
timeout = 0;
state = I2C_CLEAR_ADDRESS_FLAG;
} else {
timedout = true;
done = true;
timeout = 0;
state = I2C_START;
}
break;
case I2C_CLEAR_ADDRESS_FLAG:
/* address flag set means i2c slave sends ACK */
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT)) {
timeout++;
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
}
if (timeout < I2C_TIME_OUT) {
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
timeout = 0;
state = I2C_TRANSMIT_DATA;
} else {
//Dont retry as this means a NAK
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
unlock();
return false;
}
break;
case I2C_TRANSMIT_DATA:
/* wait until the transmit data buffer is empty */
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
/* send the EEPROM's internal address to write to : only one byte address */
i2c_data_transmit(I2C0, MemAddress);
timeout = 0;
} else {
timedout = true;
timeout = 0;
state = I2C_START;
}
/* wait until BTC bit is set */
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
;
dma_deinit(DMA0, DMA_CH5);
dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_addr = (uint32_t)p_buffer;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = number_of_byte;
dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH5, &dma_init_struct);
/* enable I2C0 DMA */
i2c_dma_enable(I2C0, I2C_DMA_ON);
/* enable DMA0 channel5 */
dma_channel_enable(DMA0, DMA_CH5);
/* wait until BTC bit is set */
while (!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
osDelay(1);
}
/* wait until BTC bit is set */
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
;
state = I2C_STOP;
break;
case I2C_STOP:
/* send a stop condition to I2C bus */
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_END;
done = true;
} else {
timedout = true;
done = true;
timeout = 0;
state = I2C_START;
}
break;
default:
state = I2C_START;
timeout = 0;
break;
}
}
unlock();
return timedout == false;
uint8_t state = I2C_START;
uint16_t timeout = 0;
bool done = false;
bool timedout = false;
while (!(done || timedout)) {
switch (state) {
case I2C_START:
/* i2c master sends start signal only when the bus is idle */
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
i2c_start_on_bus(I2C0);
timeout = 0;
state = I2C_SEND_ADDRESS;
} else {
I2C_Unstick();
timeout = 0;
state = I2C_START;
}
break;
case I2C_SEND_ADDRESS:
/* i2c master sends START signal successfully */
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
timeout = 0;
state = I2C_CLEAR_ADDRESS_FLAG;
} else {
timedout = true;
done = true;
timeout = 0;
state = I2C_START;
}
break;
case I2C_CLEAR_ADDRESS_FLAG:
/* address flag set means i2c slave sends ACK */
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
timeout++;
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
//Address NACK'd
unlock();
return false;
}
}
if (timeout < I2C_TIME_OUT) {
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
timeout = 0;
state = I2C_TRANSMIT_DATA;
} else {
//Dont retry as this means a NAK
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
unlock();
return false;
}
break;
case I2C_TRANSMIT_DATA:
/* wait until the transmit data buffer is empty */
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
/* send the EEPROM's internal address to write to : only one byte address */
i2c_data_transmit(I2C0, MemAddress);
timeout = 0;
} else {
timedout = true;
timeout = 0;
state = I2C_START;
}
/* wait until BTC bit is set */
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
;
dma_deinit(DMA0, DMA_CH5);
dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
dma_init_struct.memory_addr = (uint32_t) p_buffer;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
dma_init_struct.number = number_of_byte;
dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_init(DMA0, DMA_CH5, &dma_init_struct);
/* enable I2C0 DMA */
i2c_dma_enable(I2C0, I2C_DMA_ON);
/* enable DMA0 channel5 */
dma_channel_enable(DMA0, DMA_CH5);
/* wait until BTC bit is set */
while (!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
osDelay(1);
}
/* wait until BTC bit is set */
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
;
state = I2C_STOP;
break;
case I2C_STOP:
/* send a stop condition to I2C bus */
i2c_stop_on_bus(I2C0);
/* i2c master sends STOP signal successfully */
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
timeout++;
}
if (timeout < I2C_TIME_OUT) {
timeout = 0;
state = I2C_END;
done = true;
} else {
timedout = true;
done = true;
timeout = 0;
state = I2C_START;
}
break;
default:
state = I2C_START;
timeout = 0;
break;
}
}
unlock();
return timedout == false;
}
bool FRToSI2C::Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size) {
return Mem_Write(DevAddress, pData[0], pData + 1, Size - 1);
return Mem_Write(DevAddress, pData[0], pData + 1, Size - 1);
}
bool FRToSI2C::probe(uint16_t DevAddress) {
uint8_t temp[1];
return Mem_Read(DevAddress, 0x00, temp, sizeof(temp));
uint8_t temp[1];
return Mem_Read(DevAddress, 0x00, temp, sizeof(temp));
}
void FRToSI2C::I2C_Unstick() {
unstick_I2C();
unstick_I2C();
}
bool FRToSI2C::lock() {
if (I2CSemaphore == nullptr) {
return false;
}
return xSemaphoreTake(I2CSemaphore, 1000) == pdTRUE;
if (I2CSemaphore == nullptr) {
return false;
}
return xSemaphoreTake(I2CSemaphore, 1000) == pdTRUE;
}
void FRToSI2C::unlock() {
xSemaphoreGive(I2CSemaphore);
xSemaphoreGive(I2CSemaphore);
}
bool FRToSI2C::writeRegistersBulk(const uint8_t address, const I2C_REG *registers, const uint8_t registersLength) {
for (int index = 0; index < registersLength; index++) {
if (!I2C_RegisterWrite(address, registers[index].reg, registers[index].val)) {
return false;
}
if (registers[index].pause_ms) {
delay_ms(registers[index].pause_ms);
}
}
return true;
for (int index = 0; index < registersLength; index++) {
if (!I2C_RegisterWrite(address, registers[index].reg, registers[index].val)) {
return false;
}
if (registers[index].pause_ms) {
delay_ms(registers[index].pause_ms);
}
}
return true;
}

View File

@@ -21,7 +21,7 @@
#define TEMP_TMP36
#define ACCEL_BMA
#define HALL_SENSOR
//#define HALL_SI7210
#define HALL_SI7210
#define BATTFILTERDEPTH 32
#endif

View File

@@ -5,6 +5,7 @@
extern "C" {
#endif
#include "n200_func.h"
#include "riscv_encoding.h"
/*-----------------------------------------------------------

View File

@@ -0,0 +1,13 @@
/* See LICENSE of license details. */
#include <errno.h>
#include <time.h>
#include <stdint.h>
#include "system_gd32vf103.h"
/* Get resolution of clock. */
int clock_getres(clockid_t clock_id, struct timespec *res)
{
res->tv_sec = 0;
res->tv_nsec = 1000000000 / SystemCoreClock;
return 0;
}

View File

@@ -0,0 +1,20 @@
/* See LICENSE of license details. */
#include <errno.h>
#include <time.h>
#include <sys/time.h>
extern int _gettimeofday(struct timeval *tp, void *tzp);
/* Get current value of CLOCK and store it in tp. */
int clock_gettime(clockid_t clock_id, struct timespec *tp)
{
struct timeval tv;
int retval = -1;
retval = _gettimeofday(&tv, NULL);
if (retval == 0) {
TIMEVAL_TO_TIMESPEC(&tv, tp);
}
return retval;
}

View File

@@ -0,0 +1,9 @@
/* See LICENSE of license details. */
#include <errno.h>
#include <time.h>
/* Set CLOCK to value TP. */
int clock_settime(clockid_t clock_id, const struct timespec *tp)
{
return -1;
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _close(int fd)
{
errno = EBADF;
return -1;
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}

View File

@@ -0,0 +1,9 @@
/* See LICENSE of license details. */
#include "n200_func.h"
void _exit(int fd)
{
while(1) {
__WFI();
}
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int fork(void)
{
errno = EAGAIN;
return -1;
}

View File

@@ -0,0 +1,18 @@
/* See LICENSE of license details. */
#include <errno.h>
#include <sys/stat.h>
#include <unistd.h>
#undef errno
extern int errno;
int _fstat(int file, struct stat *st)
{
if ((STDOUT_FILENO == file) || (STDERR_FILENO == file)) {
st->st_mode = S_IFCHR;
return 0;
} else {
errno = EBADF;
return -1;
}
}

View File

@@ -0,0 +1,7 @@
/* See LICENSE of license details. */
#include <errno.h>
int getpid(void)
{
return 1;
}

View File

@@ -0,0 +1,14 @@
/* See LICENSE of license details. */
#include <errno.h>
#include <sys/time.h>
#include "system_gd32vf103.h"
int _gettimeofday(struct timeval *tp, void *tzp)
{
uint64_t cycles;
cycles = __get_rv_cycle();
tp->tv_sec = cycles / SystemCoreClock;
tp->tv_usec = (cycles % SystemCoreClock) * 1000000 / SystemCoreClock;
return 0;
}

View File

@@ -0,0 +1,7 @@
/* See LICENSE of license details. */
#include <unistd.h>
int _isatty(int fd)
{
return 1;
}

View File

@@ -0,0 +1,10 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}

View File

@@ -0,0 +1,10 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _lseek(int file, int offset, int whence)
{
return 0;
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _open(const char *name, int flags, int mode)
{
errno = ENOSYS;
return -1;
}

View File

@@ -0,0 +1,10 @@
/* See LICENSE of license details. */
#include <stdint.h>
#include <errno.h>
#include <unistd.h>
#include <sys/types.h>
ssize_t _read(int fd, void* ptr, size_t len) {
return -1;
}

View File

@@ -0,0 +1,9 @@
/* See LICENSE of license details. */
#include <stdint.h>
#include <stddef.h>
#include <unistd.h>
void *_sbrk(ptrdiff_t incr)
{
return (void *)0;
}

View File

@@ -0,0 +1,8 @@
/* See LICENSE of license details. */
#include <sys/stat.h>
int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}

View File

@@ -0,0 +1,26 @@
/* See LICENSE of license details. */
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
extern int _gettimeofday(struct timeval *, void *);
clock_t _times(struct tms *buf)
{
static struct timeval t0;
struct timeval t;
long long utime;
/* When called for the first time, initialize t0. */
if (t0.tv_sec == 0 && t0.tv_usec == 0) {
_gettimeofday(&t0, 0);
}
_gettimeofday(&t, 0);
utime = (t.tv_sec - t0.tv_sec) * 1000000 + (t.tv_usec - t0.tv_usec);
buf->tms_utime = utime * CLOCKS_PER_SEC / 1000000;
buf->tms_stime = buf->tms_cstime = buf->tms_cutime = 0;
return buf->tms_utime;
}

View File

@@ -0,0 +1,11 @@
/* See LICENSE of license details. */
#include <errno.h>
#undef errno
extern int errno;
int _unlink(const char *name)
{
return -1;
}

View File

@@ -0,0 +1,12 @@
/* See LICENSE of license details. */
#include <sys/stat.h>
#include <errno.h>
#undef errno
extern int errno;
int _wait(int *status)
{
errno = ECHILD;
return -1;
}

View File

@@ -1,13 +1,11 @@
/* See LICENSE of license details. */
#include <stdint.h>
#include <errno.h>
#include <unistd.h>
#include <sys/types.h>
#include "stub.h"
ssize_t _read(int fd, void* ptr, size_t len)
ssize_t _write(int fd, const void* ptr, size_t len)
{
return _stub(EBADF);
return -1;
}

View File

@@ -6,7 +6,6 @@
#include "n200_func.h"
__attribute__((weak)) uintptr_t handle_nmi() {
write(1, "nmi\n", 5);
_exit(1);
return 0;
}
@@ -15,10 +14,6 @@ __attribute__((weak)) uintptr_t handle_trap(uintptr_t mcause, uintptr_t sp) {
if ((mcause & 0xFFF) == 0xFFF) {
handle_nmi();
}
write(1, "trap\n", 5);
printf("In trap handler, the mcause is %d\n", mcause);
printf("In trap handler, the mepc is 0x%x\n", read_csr(mepc));
printf("In trap handler, the mtval is 0x%x\n", read_csr(mbadaddr));
_exit(mcause);
return 0;
}

View File

@@ -32,3 +32,5 @@ void _init()
void _fini()
{
}

View File

@@ -14,9 +14,8 @@ static inline int _stub(int err) {
return -1;
}
void _exit(int code);
#endif /* _NUCLEI_SYS_STUB_H */
#ifdef __cplusplus
}
#endif
#endif

View File

@@ -1,47 +0,0 @@
/* See LICENSE of license details. */
#include <stdint.h>
#include <string.h>
#include <errno.h>
#include <gd32vf103.h>
#include <unistd.h>
#include <sys/types.h>
#include "stub.h"
#include "gd32vf103.h"
typedef unsigned int size_t;
extern int _put_char(int ch) __attribute__((weak));
ssize_t _write(int fd, const void* ptr, size_t len) {
const uint8_t * current = (const uint8_t *) ptr;
// if (isatty(fd))
{
for (size_t jj = 0; jj < len; jj++) {
_put_char(current[jj]);
if (current[jj] == '\n') {
_put_char('\r');
}
}
return len;
}
return _stub(EBADF);
}
int puts(const char* string) {
return _write(0, (const void *) string, strlen(string));
}
int _put_char(int ch)
{
usart_data_transmit(USART0, (uint8_t) ch );
while (usart_flag_get(USART0, USART_FLAG_TBE)== RESET){
}
return ch;
}

View File

@@ -3,7 +3,7 @@
#ifndef N200_FUNC_H
#define N200_FUNC_H
#include <stdio.h>
#include <stddef.h>
#include "n200_timer.h"
#include "n200_eclic.h"

View File

@@ -14,15 +14,16 @@
bool hall_effect_present = false;
void postRToSInit() {
// Any after RTos setup
#ifdef POW_PD
//Spawn all of the USB-C processors
fusb302_start_processing();
#endif
#ifdef HALL_SI7210
if (Si7210::detect()) {
hall_effect_present = Si7210::init();
}
#endif
#ifdef POW_PD
//Spawn all of the USB-C processors
fusb302_start_processing();
#endif
}
int16_t getRawHallEffect() {
if (hall_effect_present) {

View File

@@ -9,7 +9,9 @@
#include "Si7210_defines.h"
#include "I2C_Wrapper.hpp"
bool Si7210::detect() {
return FRToSI2C::probe(SI7210_ADDRESS);
uint8_t temp;
return FRToSI2C::Mem_Read(SI7210_ADDRESS, SI7210_REG_ID, &temp, 1);
//Cant use normal probe as reg 0x00 is not used
}
bool Si7210::init() {
@@ -30,6 +32,6 @@ bool Si7210::init() {
int16_t Si7210::read() {
//Read the two regs
int16_t temp = 0;
FRToSI2C::Mem_Read(SI7210_ADDRESS, SI7210_REG_DATAH,(uint8_t*) &temp, 2);
FRToSI2C::Mem_Read(SI7210_ADDRESS, SI7210_REG_DATAH, (uint8_t*) &temp, 2);
return __builtin_bswap16(temp);
}

View File

@@ -8,16 +8,6 @@
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
//#undef errno
extern int errno;
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
register char *stack_ptr asm("sp");
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles() {
@@ -27,88 +17,3 @@ int _getpid(void) {
return 1;
}
int _kill(int pid, int sig) {
errno = EINVAL;
return -1;
}
void _exit(int status) {
_kill(status, -1);
while (1) {
} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len) {
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++) {
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len) {
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++) {
__io_putchar(*ptr++);
}
return len;
}
int _close(int file) {
return -1;
}
int _fstat(int file, struct stat *st) {
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file) {
return 1;
}
int _lseek(int file, int ptr, int dir) {
return 0;
}
int _open(char *path, int flags, ...) {
/* Pretend like we always fail */
return -1;
}
int _wait(int *status) {
errno = ECHILD;
return -1;
}
int _unlink(char *name) {
errno = ENOENT;
return -1;
}
int _times(struct tms *buf) {
return -1;
}
int _stat(char *file, struct stat *st) {
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new) {
errno = EMLINK;
return -1;
}
int _fork(void) {
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env) {
errno = ENOMEM;
return -1;
}

View File

@@ -1,18 +0,0 @@
/* Includes */
#include <errno.h>
#include <stdio.h>
/* Variables */
extern int errno;
register char *stack_ptr asm("sp");
/* Functions */
/**
_sbrk
Increase program data space. Malloc and related functions depend on this
**/
caddr_t _sbrk(int incr) {
return (void*) -1;
}

View File

@@ -386,7 +386,6 @@ static bool shouldBeSleeping() {
#ifdef HALL_SENSOR
//If the hall effect sensor is enabled in the build, check if its over threshold, and if so then we force sleep
#endif
return false;
}
@@ -620,9 +619,7 @@ uint8_t idleScreenBGF[sizeof(idleScreenBG)];
/* StartGUITask function */
void startGUITask(void const *argument __unused) {
OLED::initialize(); // start up the LCD
// for (;;) {
// osDelay(2000);
// }
uint8_t tempWarningState = 0;
bool buttonLockout = false;
bool tempOnDisplay = false;
@@ -657,6 +654,14 @@ void startGUITask(void const *argument __unused) {
OLED::refresh();
waitForButtonPressOrTimeout(10000);
}
if (getHallSensorFitted()) {
OLED::clearScreen();
OLED::setFont(1);
OLED::setCursor(0, 0);
OLED::printNumber(5000, 4, 0);
OLED::refresh();
waitForButtonPressOrTimeout(10000);
}
if (systemSettings.autoStartMode) {
// jump directly to the autostart mode
if (systemSettings.autoStartMode == 1) {