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Roughing out scheduling timer0

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This commit is contained in:
Ben V. Brown
2022-04-13 20:46:51 +10:00
parent d4e27a5b9b
commit 8ec723a749
7 changed files with 158 additions and 112 deletions
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48
source/Core/BSP/Magic/Setup.cpp
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@@ -11,8 +11,15 @@
#include "Pins.h"
extern "C" {
#include "bflb_platform.h"
#include "bl702_glb.h"
#include "bl702_i2c.h"
#include "bl702_pwm.h"
#include "bl702_timer.h"
#include "hal_clock.h"
#include "hal_pwm.h"
#include "hal_timer.h"
}
#include "IRQ.h"
#include "history.hpp"
#include <string.h>
#define ADC_NORM_SAMPLES 16
@@ -21,12 +28,53 @@ uint16_t ADCReadings[ADC_NORM_SAMPLES]; // room for 32 lots of the pair of readi
// Functions
void setup_slow_PWM();
void hardware_init() {
gpio_set_mode(OLED_RESET_Pin, GPIO_OUTPUT_MODE);
// gpio_set_mode(KEY_A_Pin, GPIO_INPUT_PD_MODE);
// gpio_set_mode(KEY_B_Pin, GPIO_INPUT_PD_MODE);
setup_slow_PWM();
}
struct device *timer0;
volatile uint32_t cnt = 0;
void setup_slow_PWM() {
timer_register(TIMER0_INDEX, "timer0");
timer0 = device_find("timer0");
if (timer0) {
device_open(timer0, DEVICE_OFLAG_INT_TX); /* 1s,2s,3s timing*/
// Set interrupt handler
device_set_callback(timer0, timer0_irq_callback);
// Enable both interrupts (0 and 1)
device_control(timer0, DEVICE_CTRL_SET_INT, (void *)(TIMER_COMP0_IT | TIMER_COMP1_IT | TIMER_COMP2_IT));
TIMER_SetCompValue(TIMER_CH0, TIMER_COMP_ID_0, 255 + 10 - 2); // Channel 0 is used to trigger the ADC
TIMER_SetCompValue(TIMER_CH0, TIMER_COMP_ID_1, 128 - 2);
TIMER_SetCompValue(TIMER_CH0, TIMER_COMP_ID_2, (255 + 10 + 10) - 2); // We are using compare 2 to set the max duration of the timer
TIMER_SetPreloadValue(TIMER_CH0, 0);
TIMER_SetCountMode(TIMER_CH0, TIMER_COUNT_PRELOAD);
} else {
MSG((char *)"timer device open failed! \n");
}
}
/*
* ADC
* ADC is a bit of a mess as we dont have injected mode sampling to use with timers on this device
* So instead we do this:
*
* Main timer0 runs at 5/10hz and schedules everything
* Its running PWM in the 0-255 range for tip control + sample time at the end of the ADC
* It triggers the ADC at the end of the PWM cycle
*
*
*/
uint16_t getADCHandleTemp(uint8_t sample) {
static history<uint16_t, ADC_FILTER_LEN> filter = {{0}, 0, 0};
if (sample) {