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Move to latest HAL release trying to get I2C DMA to be more reliable, and known good point.

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Cleans up some redundant calls as well to make some flash room.
This commit is contained in:
Ben V. Brown
2018-12-16 18:13:59 +11:00
parent b744f51e2d
commit 873eb2a1e9
135 changed files with 9319 additions and 6521 deletions
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9
workspace/TS100/HAL_Driver/Inc/stm32f1xx_ll_tim.h
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@@ -2,8 +2,6 @@
******************************************************************************
* @file stm32f1xx_ll_tim.h
* @author MCD Application Team
* @version V1.1.1
* @date 12-May-2017
* @brief Header file of TIM LL module.
******************************************************************************
* @attention
@@ -1059,7 +1057,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx)
*/
__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
{
SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
}
/**
@@ -1070,7 +1068,7 @@ __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
*/
__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
{
CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
}
/**
@@ -1150,6 +1148,9 @@ __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx)
* @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
* check whether or not the counter mode selection feature is supported
* by a timer instance.
* @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
* requires a timer reset to avoid unexpected direction
* due to DIR bit readonly in center aligned mode.
* @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
* CR1 CMS LL_TIM_SetCounterMode
* @param TIMx Timer instance