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Migrate :O

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This commit is contained in:
Ben V. Brown
2019-08-18 22:24:01 +10:00
parent 09ce60f658
commit 7ca613e22b
259 changed files with 116330 additions and 309009 deletions
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4
.gitignore vendored
View File

@@ -53,3 +53,7 @@ Translation Editor/.vscode/
Translation Editor/__pycache__/ Translation Editor/__pycache__/
*.pyc *.pyc
workspace/TS100/src/Translation.cpp workspace/TS100/src/Translation.cpp
*.lst
*.mk
*.list
workspace/TS100/Release/TS100.hex

2
Translation Editor/make_translation.py
View File

@@ -430,7 +430,7 @@ def read_opts():
if len(sys.argv) > 2: if len(sys.argv) > 2:
outFile = sys.argv[2] outFile = sys.argv[2]
else: else:
outDir = os.path.relpath(jsonDir + "/../workspace/TS100/src/") outDir = os.path.relpath(jsonDir + "/../workspace/TS100/Core/Src")
outFile = os.path.join(outDir, TRANSLATION_CPP) outFile = os.path.join(outDir, TRANSLATION_CPP)
if len(sys.argv) > 3: if len(sys.argv) > 3:

12
workspace/RemoteSystemsTempFiles/.project
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@@ -1,12 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>RemoteSystemsTempFiles</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
</buildSpec>
<natures>
<nature>org.eclipse.rse.ui.remoteSystemsTempNature</nature>
</natures>
</projectDescription>

BIN
workspace/TS100/..cproject.swp
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Binary file not shown.

184
workspace/TS100/.cproject
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@@ -1,113 +1,109 @@
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<tool id="fr.ac6.managedbuild.tool.gnu.archiver.1863989965" name="MCU GCC Archiver" superClass="fr.ac6.managedbuild.tool.gnu.archiver"/> <tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1902507185" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
<tool id="fr.ac6.managedbuild.tool.gnu.cross.assembler.2093484706" name="MCU GCC Assembler" superClass="fr.ac6.managedbuild.tool.gnu.cross.assembler"> <option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.752998" name="Linker Script (-T)" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" useByScannerDiscovery="false" value="/home/ralim/source/ts100/workspace/TS100/LinkerScript.ld" valueType="string"/>
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<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.202432297" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.796590488" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.566015042" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1489612670" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1442634952" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
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<sourceEntries> <sourceEntries>
<entry excluding="Src/stm32f1xx_hal_timebase_tim_template.c|Src/stm32f1xx_hal_timebase_rtc_wakeup_template.c|Src/stm32f1xx_hal_timebase_rtc_alarm_template.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="HAL_Driver"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
<entry excluding="Third_Party/FreeRTOS/Source/portable/MemMang/heap_1.c|Third_Party/FreeRTOS/Source/portable/MemMang/heap_2.c|Third_Party/FreeRTOS/Source/portable/MemMang/heap_3.c|Third_Party/FreeRTOS/Source/portable/MemMang/heap_5.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Core"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="inc"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Middlewares"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="src"/> <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Drivers"/>
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="startup"/>
</sourceEntries> </sourceEntries>
</configuration> </configuration>
</storageModule> </storageModule>
@@ -115,32 +111,18 @@
</cconfiguration> </cconfiguration>
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5
workspace/TS100/.gitignore vendored
View File

@@ -1,5 +0,0 @@
/Debug/
/Release/
/Hexfile/
/Objects/

28
workspace/TS100/.mxproject Normal file
View File

File diff suppressed because one or more lines are too long

7
workspace/TS100/.project
View File

@@ -19,10 +19,13 @@
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<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
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30
workspace/TS100/.settings/language.settings.xml
View File

@@ -1,15 +1,15 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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73
workspace/TS100/.settings/org.eclipse.cdt.codan.core.prefs
View File

@@ -1,73 +0,0 @@
eclipse.preferences.version=1
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org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem=Error
org.eclipse.cdt.codan.internal.checkers.InvalidTemplateArgumentsProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid template argument\\")"}
org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem=Error
org.eclipse.cdt.codan.internal.checkers.LabelStatementNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Label statement not found\\")"}
org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem=Error
org.eclipse.cdt.codan.internal.checkers.MemberDeclarationNotFoundProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Member declaration not found\\")"}
org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem=Error
org.eclipse.cdt.codan.internal.checkers.MethodResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Method cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker=-Info
org.eclipse.cdt.codan.internal.checkers.NamingConventionFunctionChecker.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Name convention for function\\")",pattern\=>"^[a-z]",macro\=>true,exceptions\=>()}
org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem=Warning
org.eclipse.cdt.codan.internal.checkers.NonVirtualDestructorProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Class has a virtual method and non-virtual destructor\\")"}
org.eclipse.cdt.codan.internal.checkers.OverloadProblem=Error
org.eclipse.cdt.codan.internal.checkers.OverloadProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid overload\\")"}
org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem=Error
org.eclipse.cdt.codan.internal.checkers.RedeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redeclaration\\")"}
org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem=Error
org.eclipse.cdt.codan.internal.checkers.RedefinitionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Invalid redefinition\\")"}
org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.ReturnStyleProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Return with parenthesis\\")"}
org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem=-Warning
org.eclipse.cdt.codan.internal.checkers.ScanfFormatStringSecurityProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Format String Vulnerability\\")"}
org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem=Warning
org.eclipse.cdt.codan.internal.checkers.StatementHasNoEffectProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Statement has no effect\\")",macro\=>true,exceptions\=>()}
org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem=Warning
org.eclipse.cdt.codan.internal.checkers.SuggestedParenthesisProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suggested parenthesis around expression\\")",paramNot\=>false}
org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem=Warning
org.eclipse.cdt.codan.internal.checkers.SuspiciousSemicolonProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Suspicious semicolon\\")",else\=>false,afterelse\=>false}
org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem=Error
org.eclipse.cdt.codan.internal.checkers.TypeResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Type cannot be resolved\\")"}
org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem=Warning
org.eclipse.cdt.codan.internal.checkers.UnusedFunctionDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused function declaration\\")",macro\=>true}
org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem=Warning
org.eclipse.cdt.codan.internal.checkers.UnusedStaticFunctionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused static function\\")",macro\=>true}
org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem=Warning
org.eclipse.cdt.codan.internal.checkers.UnusedVariableDeclarationProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Unused variable declaration in file scope\\")",macro\=>true,exceptions\=>("@(\#)","$Id")}
org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem=Error
org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"}

2
workspace/TS100/.settings/org.eclipse.core.resources.prefs
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eclipse.preferences.version=1
encoding/<project>=UTF-8

66
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{
"configurations": [
{
"name": "Mac",
"includePath": [
"/usr/include",
"/usr/local/include",
"${workspaceFolder}"
],
"defines": ["STM32F103T8Ux","STM32F1","STM32","USE_HAL_DRIVER","STM32F103xB","USE_RTOS_SYSTICK"],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
"/usr/include",
"/usr/local/include",
"${workspaceFolder}"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
},
"macFrameworkPath": [
"/System/Library/Frameworks",
"/Library/Frameworks"
]
},
{
"name": "STM32",
"includePath": [
"${workspaceFolder}",
"/usr/include/c++/5",
"/usr/include/x86_64-linux-gnu/c++/5",
"/usr/include/c++/5/backward",
"/usr/lib/llvm-5.0/lib/clang/5.0.0/include",
"/usr/local/include",
"/usr/include/x86_64-linux-gnu",
"/usr/include",
"${workspaceFolder}/inc",
"${workspaceFolder}/HAL_Driver/Inc",
"${workspaceFolder}/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
"${workspaceFolder}/CMSIS/device",
"${workspaceFolder}/Middlewares/Third_Party/FreeRTOS/Source/include",
"${workspaceFolder}/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3"
],
"defines": [],
"intelliSenseMode": "clang-x64",
"browse": {
"path": [
"${workspaceFolder}",
"/usr/include/c++/5",
"/usr/include/x86_64-linux-gnu/c++/5",
"/usr/include/c++/5/backward",
"/usr/lib/llvm-5.0/lib/clang/5.0.0/include",
"/usr/local/include",
"/usr/include/x86_64-linux-gnu",
"/usr/include"
],
"limitSymbolsToIncludedHeaders": true,
"databaseFilename": ""
},
"compilerPath": "/usr/bin/clang++-5.0",
"cStandard": "c11",
"cppStandard": "c++17"
}
],
"version": 3
}

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workspace/TS100/inc/LIS2DH12_defines.hpp → workspace/TS100/Core/Inc/LIS2DH12_defines.hpp
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workspace/TS100/inc/MMA8652FC_defines.h → workspace/TS100/Core/Inc/MMA8652FC_defines.h
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workspace/TS100/CMSIS/device/stm32f1xx.h → workspace/TS100/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h
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@@ -1,238 +1,238 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx.h * @file stm32f1xx.h
* @author MCD Application Team * @author MCD Application Team
* @version V4.2.0 * @version V4.2.0
* @date 31-March-2017 * @date 31-March-2017
* @brief CMSIS STM32F1xx Device Peripheral Access Layer Header File. * @brief CMSIS STM32F1xx Device Peripheral Access Layer Header File.
* *
* The file is the unique include file that the application programmer * The file is the unique include file that the application programmer
* is using in the C source code, usually in main.c. This file contains: * is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select: * - Configuration section that allows to select:
* - The STM32F1xx device used in the target application * - The STM32F1xx device used in the target application
* - To use or not the peripheral’s drivers in application code(i.e. * - To use or not the peripheral’s drivers in application code(i.e.
* code will be based on direct access to peripheral’s registers * code will be based on direct access to peripheral’s registers
* rather than drivers API), this option is controlled by * rather than drivers API), this option is controlled by
* "#define USE_HAL_DRIVER" * "#define USE_HAL_DRIVER"
* *
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/** @addtogroup CMSIS /** @addtogroup CMSIS
* @{ * @{
*/ */
/** @addtogroup stm32f1xx /** @addtogroup stm32f1xx
* @{ * @{
*/ */
#ifndef __STM32F1XX_H #ifndef __STM32F1XX_H
#define __STM32F1XX_H #define __STM32F1XX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
/** @addtogroup Library_configuration_section /** @addtogroup Library_configuration_section
* @{ * @{
*/ */
/** /**
* @brief STM32 Family * @brief STM32 Family
*/ */
#if !defined (STM32F1) #if !defined (STM32F1)
#define STM32F1 #define STM32F1
#endif /* STM32F1 */ #endif /* STM32F1 */
/* Uncomment the line below according to the target STM32L device used in your /* Uncomment the line below according to the target STM32L device used in your
application application
*/ */
#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \ #if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
!defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \ !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
!defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC) !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
/* #define STM32F100xB */ /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */ /* #define STM32F100xB */ /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
/* #define STM32F100xE */ /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */ /* #define STM32F100xE */ /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
/* #define STM32F101x6 */ /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */ /* #define STM32F101x6 */ /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
/* #define STM32F101xB */ /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */ /* #define STM32F101xB */ /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
/* #define STM32F101xE */ /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */ /* #define STM32F101xE */ /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */
/* #define STM32F101xG */ /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */ /* #define STM32F101xG */ /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
/* #define STM32F102x6 */ /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */ /* #define STM32F102x6 */ /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
/* #define STM32F102xB */ /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */ /* #define STM32F102xB */ /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
/* #define STM32F103x6 */ /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */ /* #define STM32F103x6 */ /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
/* #define STM32F103xB */ /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */ /* #define STM32F103xB */ /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
/* #define STM32F103xE */ /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */ /* #define STM32F103xE */ /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
/* #define STM32F103xG */ /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */ /* #define STM32F103xG */ /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
/* #define STM32F105xC */ /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */ /* #define STM32F105xC */ /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
/* #define STM32F107xC */ /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */ /* #define STM32F107xC */ /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */
#endif #endif
/* Tip: To avoid modifying this file each time you need to switch between these /* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor. devices, you can define the device in your toolchain compiler preprocessor.
*/ */
#if !defined (USE_HAL_DRIVER) #if !defined (USE_HAL_DRIVER)
/** /**
* @brief Comment the line below if you will not use the peripherals drivers. * @brief Comment the line below if you will not use the peripherals drivers.
In this case, these drivers will not be included and the application code will In this case, these drivers will not be included and the application code will
be based on direct access to peripherals registers be based on direct access to peripherals registers
*/ */
/*#define USE_HAL_DRIVER */ /*#define USE_HAL_DRIVER */
#endif /* USE_HAL_DRIVER */ #endif /* USE_HAL_DRIVER */
/** /**
* @brief CMSIS Device version number V4.2.0 * @brief CMSIS Device version number V4.2.0
*/ */
#define __STM32F1_CMSIS_VERSION_MAIN (0x04) /*!< [31:24] main version */ #define __STM32F1_CMSIS_VERSION_MAIN (0x04) /*!< [31:24] main version */
#define __STM32F1_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */ #define __STM32F1_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F1_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ #define __STM32F1_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32F1_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F1_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F1_CMSIS_VERSION ((__STM32F1_CMSIS_VERSION_MAIN << 24)\ #define __STM32F1_CMSIS_VERSION ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
|(__STM32F1_CMSIS_VERSION_SUB1 << 16)\ |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
|(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\ |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
|(__STM32F1_CMSIS_VERSION_RC)) |(__STM32F1_CMSIS_VERSION_RC))
/** /**
* @} * @}
*/ */
/** @addtogroup Device_Included /** @addtogroup Device_Included
* @{ * @{
*/ */
#if defined(STM32F100xB) #if defined(STM32F100xB)
#include "stm32f100xb.h" #include "stm32f100xb.h"
#elif defined(STM32F100xE) #elif defined(STM32F100xE)
#include "stm32f100xe.h" #include "stm32f100xe.h"
#elif defined(STM32F101x6) #elif defined(STM32F101x6)
#include "stm32f101x6.h" #include "stm32f101x6.h"
#elif defined(STM32F101xB) #elif defined(STM32F101xB)
#include "stm32f101xb.h" #include "stm32f101xb.h"
#elif defined(STM32F101xE) #elif defined(STM32F101xE)
#include "stm32f101xe.h" #include "stm32f101xe.h"
#elif defined(STM32F101xG) #elif defined(STM32F101xG)
#include "stm32f101xg.h" #include "stm32f101xg.h"
#elif defined(STM32F102x6) #elif defined(STM32F102x6)
#include "stm32f102x6.h" #include "stm32f102x6.h"
#elif defined(STM32F102xB) #elif defined(STM32F102xB)
#include "stm32f102xb.h" #include "stm32f102xb.h"
#elif defined(STM32F103x6) #elif defined(STM32F103x6)
#include "stm32f103x6.h" #include "stm32f103x6.h"
#elif defined(STM32F103xB) #elif defined(STM32F103xB)
#include "stm32f103xb.h" #include "stm32f103xb.h"
#elif defined(STM32F103xE) #elif defined(STM32F103xE)
#include "stm32f103xe.h" #include "stm32f103xe.h"
#elif defined(STM32F103xG) #elif defined(STM32F103xG)
#include "stm32f103xg.h" #include "stm32f103xg.h"
#elif defined(STM32F105xC) #elif defined(STM32F105xC)
#include "stm32f105xc.h" #include "stm32f105xc.h"
#elif defined(STM32F107xC) #elif defined(STM32F107xC)
#include "stm32f107xc.h" #include "stm32f107xc.h"
#else #else
#error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)" #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
#endif #endif
/** /**
* @} * @}
*/ */
/** @addtogroup Exported_types /** @addtogroup Exported_types
* @{ * @{
*/ */
typedef enum typedef enum
{ {
RESET = 0, RESET = 0,
SET = !RESET SET = !RESET
} FlagStatus, ITStatus; } FlagStatus, ITStatus;
typedef enum typedef enum
{ {
DISABLE = 0, DISABLE = 0,
ENABLE = !DISABLE ENABLE = !DISABLE
} FunctionalState; } FunctionalState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
typedef enum typedef enum
{ {
ERROR = 0, ERROR = 0,
SUCCESS = !ERROR SUCCESS = !ERROR
} ErrorStatus; } ErrorStatus;
/** /**
* @} * @}
*/ */
/** @addtogroup Exported_macros /** @addtogroup Exported_macros
* @{ * @{
*/ */
#define SET_BIT(REG, BIT) ((REG) |= (BIT)) #define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT)) #define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0)) #define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL)) #define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG)) #define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
/** /**
* @} * @}
*/ */
#if defined (USE_HAL_DRIVER) #if defined (USE_HAL_DRIVER)
#include "stm32f1xx_hal.h" #include "stm32f1xx_hal.h"
#endif /* USE_HAL_DRIVER */ #endif /* USE_HAL_DRIVER */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* __cplusplus */ #endif /* __cplusplus */
#endif /* __STM32F1xx_H */ #endif /* __STM32F1xx_H */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

232
workspace/TS100/CMSIS/device/system_stm32f1xx.h → workspace/TS100/Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h
View File

@@ -1,116 +1,116 @@
/** /**
****************************************************************************** ******************************************************************************
* @file system_stm32f10x.h * @file system_stm32f10x.h
* @author MCD Application Team * @author MCD Application Team
* @version V4.2.0 * @version V4.2.0
* @date 31-March-2017 * @date 31-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/** @addtogroup CMSIS /** @addtogroup CMSIS
* @{ * @{
*/ */
/** @addtogroup stm32f10x_system /** @addtogroup stm32f10x_system
* @{ * @{
*/ */
/** /**
* @brief Define to prevent recursive inclusion * @brief Define to prevent recursive inclusion
*/ */
#ifndef __SYSTEM_STM32F10X_H #ifndef __SYSTEM_STM32F10X_H
#define __SYSTEM_STM32F10X_H #define __SYSTEM_STM32F10X_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/** @addtogroup STM32F10x_System_Includes /** @addtogroup STM32F10x_System_Includes
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F10x_System_Exported_types /** @addtogroup STM32F10x_System_Exported_types
* @{ * @{
*/ */
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */ extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */
extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */ extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F10x_System_Exported_Constants /** @addtogroup STM32F10x_System_Exported_Constants
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F10x_System_Exported_Macros /** @addtogroup STM32F10x_System_Exported_Macros
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** @addtogroup STM32F10x_System_Exported_Functions /** @addtogroup STM32F10x_System_Exported_Functions
* @{ * @{
*/ */
extern void SystemInit(void); extern void SystemInit(void);
extern void SystemCoreClockUpdate(void); extern void SystemCoreClockUpdate(void);
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__SYSTEM_STM32F10X_H */ #endif /*__SYSTEM_STM32F10X_H */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

272
workspace/TS100/CMSIS/core/arm_common_tables.h → workspace/TS100/Drivers/CMSIS/Include/arm_common_tables.h
View File

@@ -1,136 +1,136 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. October 2015 * $Date: 19. October 2015
* $Revision: V.1.4.5 a * $Revision: V.1.4.5 a
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_common_tables.h * Title: arm_common_tables.h
* *
* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* - Redistributions of source code must retain the above copyright * - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright * - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors * - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this * may be used to endorse or promote products derived from this
* software without specific prior written permission. * software without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#ifndef _ARM_COMMON_TABLES_H #ifndef _ARM_COMMON_TABLES_H
#define _ARM_COMMON_TABLES_H #define _ARM_COMMON_TABLES_H
#include "arm_math.h" #include "arm_math.h"
extern const uint16_t armBitRevTable[1024]; extern const uint16_t armBitRevTable[1024];
extern const q15_t armRecipTableQ15[64]; extern const q15_t armRecipTableQ15[64];
extern const q31_t armRecipTableQ31[64]; extern const q31_t armRecipTableQ31[64];
/* extern const q31_t realCoefAQ31[1024]; */ /* extern const q31_t realCoefAQ31[1024]; */
/* extern const q31_t realCoefBQ31[1024]; */ /* extern const q31_t realCoefBQ31[1024]; */
extern const float32_t twiddleCoef_16[32]; extern const float32_t twiddleCoef_16[32];
extern const float32_t twiddleCoef_32[64]; extern const float32_t twiddleCoef_32[64];
extern const float32_t twiddleCoef_64[128]; extern const float32_t twiddleCoef_64[128];
extern const float32_t twiddleCoef_128[256]; extern const float32_t twiddleCoef_128[256];
extern const float32_t twiddleCoef_256[512]; extern const float32_t twiddleCoef_256[512];
extern const float32_t twiddleCoef_512[1024]; extern const float32_t twiddleCoef_512[1024];
extern const float32_t twiddleCoef_1024[2048]; extern const float32_t twiddleCoef_1024[2048];
extern const float32_t twiddleCoef_2048[4096]; extern const float32_t twiddleCoef_2048[4096];
extern const float32_t twiddleCoef_4096[8192]; extern const float32_t twiddleCoef_4096[8192];
#define twiddleCoef twiddleCoef_4096 #define twiddleCoef twiddleCoef_4096
extern const q31_t twiddleCoef_16_q31[24]; extern const q31_t twiddleCoef_16_q31[24];
extern const q31_t twiddleCoef_32_q31[48]; extern const q31_t twiddleCoef_32_q31[48];
extern const q31_t twiddleCoef_64_q31[96]; extern const q31_t twiddleCoef_64_q31[96];
extern const q31_t twiddleCoef_128_q31[192]; extern const q31_t twiddleCoef_128_q31[192];
extern const q31_t twiddleCoef_256_q31[384]; extern const q31_t twiddleCoef_256_q31[384];
extern const q31_t twiddleCoef_512_q31[768]; extern const q31_t twiddleCoef_512_q31[768];
extern const q31_t twiddleCoef_1024_q31[1536]; extern const q31_t twiddleCoef_1024_q31[1536];
extern const q31_t twiddleCoef_2048_q31[3072]; extern const q31_t twiddleCoef_2048_q31[3072];
extern const q31_t twiddleCoef_4096_q31[6144]; extern const q31_t twiddleCoef_4096_q31[6144];
extern const q15_t twiddleCoef_16_q15[24]; extern const q15_t twiddleCoef_16_q15[24];
extern const q15_t twiddleCoef_32_q15[48]; extern const q15_t twiddleCoef_32_q15[48];
extern const q15_t twiddleCoef_64_q15[96]; extern const q15_t twiddleCoef_64_q15[96];
extern const q15_t twiddleCoef_128_q15[192]; extern const q15_t twiddleCoef_128_q15[192];
extern const q15_t twiddleCoef_256_q15[384]; extern const q15_t twiddleCoef_256_q15[384];
extern const q15_t twiddleCoef_512_q15[768]; extern const q15_t twiddleCoef_512_q15[768];
extern const q15_t twiddleCoef_1024_q15[1536]; extern const q15_t twiddleCoef_1024_q15[1536];
extern const q15_t twiddleCoef_2048_q15[3072]; extern const q15_t twiddleCoef_2048_q15[3072];
extern const q15_t twiddleCoef_4096_q15[6144]; extern const q15_t twiddleCoef_4096_q15[6144];
extern const float32_t twiddleCoef_rfft_32[32]; extern const float32_t twiddleCoef_rfft_32[32];
extern const float32_t twiddleCoef_rfft_64[64]; extern const float32_t twiddleCoef_rfft_64[64];
extern const float32_t twiddleCoef_rfft_128[128]; extern const float32_t twiddleCoef_rfft_128[128];
extern const float32_t twiddleCoef_rfft_256[256]; extern const float32_t twiddleCoef_rfft_256[256];
extern const float32_t twiddleCoef_rfft_512[512]; extern const float32_t twiddleCoef_rfft_512[512];
extern const float32_t twiddleCoef_rfft_1024[1024]; extern const float32_t twiddleCoef_rfft_1024[1024];
extern const float32_t twiddleCoef_rfft_2048[2048]; extern const float32_t twiddleCoef_rfft_2048[2048];
extern const float32_t twiddleCoef_rfft_4096[4096]; extern const float32_t twiddleCoef_rfft_4096[4096];
/* floating-point bit reversal tables */ /* floating-point bit reversal tables */
#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
/* fixed-point bit reversal tables */ /* fixed-point bit reversal tables */
#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
/* Tables for Fast Math Sine and Cosine */ /* Tables for Fast Math Sine and Cosine */
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
#endif /* ARM_COMMON_TABLES_H */ #endif /* ARM_COMMON_TABLES_H */

158
workspace/TS100/CMSIS/core/arm_const_structs.h → workspace/TS100/Drivers/CMSIS/Include/arm_const_structs.h
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@@ -1,79 +1,79 @@
/* ---------------------------------------------------------------------- /* ----------------------------------------------------------------------
* Copyright (C) 2010-2014 ARM Limited. All rights reserved. * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
* *
* $Date: 19. March 2015 * $Date: 19. March 2015
* $Revision: V.1.4.5 * $Revision: V.1.4.5
* *
* Project: CMSIS DSP Library * Project: CMSIS DSP Library
* Title: arm_const_structs.h * Title: arm_const_structs.h
* *
* Description: This file has constant structs that are initialized for * Description: This file has constant structs that are initialized for
* user convenience. For example, some can be given as * user convenience. For example, some can be given as
* arguments to the arm_cfft_f32() function. * arguments to the arm_cfft_f32() function.
* *
* Target Processor: Cortex-M4/Cortex-M3 * Target Processor: Cortex-M4/Cortex-M3
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* - Redistributions of source code must retain the above copyright * - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright * - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors * - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this * may be used to endorse or promote products derived from this
* software without specific prior written permission. * software without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* -------------------------------------------------------------------- */ * -------------------------------------------------------------------- */
#ifndef _ARM_CONST_STRUCTS_H #ifndef _ARM_CONST_STRUCTS_H
#define _ARM_CONST_STRUCTS_H #define _ARM_CONST_STRUCTS_H
#include "arm_math.h" #include "arm_math.h"
#include "arm_common_tables.h" #include "arm_common_tables.h"
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
#endif #endif

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174
workspace/TS100/CMSIS/core/core_cmFunc.h → workspace/TS100/Drivers/CMSIS/Include/core_cmFunc.h
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@@ -1,87 +1,87 @@
/**************************************************************************//** /**************************************************************************//**
* @file core_cmFunc.h * @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File * @brief CMSIS Cortex-M Core Function Access Header File
* @version V4.30 * @version V4.30
* @date 20. October 2015 * @date 20. October 2015
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED /* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright - Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright - Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used - Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without to endorse or promote products derived from this software without
specific prior written permission. specific prior written permission.
* *
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/ ---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef __CORE_CMFUNC_H #ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H #define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */ /* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface /** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{ @{
*/ */
/*------------------ RealView Compiler -----------------*/ /*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
#include "cmsis_armcc.h" #include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/ /*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h" #include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/ /*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
#include "cmsis_gcc.h" #include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/ /*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
#include <cmsis_iar.h> #include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/ /*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ ) #elif defined ( __TMS470__ )
#include <cmsis_ccs.h> #include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/ /*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ ) #elif defined ( __TASKING__ )
/* /*
* The CMSIS functions have been implemented as intrinsics in the compiler. * The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics, * Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones. * Including the CMSIS ones.
*/ */
/*------------------ COSMIC Compiler -------------------*/ /*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ ) #elif defined ( __CSMC__ )
#include <cmsis_csm.h> #include <cmsis_csm.h>
#endif #endif
/*@} end of CMSIS_Core_RegAccFunctions */ /*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */ #endif /* __CORE_CMFUNC_H */

174
workspace/TS100/CMSIS/core/core_cmInstr.h → workspace/TS100/Drivers/CMSIS/Include/core_cmInstr.h
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@@ -1,87 +1,87 @@
/**************************************************************************//** /**************************************************************************//**
* @file core_cmInstr.h * @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File * @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V4.30 * @version V4.30
* @date 20. October 2015 * @date 20. October 2015
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED /* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright - Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright - Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used - Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without to endorse or promote products derived from this software without
specific prior written permission. specific prior written permission.
* *
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/ ---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef __CORE_CMINSTR_H #ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H #define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */ /* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions Access to dedicated instructions
@{ @{
*/ */
/*------------------ RealView Compiler -----------------*/ /*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
#include "cmsis_armcc.h" #include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/ /*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h" #include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/ /*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
#include "cmsis_gcc.h" #include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/ /*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
#include <cmsis_iar.h> #include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/ /*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ ) #elif defined ( __TMS470__ )
#include <cmsis_ccs.h> #include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/ /*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ ) #elif defined ( __TASKING__ )
/* /*
* The CMSIS functions have been implemented as intrinsics in the compiler. * The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics, * Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones. * Including the CMSIS ones.
*/ */
/*------------------ COSMIC Compiler -------------------*/ /*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ ) #elif defined ( __CSMC__ )
#include <cmsis_csm.h> #include <cmsis_csm.h>
#endif #endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */ #endif /* __CORE_CMINSTR_H */

192
workspace/TS100/CMSIS/core/core_cmSimd.h → workspace/TS100/Drivers/CMSIS/Include/core_cmSimd.h
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@@ -1,96 +1,96 @@
/**************************************************************************//** /**************************************************************************//**
* @file core_cmSimd.h * @file core_cmSimd.h
* @brief CMSIS Cortex-M SIMD Header File * @brief CMSIS Cortex-M SIMD Header File
* @version V4.30 * @version V4.30
* @date 20. October 2015 * @date 20. October 2015
******************************************************************************/ ******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED /* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved. All rights reserved.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met: modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright - Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright - Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used - Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without to endorse or promote products derived from this software without
specific prior written permission. specific prior written permission.
* *
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE. POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/ ---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ ) #if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */ #pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */ #pragma clang system_header /* treat file as system include file */
#endif #endif
#ifndef __CORE_CMSIMD_H #ifndef __CORE_CMSIMD_H
#define __CORE_CMSIMD_H #define __CORE_CMSIMD_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* ################### Compiler specific Intrinsics ########################### */ /* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions Access to dedicated SIMD instructions
@{ @{
*/ */
/*------------------ RealView Compiler -----------------*/ /*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
#include "cmsis_armcc.h" #include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/ /*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h" #include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/ /*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
#include "cmsis_gcc.h" #include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/ /*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
#include <cmsis_iar.h> #include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/ /*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ ) #elif defined ( __TMS470__ )
#include <cmsis_ccs.h> #include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/ /*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ ) #elif defined ( __TASKING__ )
/* /*
* The CMSIS functions have been implemented as intrinsics in the compiler. * The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics, * Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones. * Including the CMSIS ones.
*/ */
/*------------------ COSMIC Compiler -------------------*/ /*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ ) #elif defined ( __CSMC__ )
#include <cmsis_csm.h> #include <cmsis_csm.h>
#endif #endif
/*@} end of group CMSIS_SIMD_intrinsics */ /*@} end of group CMSIS_SIMD_intrinsics */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __CORE_CMSIMD_H */ #endif /* __CORE_CMSIMD_H */

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workspace/TS100/CMSIS/core/core_sc000.h → workspace/TS100/Drivers/CMSIS/Include/core_sc000.h
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workspace/TS100/CMSIS/core/core_sc300.h → workspace/TS100/Drivers/CMSIS/Include/core_sc300.h
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6438
workspace/TS100/HAL_Driver/Inc/Legacy/stm32_hal_legacy.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h
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734
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h
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@@ -1,367 +1,367 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal.h * @file stm32f1xx_hal.h
* @author MCD Application Team * @author MCD Application Team
* @brief This file contains all the functions prototypes for the HAL * @brief This file contains all the functions prototypes for the HAL
* module driver. * module driver.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_H #ifndef __STM32F1xx_HAL_H
#define __STM32F1xx_HAL_H #define __STM32F1xx_HAL_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_conf.h" #include "stm32f1xx_hal_conf.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup HAL /** @addtogroup HAL
* @{ * @{
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup HAL_Exported_Constants HAL Exported Constants /** @defgroup HAL_Exported_Constants HAL Exported Constants
* @{ * @{
*/ */
/** @defgroup HAL_TICK_FREQ Tick Frequency /** @defgroup HAL_TICK_FREQ Tick Frequency
* @{ * @{
*/ */
typedef enum typedef enum
{ {
HAL_TICK_FREQ_10HZ = 100U, HAL_TICK_FREQ_10HZ = 100U,
HAL_TICK_FREQ_100HZ = 10U, HAL_TICK_FREQ_100HZ = 10U,
HAL_TICK_FREQ_1KHZ = 1U, HAL_TICK_FREQ_1KHZ = 1U,
HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
} HAL_TickFreqTypeDef; } HAL_TickFreqTypeDef;
/** /**
* @} * @}
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
extern uint32_t uwTickPrio; extern uint32_t uwTickPrio;
extern HAL_TickFreqTypeDef uwTickFreq; extern HAL_TickFreqTypeDef uwTickFreq;
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup HAL_Exported_Macros HAL Exported Macros /** @defgroup HAL_Exported_Macros HAL Exported Macros
* @{ * @{
*/ */
/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
* @brief Freeze/Unfreeze Peripherals in Debug mode * @brief Freeze/Unfreeze Peripherals in Debug mode
* Note: On devices STM32F10xx8 and STM32F10xxB, * Note: On devices STM32F10xx8 and STM32F10xxB,
* STM32F101xC/D/E and STM32F103xC/D/E, * STM32F101xC/D/E and STM32F103xC/D/E,
* STM32F101xF/G and STM32F103xF/G * STM32F101xF/G and STM32F103xF/G
* STM32F10xx4 and STM32F10xx6 * STM32F10xx4 and STM32F10xx6
* Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in
* debug mode (not accessible by the user software in normal mode). * debug mode (not accessible by the user software in normal mode).
* Refer to errata sheet of these devices for more details. * Refer to errata sheet of these devices for more details.
* @{ * @{
*/ */
/* Peripherals on APB1 */ /* Peripherals on APB1 */
/** /**
* @brief TIM2 Peripherals Debug mode * @brief TIM2 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP)
/** /**
* @brief TIM3 Peripherals Debug mode * @brief TIM3 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP)
#if defined (DBGMCU_CR_DBG_TIM4_STOP) #if defined (DBGMCU_CR_DBG_TIM4_STOP)
/** /**
* @brief TIM4 Peripherals Debug mode * @brief TIM4 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM5_STOP) #if defined (DBGMCU_CR_DBG_TIM5_STOP)
/** /**
* @brief TIM5 Peripherals Debug mode * @brief TIM5 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM6_STOP) #if defined (DBGMCU_CR_DBG_TIM6_STOP)
/** /**
* @brief TIM6 Peripherals Debug mode * @brief TIM6 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM7_STOP) #if defined (DBGMCU_CR_DBG_TIM7_STOP)
/** /**
* @brief TIM7 Peripherals Debug mode * @brief TIM7 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM12_STOP) #if defined (DBGMCU_CR_DBG_TIM12_STOP)
/** /**
* @brief TIM12 Peripherals Debug mode * @brief TIM12 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM13_STOP) #if defined (DBGMCU_CR_DBG_TIM13_STOP)
/** /**
* @brief TIM13 Peripherals Debug mode * @brief TIM13 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM14_STOP) #if defined (DBGMCU_CR_DBG_TIM14_STOP)
/** /**
* @brief TIM14 Peripherals Debug mode * @brief TIM14 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP)
#endif #endif
/** /**
* @brief WWDG Peripherals Debug mode * @brief WWDG Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
#define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP)
/** /**
* @brief IWDG Peripherals Debug mode * @brief IWDG Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
#define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP)
/** /**
* @brief I2C1 Peripherals Debug mode * @brief I2C1 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT)
#if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
/** /**
* @brief I2C2 Peripherals Debug mode * @brief I2C2 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT)
#endif #endif
#if defined (DBGMCU_CR_DBG_CAN1_STOP) #if defined (DBGMCU_CR_DBG_CAN1_STOP)
/** /**
* @brief CAN1 Peripherals Debug mode * @brief CAN1 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
#define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_CAN2_STOP) #if defined (DBGMCU_CR_DBG_CAN2_STOP)
/** /**
* @brief CAN2 Peripherals Debug mode * @brief CAN2 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
#define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP)
#endif #endif
/* Peripherals on APB2 */ /* Peripherals on APB2 */
#if defined (DBGMCU_CR_DBG_TIM1_STOP) #if defined (DBGMCU_CR_DBG_TIM1_STOP)
/** /**
* @brief TIM1 Peripherals Debug mode * @brief TIM1 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM8_STOP) #if defined (DBGMCU_CR_DBG_TIM8_STOP)
/** /**
* @brief TIM8 Peripherals Debug mode * @brief TIM8 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM9_STOP) #if defined (DBGMCU_CR_DBG_TIM9_STOP)
/** /**
* @brief TIM9 Peripherals Debug mode * @brief TIM9 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM10_STOP) #if defined (DBGMCU_CR_DBG_TIM10_STOP)
/** /**
* @brief TIM10 Peripherals Debug mode * @brief TIM10 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM11_STOP) #if defined (DBGMCU_CR_DBG_TIM11_STOP)
/** /**
* @brief TIM11 Peripherals Debug mode * @brief TIM11 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM15_STOP) #if defined (DBGMCU_CR_DBG_TIM15_STOP)
/** /**
* @brief TIM15 Peripherals Debug mode * @brief TIM15 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM16_STOP) #if defined (DBGMCU_CR_DBG_TIM16_STOP)
/** /**
* @brief TIM16 Peripherals Debug mode * @brief TIM16 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP)
#endif #endif
#if defined (DBGMCU_CR_DBG_TIM17_STOP) #if defined (DBGMCU_CR_DBG_TIM17_STOP)
/** /**
* @brief TIM17 Peripherals Debug mode * @brief TIM17 Peripherals Debug mode
*/ */
#define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
#define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP)
#endif #endif
/** /**
* @} * @}
*/ */
/** @defgroup HAL_Private_Macros HAL Private Macros /** @defgroup HAL_Private_Macros HAL Private Macros
* @{ * @{
*/ */
#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
((FREQ) == HAL_TICK_FREQ_100HZ) || \ ((FREQ) == HAL_TICK_FREQ_100HZ) || \
((FREQ) == HAL_TICK_FREQ_1KHZ)) ((FREQ) == HAL_TICK_FREQ_1KHZ))
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup HAL_Exported_Functions /** @addtogroup HAL_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup HAL_Exported_Functions_Group1 /** @addtogroup HAL_Exported_Functions_Group1
* @{ * @{
*/ */
/* Initialization and de-initialization functions ******************************/ /* Initialization and de-initialization functions ******************************/
HAL_StatusTypeDef HAL_Init(void); HAL_StatusTypeDef HAL_Init(void);
HAL_StatusTypeDef HAL_DeInit(void); HAL_StatusTypeDef HAL_DeInit(void);
void HAL_MspInit(void); void HAL_MspInit(void);
void HAL_MspDeInit(void); void HAL_MspDeInit(void);
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority); HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
/** /**
* @} * @}
*/ */
/** @addtogroup HAL_Exported_Functions_Group2 /** @addtogroup HAL_Exported_Functions_Group2
* @{ * @{
*/ */
/* Peripheral Control functions ************************************************/ /* Peripheral Control functions ************************************************/
void HAL_IncTick(void); void HAL_IncTick(void);
void HAL_Delay(uint32_t Delay); void HAL_Delay(uint32_t Delay);
uint32_t HAL_GetTick(void); uint32_t HAL_GetTick(void);
uint32_t HAL_GetTickPrio(void); uint32_t HAL_GetTickPrio(void);
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
HAL_TickFreqTypeDef HAL_GetTickFreq(void); HAL_TickFreqTypeDef HAL_GetTickFreq(void);
void HAL_SuspendTick(void); void HAL_SuspendTick(void);
void HAL_ResumeTick(void); void HAL_ResumeTick(void);
uint32_t HAL_GetHalVersion(void); uint32_t HAL_GetHalVersion(void);
uint32_t HAL_GetREVID(void); uint32_t HAL_GetREVID(void);
uint32_t HAL_GetDEVID(void); uint32_t HAL_GetDEVID(void);
void HAL_DBGMCU_EnableDBGSleepMode(void); void HAL_DBGMCU_EnableDBGSleepMode(void);
void HAL_DBGMCU_DisableDBGSleepMode(void); void HAL_DBGMCU_DisableDBGSleepMode(void);
void HAL_DBGMCU_EnableDBGStopMode(void); void HAL_DBGMCU_EnableDBGStopMode(void);
void HAL_DBGMCU_DisableDBGStopMode(void); void HAL_DBGMCU_DisableDBGStopMode(void);
void HAL_DBGMCU_EnableDBGStandbyMode(void); void HAL_DBGMCU_EnableDBGStandbyMode(void);
void HAL_DBGMCU_DisableDBGStandbyMode(void); void HAL_DBGMCU_DisableDBGStandbyMode(void);
void HAL_GetUID(uint32_t *UID); void HAL_GetUID(uint32_t *UID);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/** @defgroup HAL_Private_Variables HAL Private Variables /** @defgroup HAL_Private_Variables HAL Private Variables
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup HAL_Private_Constants HAL Private Constants /** @defgroup HAL_Private_Constants HAL Private Constants
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_H */ #endif /* __STM32F1xx_HAL_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_adc.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h
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workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h
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852
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_cortex.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h
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@@ -1,426 +1,426 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_cortex.h * @file stm32f1xx_hal_cortex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CORTEX HAL module. * @brief Header file of CORTEX HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_CORTEX_H #ifndef __STM32F1xx_HAL_CORTEX_H
#define __STM32F1xx_HAL_CORTEX_H #define __STM32F1xx_HAL_CORTEX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup CORTEX /** @addtogroup CORTEX
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Types Cortex Exported Types /** @defgroup CORTEX_Exported_Types Cortex Exported Types
* @{ * @{
*/ */
#if (__MPU_PRESENT == 1U) #if (__MPU_PRESENT == 1U)
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
* @brief MPU Region initialization structure * @brief MPU Region initialization structure
* @{ * @{
*/ */
typedef struct typedef struct
{ {
uint8_t Enable; /*!< Specifies the status of the region. uint8_t Enable; /*!< Specifies the status of the region.
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
uint8_t Number; /*!< Specifies the number of the region to protect. uint8_t Number; /*!< Specifies the number of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Number */ This parameter can be a value of @ref CORTEX_MPU_Region_Number */
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
uint8_t Size; /*!< Specifies the size of the region to protect. uint8_t Size; /*!< Specifies the size of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Size */ This parameter can be a value of @ref CORTEX_MPU_Region_Size */
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
uint8_t TypeExtField; /*!< Specifies the TEX field level. uint8_t TypeExtField; /*!< Specifies the TEX field level.
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
uint8_t AccessPermission; /*!< Specifies the region access permission type. uint8_t AccessPermission; /*!< Specifies the region access permission type.
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
uint8_t DisableExec; /*!< Specifies the instruction access status. uint8_t DisableExec; /*!< Specifies the instruction access status.
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
}MPU_Region_InitTypeDef; }MPU_Region_InitTypeDef;
/** /**
* @} * @}
*/ */
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
* @{ * @{
*/ */
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
* @{ * @{
*/ */
#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority #define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
4 bits for subpriority */ 4 bits for subpriority */
#define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority #define NVIC_PRIORITYGROUP_1 0x00000006U /*!< 1 bits for pre-emption priority
3 bits for subpriority */ 3 bits for subpriority */
#define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority #define NVIC_PRIORITYGROUP_2 0x00000005U /*!< 2 bits for pre-emption priority
2 bits for subpriority */ 2 bits for subpriority */
#define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority #define NVIC_PRIORITYGROUP_3 0x00000004U /*!< 3 bits for pre-emption priority
1 bits for subpriority */ 1 bits for subpriority */
#define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority #define NVIC_PRIORITYGROUP_4 0x00000003U /*!< 4 bits for pre-emption priority
0 bits for subpriority */ 0 bits for subpriority */
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source /** @defgroup CORTEX_SysTick_clock_source CORTEX _SysTick clock source
* @{ * @{
*/ */
#define SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U #define SYSTICK_CLKSOURCE_HCLK_DIV8 0x00000000U
#define SYSTICK_CLKSOURCE_HCLK 0x00000004U #define SYSTICK_CLKSOURCE_HCLK 0x00000004U
/** /**
* @} * @}
*/ */
#if (__MPU_PRESENT == 1) #if (__MPU_PRESENT == 1)
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
* @{ * @{
*/ */
#define MPU_HFNMI_PRIVDEF_NONE 0x00000000U #define MPU_HFNMI_PRIVDEF_NONE 0x00000000U
#define MPU_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk #define MPU_HARDFAULT_NMI MPU_CTRL_HFNMIENA_Msk
#define MPU_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk #define MPU_PRIVILEGED_DEFAULT MPU_CTRL_PRIVDEFENA_Msk
#define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk) #define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
* @{ * @{
*/ */
#define MPU_REGION_ENABLE ((uint8_t)0x01) #define MPU_REGION_ENABLE ((uint8_t)0x01)
#define MPU_REGION_DISABLE ((uint8_t)0x00) #define MPU_REGION_DISABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
* @{ * @{
*/ */
#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
* @{ * @{
*/ */
#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
* @{ * @{
*/ */
#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
* @{ * @{
*/ */
#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels /** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
* @{ * @{
*/ */
#define MPU_TEX_LEVEL0 ((uint8_t)0x00) #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
#define MPU_TEX_LEVEL1 ((uint8_t)0x01) #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
#define MPU_TEX_LEVEL2 ((uint8_t)0x02) #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
* @{ * @{
*/ */
#define MPU_REGION_SIZE_32B ((uint8_t)0x04) #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
#define MPU_REGION_SIZE_64B ((uint8_t)0x05) #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
#define MPU_REGION_SIZE_128B ((uint8_t)0x06) #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
#define MPU_REGION_SIZE_256B ((uint8_t)0x07) #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
#define MPU_REGION_SIZE_512B ((uint8_t)0x08) #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09) #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
#define MPU_REGION_SIZE_128KB ((uint8_t)0x10) #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
#define MPU_REGION_SIZE_256KB ((uint8_t)0x11) #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
#define MPU_REGION_SIZE_512KB ((uint8_t)0x12) #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
#define MPU_REGION_SIZE_1MB ((uint8_t)0x13) #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
#define MPU_REGION_SIZE_2MB ((uint8_t)0x14) #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
#define MPU_REGION_SIZE_4MB ((uint8_t)0x15) #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
#define MPU_REGION_SIZE_8MB ((uint8_t)0x16) #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
#define MPU_REGION_SIZE_16MB ((uint8_t)0x17) #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
#define MPU_REGION_SIZE_32MB ((uint8_t)0x18) #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
#define MPU_REGION_SIZE_64MB ((uint8_t)0x19) #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
* @{ * @{
*/ */
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00) #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
#define MPU_REGION_PRIV_RW ((uint8_t)0x01) #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
#define MPU_REGION_PRIV_RO ((uint8_t)0x05) #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
* @{ * @{
*/ */
#define MPU_REGION_NUMBER0 ((uint8_t)0x00) #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
#define MPU_REGION_NUMBER1 ((uint8_t)0x01) #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
#define MPU_REGION_NUMBER2 ((uint8_t)0x02) #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
#define MPU_REGION_NUMBER3 ((uint8_t)0x03) #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
#define MPU_REGION_NUMBER4 ((uint8_t)0x04) #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
#define MPU_REGION_NUMBER5 ((uint8_t)0x05) #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
#define MPU_REGION_NUMBER6 ((uint8_t)0x06) #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
#define MPU_REGION_NUMBER7 ((uint8_t)0x07) #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
/** /**
* @} * @}
*/ */
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/* Exported Macros -----------------------------------------------------------*/ /* Exported Macros -----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup CORTEX_Exported_Functions /** @addtogroup CORTEX_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup CORTEX_Exported_Functions_Group1 /** @addtogroup CORTEX_Exported_Functions_Group1
* @{ * @{
*/ */
/* Initialization and de-initialization functions *****************************/ /* Initialization and de-initialization functions *****************************/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
void HAL_NVIC_SystemReset(void); void HAL_NVIC_SystemReset(void);
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
/** /**
* @} * @}
*/ */
/** @addtogroup CORTEX_Exported_Functions_Group2 /** @addtogroup CORTEX_Exported_Functions_Group2
* @{ * @{
*/ */
/* Peripheral Control functions ***********************************************/ /* Peripheral Control functions ***********************************************/
uint32_t HAL_NVIC_GetPriorityGrouping(void); uint32_t HAL_NVIC_GetPriorityGrouping(void);
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
void HAL_SYSTICK_IRQHandler(void); void HAL_SYSTICK_IRQHandler(void);
void HAL_SYSTICK_Callback(void); void HAL_SYSTICK_Callback(void);
#if (__MPU_PRESENT == 1U) #if (__MPU_PRESENT == 1U)
void HAL_MPU_Enable(uint32_t MPU_Control); void HAL_MPU_Enable(uint32_t MPU_Control);
void HAL_MPU_Disable(void); void HAL_MPU_Disable(void);
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
* @{ * @{
*/ */
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
((GROUP) == NVIC_PRIORITYGROUP_1) || \ ((GROUP) == NVIC_PRIORITYGROUP_1) || \
((GROUP) == NVIC_PRIORITYGROUP_2) || \ ((GROUP) == NVIC_PRIORITYGROUP_2) || \
((GROUP) == NVIC_PRIORITYGROUP_3) || \ ((GROUP) == NVIC_PRIORITYGROUP_3) || \
((GROUP) == NVIC_PRIORITYGROUP_4)) ((GROUP) == NVIC_PRIORITYGROUP_4))
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U) #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U) #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U) #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U)
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
#if (__MPU_PRESENT == 1U) #if (__MPU_PRESENT == 1U)
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
((STATE) == MPU_REGION_DISABLE)) ((STATE) == MPU_REGION_DISABLE))
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
((STATE) == MPU_ACCESS_NOT_SHAREABLE)) ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
((STATE) == MPU_ACCESS_NOT_CACHEABLE)) ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \ #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
((TYPE) == MPU_TEX_LEVEL1) || \ ((TYPE) == MPU_TEX_LEVEL1) || \
((TYPE) == MPU_TEX_LEVEL2)) ((TYPE) == MPU_TEX_LEVEL2))
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \ #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RW) || \ ((TYPE) == MPU_REGION_PRIV_RW) || \
((TYPE) == MPU_REGION_PRIV_RW_URO) || \ ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
((TYPE) == MPU_REGION_FULL_ACCESS) || \ ((TYPE) == MPU_REGION_FULL_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RO) || \ ((TYPE) == MPU_REGION_PRIV_RO) || \
((TYPE) == MPU_REGION_PRIV_RO_URO)) ((TYPE) == MPU_REGION_PRIV_RO_URO))
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \ #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
((NUMBER) == MPU_REGION_NUMBER1) || \ ((NUMBER) == MPU_REGION_NUMBER1) || \
((NUMBER) == MPU_REGION_NUMBER2) || \ ((NUMBER) == MPU_REGION_NUMBER2) || \
((NUMBER) == MPU_REGION_NUMBER3) || \ ((NUMBER) == MPU_REGION_NUMBER3) || \
((NUMBER) == MPU_REGION_NUMBER4) || \ ((NUMBER) == MPU_REGION_NUMBER4) || \
((NUMBER) == MPU_REGION_NUMBER5) || \ ((NUMBER) == MPU_REGION_NUMBER5) || \
((NUMBER) == MPU_REGION_NUMBER6) || \ ((NUMBER) == MPU_REGION_NUMBER6) || \
((NUMBER) == MPU_REGION_NUMBER7)) ((NUMBER) == MPU_REGION_NUMBER7))
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \ #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
((SIZE) == MPU_REGION_SIZE_64B) || \ ((SIZE) == MPU_REGION_SIZE_64B) || \
((SIZE) == MPU_REGION_SIZE_128B) || \ ((SIZE) == MPU_REGION_SIZE_128B) || \
((SIZE) == MPU_REGION_SIZE_256B) || \ ((SIZE) == MPU_REGION_SIZE_256B) || \
((SIZE) == MPU_REGION_SIZE_512B) || \ ((SIZE) == MPU_REGION_SIZE_512B) || \
((SIZE) == MPU_REGION_SIZE_1KB) || \ ((SIZE) == MPU_REGION_SIZE_1KB) || \
((SIZE) == MPU_REGION_SIZE_2KB) || \ ((SIZE) == MPU_REGION_SIZE_2KB) || \
((SIZE) == MPU_REGION_SIZE_4KB) || \ ((SIZE) == MPU_REGION_SIZE_4KB) || \
((SIZE) == MPU_REGION_SIZE_8KB) || \ ((SIZE) == MPU_REGION_SIZE_8KB) || \
((SIZE) == MPU_REGION_SIZE_16KB) || \ ((SIZE) == MPU_REGION_SIZE_16KB) || \
((SIZE) == MPU_REGION_SIZE_32KB) || \ ((SIZE) == MPU_REGION_SIZE_32KB) || \
((SIZE) == MPU_REGION_SIZE_64KB) || \ ((SIZE) == MPU_REGION_SIZE_64KB) || \
((SIZE) == MPU_REGION_SIZE_128KB) || \ ((SIZE) == MPU_REGION_SIZE_128KB) || \
((SIZE) == MPU_REGION_SIZE_256KB) || \ ((SIZE) == MPU_REGION_SIZE_256KB) || \
((SIZE) == MPU_REGION_SIZE_512KB) || \ ((SIZE) == MPU_REGION_SIZE_512KB) || \
((SIZE) == MPU_REGION_SIZE_1MB) || \ ((SIZE) == MPU_REGION_SIZE_1MB) || \
((SIZE) == MPU_REGION_SIZE_2MB) || \ ((SIZE) == MPU_REGION_SIZE_2MB) || \
((SIZE) == MPU_REGION_SIZE_4MB) || \ ((SIZE) == MPU_REGION_SIZE_4MB) || \
((SIZE) == MPU_REGION_SIZE_8MB) || \ ((SIZE) == MPU_REGION_SIZE_8MB) || \
((SIZE) == MPU_REGION_SIZE_16MB) || \ ((SIZE) == MPU_REGION_SIZE_16MB) || \
((SIZE) == MPU_REGION_SIZE_32MB) || \ ((SIZE) == MPU_REGION_SIZE_32MB) || \
((SIZE) == MPU_REGION_SIZE_64MB) || \ ((SIZE) == MPU_REGION_SIZE_64MB) || \
((SIZE) == MPU_REGION_SIZE_128MB) || \ ((SIZE) == MPU_REGION_SIZE_128MB) || \
((SIZE) == MPU_REGION_SIZE_256MB) || \ ((SIZE) == MPU_REGION_SIZE_256MB) || \
((SIZE) == MPU_REGION_SIZE_512MB) || \ ((SIZE) == MPU_REGION_SIZE_512MB) || \
((SIZE) == MPU_REGION_SIZE_1GB) || \ ((SIZE) == MPU_REGION_SIZE_1GB) || \
((SIZE) == MPU_REGION_SIZE_2GB) || \ ((SIZE) == MPU_REGION_SIZE_2GB) || \
((SIZE) == MPU_REGION_SIZE_4GB)) ((SIZE) == MPU_REGION_SIZE_4GB))
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF) #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_CORTEX_H */ #endif /* __STM32F1xx_HAL_CORTEX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

428
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_def.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h
View File

@@ -1,214 +1,214 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_def.h * @file stm32f1xx_hal_def.h
* @author MCD Application Team * @author MCD Application Team
* @brief This file contains HAL common defines, enumeration, macros and * @brief This file contains HAL common defines, enumeration, macros and
* structures definitions. * structures definitions.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_DEF #ifndef __STM32F1xx_HAL_DEF
#define __STM32F1xx_HAL_DEF #define __STM32F1xx_HAL_DEF
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx.h" #include "stm32f1xx.h"
#if defined(USE_HAL_LEGACY) #if defined(USE_HAL_LEGACY)
#include "Legacy/stm32_hal_legacy.h" #include "Legacy/stm32_hal_legacy.h"
#endif #endif
#include <stdio.h> #include <stdio.h>
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** /**
* @brief HAL Status structures definition * @brief HAL Status structures definition
*/ */
typedef enum typedef enum
{ {
HAL_OK = 0x00U, HAL_OK = 0x00U,
HAL_ERROR = 0x01U, HAL_ERROR = 0x01U,
HAL_BUSY = 0x02U, HAL_BUSY = 0x02U,
HAL_TIMEOUT = 0x03U HAL_TIMEOUT = 0x03U
} HAL_StatusTypeDef; } HAL_StatusTypeDef;
/** /**
* @brief HAL Lock structures definition * @brief HAL Lock structures definition
*/ */
typedef enum typedef enum
{ {
HAL_UNLOCKED = 0x00U, HAL_UNLOCKED = 0x00U,
HAL_LOCKED = 0x01U HAL_LOCKED = 0x01U
} HAL_LockTypeDef; } HAL_LockTypeDef;
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
#define HAL_MAX_DELAY 0xFFFFFFFFU #define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != 0U) #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != 0U)
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
do{ \ do{ \
(__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
(__DMA_HANDLE__).Parent = (__HANDLE__); \ (__DMA_HANDLE__).Parent = (__HANDLE__); \
} while(0U) } while(0U)
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
/** @brief Reset the Handle's State field. /** @brief Reset the Handle's State field.
* @param __HANDLE__: specifies the Peripheral Handle. * @param __HANDLE__: specifies the Peripheral Handle.
* @note This macro can be used for the following purpose: * @note This macro can be used for the following purpose:
* - When the Handle is declared as local variable; before passing it as parameter * - When the Handle is declared as local variable; before passing it as parameter
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
* to set to 0 the Handle's "State" field. * to set to 0 the Handle's "State" field.
* Otherwise, "State" field may have any random value and the first time the function * Otherwise, "State" field may have any random value and the first time the function
* HAL_PPP_Init() is called, the low level hardware initialization will be missed * HAL_PPP_Init() is called, the low level hardware initialization will be missed
* (i.e. HAL_PPP_MspInit() will not be executed). * (i.e. HAL_PPP_MspInit() will not be executed).
* - When there is a need to reconfigure the low level hardware: instead of calling * - When there is a need to reconfigure the low level hardware: instead of calling
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
* In this later function, when the Handle's "State" field is set to 0, it will execute the function * In this later function, when the Handle's "State" field is set to 0, it will execute the function
* HAL_PPP_MspInit() which will reconfigure the low level hardware. * HAL_PPP_MspInit() which will reconfigure the low level hardware.
* @retval None * @retval None
*/ */
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
#if (USE_RTOS == 1U) #if (USE_RTOS == 1U)
/* Reserved for future use */ /* Reserved for future use */
#error "USE_RTOS should be 0 in the current HAL release" #error "USE_RTOS should be 0 in the current HAL release"
#else #else
#define __HAL_LOCK(__HANDLE__) \ #define __HAL_LOCK(__HANDLE__) \
do{ \ do{ \
if((__HANDLE__)->Lock == HAL_LOCKED) \ if((__HANDLE__)->Lock == HAL_LOCKED) \
{ \ { \
return HAL_BUSY; \ return HAL_BUSY; \
} \ } \
else \ else \
{ \ { \
(__HANDLE__)->Lock = HAL_LOCKED; \ (__HANDLE__)->Lock = HAL_LOCKED; \
} \ } \
}while (0U) }while (0U)
#define __HAL_UNLOCK(__HANDLE__) \ #define __HAL_UNLOCK(__HANDLE__) \
do{ \ do{ \
(__HANDLE__)->Lock = HAL_UNLOCKED; \ (__HANDLE__)->Lock = HAL_UNLOCKED; \
}while (0U) }while (0U)
#endif /* USE_RTOS */ #endif /* USE_RTOS */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __weak #ifndef __weak
#define __weak __attribute__((weak)) #define __weak __attribute__((weak))
#endif /* __weak */ #endif /* __weak */
#ifndef __packed #ifndef __packed
#define __packed __attribute__((__packed__)) #define __packed __attribute__((__packed__))
#endif /* __packed */ #endif /* __packed */
#endif /* __GNUC__ */ #endif /* __GNUC__ */
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __ALIGN_END #ifndef __ALIGN_END
#define __ALIGN_END __attribute__ ((aligned (4))) #define __ALIGN_END __attribute__ ((aligned (4)))
#endif /* __ALIGN_END */ #endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN #ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN #define __ALIGN_BEGIN
#endif /* __ALIGN_BEGIN */ #endif /* __ALIGN_BEGIN */
#else #else
#ifndef __ALIGN_END #ifndef __ALIGN_END
#define __ALIGN_END #define __ALIGN_END
#endif /* __ALIGN_END */ #endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN #ifndef __ALIGN_BEGIN
#if defined (__CC_ARM) /* ARM Compiler */ #if defined (__CC_ARM) /* ARM Compiler */
#define __ALIGN_BEGIN __align(4) #define __ALIGN_BEGIN __align(4)
#elif defined (__ICCARM__) /* IAR Compiler */ #elif defined (__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN #define __ALIGN_BEGIN
#endif /* __CC_ARM */ #endif /* __CC_ARM */
#endif /* __ALIGN_BEGIN */ #endif /* __ALIGN_BEGIN */
#endif /* __GNUC__ */ #endif /* __GNUC__ */
/** /**
* @brief __RAM_FUNC definition * @brief __RAM_FUNC definition
*/ */
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
/* ARM Compiler /* ARM Compiler
------------ ------------
RAM functions are defined using the toolchain options. RAM functions are defined using the toolchain options.
Functions that are executed in RAM should reside in a separate source module. Functions that are executed in RAM should reside in a separate source module.
Using the 'Options for File' dialog you can simply change the 'Code / Const' Using the 'Options for File' dialog you can simply change the 'Code / Const'
area of a module to a memory space in physical RAM. area of a module to a memory space in physical RAM.
Available memory areas are declared in the 'Target' tab of the 'Options for Target' Available memory areas are declared in the 'Target' tab of the 'Options for Target'
dialog. dialog.
*/ */
#define __RAM_FUNC #define __RAM_FUNC
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
/* ICCARM Compiler /* ICCARM Compiler
--------------- ---------------
RAM functions are defined using a specific toolchain keyword "__ramfunc". RAM functions are defined using a specific toolchain keyword "__ramfunc".
*/ */
#define __RAM_FUNC __ramfunc #define __RAM_FUNC __ramfunc
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
/* GNU Compiler /* GNU Compiler
------------ ------------
RAM functions are defined using a specific toolchain attribute RAM functions are defined using a specific toolchain attribute
"__attribute__((section(".RamFunc")))". "__attribute__((section(".RamFunc")))".
*/ */
#define __RAM_FUNC __attribute__((section(".RamFunc"))) #define __RAM_FUNC __attribute__((section(".RamFunc")))
#endif #endif
/** /**
* @brief __NOINLINE definition * @brief __NOINLINE definition
*/ */
#if defined ( __CC_ARM ) || defined ( __GNUC__ ) #if defined ( __CC_ARM ) || defined ( __GNUC__ )
/* ARM & GNUCompiler /* ARM & GNUCompiler
---------------- ----------------
*/ */
#define __NOINLINE __attribute__ ( (noinline) ) #define __NOINLINE __attribute__ ( (noinline) )
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
/* ICCARM Compiler /* ICCARM Compiler
--------------- ---------------
*/ */
#define __NOINLINE _Pragma("optimize = no_inline") #define __NOINLINE _Pragma("optimize = no_inline")
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* ___STM32F1xx_HAL_DEF */ #endif /* ___STM32F1xx_HAL_DEF */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

946
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_dma.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h
View File

@@ -1,473 +1,473 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_dma.h * @file stm32f1xx_hal_dma.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DMA HAL module. * @brief Header file of DMA HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_DMA_H #ifndef __STM32F1xx_HAL_DMA_H
#define __STM32F1xx_HAL_DMA_H #define __STM32F1xx_HAL_DMA_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup DMA /** @addtogroup DMA
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup DMA_Exported_Types DMA Exported Types /** @defgroup DMA_Exported_Types DMA Exported Types
* @{ * @{
*/ */
/** /**
* @brief DMA Configuration Structure definition * @brief DMA Configuration Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral, uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
from memory to memory or from peripheral to memory. from memory to memory or from peripheral to memory.
This parameter can be a value of @ref DMA_Data_transfer_direction */ This parameter can be a value of @ref DMA_Data_transfer_direction */
uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not. uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
This parameter can be a value of @ref DMA_Peripheral_incremented_mode */ This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not. uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
This parameter can be a value of @ref DMA_Memory_incremented_mode */ This parameter can be a value of @ref DMA_Memory_incremented_mode */
uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width. uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
This parameter can be a value of @ref DMA_Peripheral_data_size */ This parameter can be a value of @ref DMA_Peripheral_data_size */
uint32_t MemDataAlignment; /*!< Specifies the Memory data width. uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
This parameter can be a value of @ref DMA_Memory_data_size */ This parameter can be a value of @ref DMA_Memory_data_size */
uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx. uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
This parameter can be a value of @ref DMA_mode This parameter can be a value of @ref DMA_mode
@note The circular buffer mode cannot be used if the memory-to-memory @note The circular buffer mode cannot be used if the memory-to-memory
data transfer is configured on the selected Channel */ data transfer is configured on the selected Channel */
uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx. uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
This parameter can be a value of @ref DMA_Priority_level */ This parameter can be a value of @ref DMA_Priority_level */
} DMA_InitTypeDef; } DMA_InitTypeDef;
/** /**
* @brief HAL DMA State structures definition * @brief HAL DMA State structures definition
*/ */
typedef enum typedef enum
{ {
HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */ HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */ HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */ HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
HAL_DMA_STATE_TIMEOUT = 0x03U /*!< DMA timeout state */ HAL_DMA_STATE_TIMEOUT = 0x03U /*!< DMA timeout state */
}HAL_DMA_StateTypeDef; }HAL_DMA_StateTypeDef;
/** /**
* @brief HAL DMA Error Code structure definition * @brief HAL DMA Error Code structure definition
*/ */
typedef enum typedef enum
{ {
HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */ HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */ HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */
}HAL_DMA_LevelCompleteTypeDef; }HAL_DMA_LevelCompleteTypeDef;
/** /**
* @brief HAL DMA Callback ID structure definition * @brief HAL DMA Callback ID structure definition
*/ */
typedef enum typedef enum
{ {
HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */ HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */
HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half transfer */ HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half transfer */
HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */ HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */
HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */ HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */
HAL_DMA_XFER_ALL_CB_ID = 0x04U /*!< All */ HAL_DMA_XFER_ALL_CB_ID = 0x04U /*!< All */
}HAL_DMA_CallbackIDTypeDef; }HAL_DMA_CallbackIDTypeDef;
/** /**
* @brief DMA handle Structure definition * @brief DMA handle Structure definition
*/ */
typedef struct __DMA_HandleTypeDef typedef struct __DMA_HandleTypeDef
{ {
DMA_Channel_TypeDef *Instance; /*!< Register base address */ DMA_Channel_TypeDef *Instance; /*!< Register base address */
DMA_InitTypeDef Init; /*!< DMA communication parameters */ DMA_InitTypeDef Init; /*!< DMA communication parameters */
HAL_LockTypeDef Lock; /*!< DMA locking object */ HAL_LockTypeDef Lock; /*!< DMA locking object */
HAL_DMA_StateTypeDef State; /*!< DMA transfer state */ HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
void *Parent; /*!< Parent object state */ void *Parent; /*!< Parent object state */
void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */ void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */ void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */ void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */ void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
__IO uint32_t ErrorCode; /*!< DMA Error code */ __IO uint32_t ErrorCode; /*!< DMA Error code */
DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */ DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */
uint32_t ChannelIndex; /*!< DMA Channel Index */ uint32_t ChannelIndex; /*!< DMA Channel Index */
} DMA_HandleTypeDef; } DMA_HandleTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup DMA_Exported_Constants DMA Exported Constants /** @defgroup DMA_Exported_Constants DMA Exported Constants
* @{ * @{
*/ */
/** @defgroup DMA_Error_Code DMA Error Code /** @defgroup DMA_Error_Code DMA Error Code
* @{ * @{
*/ */
#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */ #define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */ #define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
#define HAL_DMA_ERROR_NO_XFER 0x00000004U /*!< no ongoing transfer */ #define HAL_DMA_ERROR_NO_XFER 0x00000004U /*!< no ongoing transfer */
#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */ #define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */ #define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
* @{ * @{
*/ */
#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */ #define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */ #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */ #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
* @{ * @{
*/ */
#define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */ #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
#define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode Disable */ #define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode Disable */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
* @{ * @{
*/ */
#define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */ #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
#define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode Disable */ #define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode Disable */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
* @{ * @{
*/ */
#define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment: Byte */ #define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment: Byte */
#define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */ #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
#define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment: Word */ #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment: Word */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Memory_data_size DMA Memory data size /** @defgroup DMA_Memory_data_size DMA Memory data size
* @{ * @{
*/ */
#define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment: Byte */ #define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment: Byte */
#define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment: HalfWord */ #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
#define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment: Word */ #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment: Word */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_mode DMA mode /** @defgroup DMA_mode DMA mode
* @{ * @{
*/ */
#define DMA_NORMAL 0x00000000U /*!< Normal mode */ #define DMA_NORMAL 0x00000000U /*!< Normal mode */
#define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */ #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_Priority_level DMA Priority level /** @defgroup DMA_Priority_level DMA Priority level
* @{ * @{
*/ */
#define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */ #define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
#define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */ #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
#define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */ #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
#define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */ #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
/** /**
* @} * @}
*/ */
/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
* @{ * @{
*/ */
#define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
#define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
#define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
/** /**
* @} * @}
*/ */
/** @defgroup DMA_flag_definitions DMA flag definitions /** @defgroup DMA_flag_definitions DMA flag definitions
* @{ * @{
*/ */
#define DMA_FLAG_GL1 0x00000001U #define DMA_FLAG_GL1 0x00000001U
#define DMA_FLAG_TC1 0x00000002U #define DMA_FLAG_TC1 0x00000002U
#define DMA_FLAG_HT1 0x00000004U #define DMA_FLAG_HT1 0x00000004U
#define DMA_FLAG_TE1 0x00000008U #define DMA_FLAG_TE1 0x00000008U
#define DMA_FLAG_GL2 0x00000010U #define DMA_FLAG_GL2 0x00000010U
#define DMA_FLAG_TC2 0x00000020U #define DMA_FLAG_TC2 0x00000020U
#define DMA_FLAG_HT2 0x00000040U #define DMA_FLAG_HT2 0x00000040U
#define DMA_FLAG_TE2 0x00000080U #define DMA_FLAG_TE2 0x00000080U
#define DMA_FLAG_GL3 0x00000100U #define DMA_FLAG_GL3 0x00000100U
#define DMA_FLAG_TC3 0x00000200U #define DMA_FLAG_TC3 0x00000200U
#define DMA_FLAG_HT3 0x00000400U #define DMA_FLAG_HT3 0x00000400U
#define DMA_FLAG_TE3 0x00000800U #define DMA_FLAG_TE3 0x00000800U
#define DMA_FLAG_GL4 0x00001000U #define DMA_FLAG_GL4 0x00001000U
#define DMA_FLAG_TC4 0x00002000U #define DMA_FLAG_TC4 0x00002000U
#define DMA_FLAG_HT4 0x00004000U #define DMA_FLAG_HT4 0x00004000U
#define DMA_FLAG_TE4 0x00008000U #define DMA_FLAG_TE4 0x00008000U
#define DMA_FLAG_GL5 0x00010000U #define DMA_FLAG_GL5 0x00010000U
#define DMA_FLAG_TC5 0x00020000U #define DMA_FLAG_TC5 0x00020000U
#define DMA_FLAG_HT5 0x00040000U #define DMA_FLAG_HT5 0x00040000U
#define DMA_FLAG_TE5 0x00080000U #define DMA_FLAG_TE5 0x00080000U
#define DMA_FLAG_GL6 0x00100000U #define DMA_FLAG_GL6 0x00100000U
#define DMA_FLAG_TC6 0x00200000U #define DMA_FLAG_TC6 0x00200000U
#define DMA_FLAG_HT6 0x00400000U #define DMA_FLAG_HT6 0x00400000U
#define DMA_FLAG_TE6 0x00800000U #define DMA_FLAG_TE6 0x00800000U
#define DMA_FLAG_GL7 0x01000000U #define DMA_FLAG_GL7 0x01000000U
#define DMA_FLAG_TC7 0x02000000U #define DMA_FLAG_TC7 0x02000000U
#define DMA_FLAG_HT7 0x04000000U #define DMA_FLAG_HT7 0x04000000U
#define DMA_FLAG_TE7 0x08000000U #define DMA_FLAG_TE7 0x08000000U
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup DMA_Exported_Macros DMA Exported Macros /** @defgroup DMA_Exported_Macros DMA Exported Macros
* @{ * @{
*/ */
/** @brief Reset DMA handle state. /** @brief Reset DMA handle state.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval None * @retval None
*/ */
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
/** /**
* @brief Enable the specified DMA Channel. * @brief Enable the specified DMA Channel.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval None * @retval None
*/ */
#define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) #define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
/** /**
* @brief Disable the specified DMA Channel. * @brief Disable the specified DMA Channel.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval None * @retval None
*/ */
#define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) #define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN))
/* Interrupt & Flag management */ /* Interrupt & Flag management */
/** /**
* @brief Enables the specified DMA Channel interrupts. * @brief Enables the specified DMA Channel interrupts.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask * @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer complete interrupt mask * @arg DMA_IT_HT: Half transfer complete interrupt mask
* @arg DMA_IT_TE: Transfer error interrupt mask * @arg DMA_IT_TE: Transfer error interrupt mask
* @retval None * @retval None
*/ */
#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__))) #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__)))
/** /**
* @brief Disable the specified DMA Channel interrupts. * @brief Disable the specified DMA Channel interrupts.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled. * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask * @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer complete interrupt mask * @arg DMA_IT_HT: Half transfer complete interrupt mask
* @arg DMA_IT_TE: Transfer error interrupt mask * @arg DMA_IT_TE: Transfer error interrupt mask
* @retval None * @retval None
*/ */
#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__))) #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__)))
/** /**
* @brief Check whether the specified DMA Channel interrupt is enabled or not. * @brief Check whether the specified DMA Channel interrupt is enabled or not.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __INTERRUPT__: specifies the DMA interrupt source to check. * @param __INTERRUPT__: specifies the DMA interrupt source to check.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg DMA_IT_TC: Transfer complete interrupt mask * @arg DMA_IT_TC: Transfer complete interrupt mask
* @arg DMA_IT_HT: Half transfer complete interrupt mask * @arg DMA_IT_HT: Half transfer complete interrupt mask
* @arg DMA_IT_TE: Transfer error interrupt mask * @arg DMA_IT_TE: Transfer error interrupt mask
* @retval The state of DMA_IT (SET or RESET). * @retval The state of DMA_IT (SET or RESET).
*/ */
#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/** /**
* @brief Return the number of remaining data units in the current DMA Channel transfer. * @brief Return the number of remaining data units in the current DMA Channel transfer.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The number of remaining data units in the current DMA Channel transfer. * @retval The number of remaining data units in the current DMA Channel transfer.
*/ */
#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
/** /**
* @} * @}
*/ */
/* Include DMA HAL Extension module */ /* Include DMA HAL Extension module */
#include "stm32f1xx_hal_dma_ex.h" #include "stm32f1xx_hal_dma_ex.h"
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup DMA_Exported_Functions /** @addtogroup DMA_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup DMA_Exported_Functions_Group1 /** @addtogroup DMA_Exported_Functions_Group1
* @{ * @{
*/ */
/* Initialization and de-initialization functions *****************************/ /* Initialization and de-initialization functions *****************************/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
/** /**
* @} * @}
*/ */
/** @addtogroup DMA_Exported_Functions_Group2 /** @addtogroup DMA_Exported_Functions_Group2
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout); HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma); void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma)); HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID); HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
/** /**
* @} * @}
*/ */
/** @addtogroup DMA_Exported_Functions_Group3 /** @addtogroup DMA_Exported_Functions_Group3
* @{ * @{
*/ */
/* Peripheral State and Error functions ***************************************/ /* Peripheral State and Error functions ***************************************/
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma); HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup DMA_Private_Macros DMA Private Macros /** @defgroup DMA_Private_Macros DMA Private Macros
* @{ * @{
*/ */
#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
((DIRECTION) == DMA_MEMORY_TO_MEMORY)) ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U)) #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
((STATE) == DMA_PINC_DISABLE)) ((STATE) == DMA_PINC_DISABLE))
#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
((STATE) == DMA_MINC_DISABLE)) ((STATE) == DMA_MINC_DISABLE))
#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
((SIZE) == DMA_PDATAALIGN_WORD)) ((SIZE) == DMA_PDATAALIGN_WORD))
#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
((SIZE) == DMA_MDATAALIGN_WORD )) ((SIZE) == DMA_MDATAALIGN_WORD ))
#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
((MODE) == DMA_CIRCULAR)) ((MODE) == DMA_CIRCULAR))
#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
((PRIORITY) == DMA_PRIORITY_HIGH) || \ ((PRIORITY) == DMA_PRIORITY_HIGH) || \
((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
/** /**
* @} * @}
*/ */
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_DMA_H */ #endif /* __STM32F1xx_HAL_DMA_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

586
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h
View File

@@ -1,293 +1,293 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_dma_ex.h * @file stm32f1xx_hal_dma_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DMA HAL extension module. * @brief Header file of DMA HAL extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_DMA_EX_H #ifndef __STM32F1xx_HAL_DMA_EX_H
#define __STM32F1xx_HAL_DMA_EX_H #define __STM32F1xx_HAL_DMA_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @defgroup DMAEx DMAEx /** @defgroup DMAEx DMAEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
* @{ * @{
*/ */
/* Interrupt & Flag management */ /* Interrupt & Flag management */
#if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \ #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
/** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
* @{ * @{
*/ */
/** /**
* @brief Returns the current DMA Channel transfer complete flag. * @brief Returns the current DMA Channel transfer complete flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer complete flag index. * @retval The specified transfer complete flag index.
*/ */
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
DMA_FLAG_TC5) DMA_FLAG_TC5)
/** /**
* @brief Returns the current DMA Channel half transfer complete flag. * @brief Returns the current DMA Channel half transfer complete flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified half transfer complete flag index. * @retval The specified half transfer complete flag index.
*/ */
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
DMA_FLAG_HT5) DMA_FLAG_HT5)
/** /**
* @brief Returns the current DMA Channel transfer error flag. * @brief Returns the current DMA Channel transfer error flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer error flag index. * @retval The specified transfer error flag index.
*/ */
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
DMA_FLAG_TE5) DMA_FLAG_TE5)
/** /**
* @brief Return the current DMA Channel Global interrupt flag. * @brief Return the current DMA Channel Global interrupt flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer error flag index. * @retval The specified transfer error flag index.
*/ */
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\
DMA_FLAG_GL5) DMA_FLAG_GL5)
/** /**
* @brief Get the DMA Channel pending flags. * @brief Get the DMA Channel pending flags.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __FLAG__: Get the specified flag. * @param __FLAG__: Get the specified flag.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCx: Transfer complete flag * @arg DMA_FLAG_TCx: Transfer complete flag
* @arg DMA_FLAG_HTx: Half transfer complete flag * @arg DMA_FLAG_HTx: Half transfer complete flag
* @arg DMA_FLAG_TEx: Transfer error flag * @arg DMA_FLAG_TEx: Transfer error flag
* Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
* @retval The state of FLAG (SET or RESET). * @retval The state of FLAG (SET or RESET).
*/ */
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\ #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\ (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
(DMA1->ISR & (__FLAG__))) (DMA1->ISR & (__FLAG__)))
/** /**
* @brief Clears the DMA Channel pending flags. * @brief Clears the DMA Channel pending flags.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __FLAG__: specifies the flag to clear. * @param __FLAG__: specifies the flag to clear.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCx: Transfer complete flag * @arg DMA_FLAG_TCx: Transfer complete flag
* @arg DMA_FLAG_HTx: Half transfer complete flag * @arg DMA_FLAG_HTx: Half transfer complete flag
* @arg DMA_FLAG_TEx: Transfer error flag * @arg DMA_FLAG_TEx: Transfer error flag
* Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.
* @retval None * @retval None
*/ */
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \ #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\ (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
(DMA1->IFCR = (__FLAG__))) (DMA1->IFCR = (__FLAG__)))
/** /**
* @} * @}
*/ */
#else #else
/** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
* @{ * @{
*/ */
/** /**
* @brief Returns the current DMA Channel transfer complete flag. * @brief Returns the current DMA Channel transfer complete flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer complete flag index. * @retval The specified transfer complete flag index.
*/ */
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
DMA_FLAG_TC7) DMA_FLAG_TC7)
/** /**
* @brief Return the current DMA Channel half transfer complete flag. * @brief Return the current DMA Channel half transfer complete flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified half transfer complete flag index. * @retval The specified half transfer complete flag index.
*/ */
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
DMA_FLAG_HT7) DMA_FLAG_HT7)
/** /**
* @brief Return the current DMA Channel transfer error flag. * @brief Return the current DMA Channel transfer error flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer error flag index. * @retval The specified transfer error flag index.
*/ */
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
DMA_FLAG_TE7) DMA_FLAG_TE7)
/** /**
* @brief Return the current DMA Channel Global interrupt flag. * @brief Return the current DMA Channel Global interrupt flag.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @retval The specified transfer error flag index. * @retval The specified transfer error flag index.
*/ */
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\
DMA_FLAG_GL7) DMA_FLAG_GL7)
/** /**
* @brief Get the DMA Channel pending flags. * @brief Get the DMA Channel pending flags.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __FLAG__: Get the specified flag. * @param __FLAG__: Get the specified flag.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCx: Transfer complete flag * @arg DMA_FLAG_TCx: Transfer complete flag
* @arg DMA_FLAG_HTx: Half transfer complete flag * @arg DMA_FLAG_HTx: Half transfer complete flag
* @arg DMA_FLAG_TEx: Transfer error flag * @arg DMA_FLAG_TEx: Transfer error flag
* @arg DMA_FLAG_GLx: Global interrupt flag * @arg DMA_FLAG_GLx: Global interrupt flag
* Where x can be 1_7 to select the DMA Channel flag. * Where x can be 1_7 to select the DMA Channel flag.
* @retval The state of FLAG (SET or RESET). * @retval The state of FLAG (SET or RESET).
*/ */
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__)) #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
/** /**
* @brief Clear the DMA Channel pending flags. * @brief Clear the DMA Channel pending flags.
* @param __HANDLE__: DMA handle * @param __HANDLE__: DMA handle
* @param __FLAG__: specifies the flag to clear. * @param __FLAG__: specifies the flag to clear.
* This parameter can be any combination of the following values: * This parameter can be any combination of the following values:
* @arg DMA_FLAG_TCx: Transfer complete flag * @arg DMA_FLAG_TCx: Transfer complete flag
* @arg DMA_FLAG_HTx: Half transfer complete flag * @arg DMA_FLAG_HTx: Half transfer complete flag
* @arg DMA_FLAG_TEx: Transfer error flag * @arg DMA_FLAG_TEx: Transfer error flag
* @arg DMA_FLAG_GLx: Global interrupt flag * @arg DMA_FLAG_GLx: Global interrupt flag
* Where x can be 1_7 to select the DMA Channel flag. * Where x can be 1_7 to select the DMA Channel flag.
* @retval None * @retval None
*/ */
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__)) #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
/** /**
* @} * @}
*/ */
#endif #endif
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */ #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
/* STM32F103xG || STM32F105xC || STM32F107xC */ /* STM32F103xG || STM32F105xC || STM32F107xC */
#endif /* __STM32F1xx_HAL_DMA_H */ #endif /* __STM32F1xx_HAL_DMA_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

688
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_flash.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h
View File

@@ -1,344 +1,344 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_flash.h * @file stm32f1xx_hal_flash.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of Flash HAL module. * @brief Header file of Flash HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_FLASH_H #ifndef __STM32F1xx_HAL_FLASH_H
#define __STM32F1xx_HAL_FLASH_H #define __STM32F1xx_HAL_FLASH_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup FLASH /** @addtogroup FLASH
* @{ * @{
*/ */
/** @addtogroup FLASH_Private_Constants /** @addtogroup FLASH_Private_Constants
* @{ * @{
*/ */
#define FLASH_TIMEOUT_VALUE 50000U /* 50 s */ #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
/** /**
* @} * @}
*/ */
/** @addtogroup FLASH_Private_Macros /** @addtogroup FLASH_Private_Macros
* @{ * @{
*/ */
#define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \ #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
((VALUE) == FLASH_TYPEPROGRAM_WORD) || \ ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \
((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD)) ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))
#if defined(FLASH_ACR_LATENCY) #if defined(FLASH_ACR_LATENCY)
#define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \ #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
((__LATENCY__) == FLASH_LATENCY_1) || \ ((__LATENCY__) == FLASH_LATENCY_1) || \
((__LATENCY__) == FLASH_LATENCY_2)) ((__LATENCY__) == FLASH_LATENCY_2))
#else #else
#define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0) #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0)
#endif /* FLASH_ACR_LATENCY */ #endif /* FLASH_ACR_LATENCY */
/** /**
* @} * @}
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup FLASH_Exported_Types FLASH Exported Types /** @defgroup FLASH_Exported_Types FLASH Exported Types
* @{ * @{
*/ */
/** /**
* @brief FLASH Procedure structure definition * @brief FLASH Procedure structure definition
*/ */
typedef enum typedef enum
{ {
FLASH_PROC_NONE = 0U, FLASH_PROC_NONE = 0U,
FLASH_PROC_PAGEERASE = 1U, FLASH_PROC_PAGEERASE = 1U,
FLASH_PROC_MASSERASE = 2U, FLASH_PROC_MASSERASE = 2U,
FLASH_PROC_PROGRAMHALFWORD = 3U, FLASH_PROC_PROGRAMHALFWORD = 3U,
FLASH_PROC_PROGRAMWORD = 4U, FLASH_PROC_PROGRAMWORD = 4U,
FLASH_PROC_PROGRAMDOUBLEWORD = 5U FLASH_PROC_PROGRAMDOUBLEWORD = 5U
} FLASH_ProcedureTypeDef; } FLASH_ProcedureTypeDef;
/** /**
* @brief FLASH handle Structure definition * @brief FLASH handle Structure definition
*/ */
typedef struct typedef struct
{ {
__IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
__IO uint32_t DataRemaining; /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */ __IO uint32_t DataRemaining; /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */
__IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */ __IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */
__IO uint64_t Data; /*!< Internal variable to save data to be programmed */ __IO uint64_t Data; /*!< Internal variable to save data to be programmed */
HAL_LockTypeDef Lock; /*!< FLASH locking object */ HAL_LockTypeDef Lock; /*!< FLASH locking object */
__IO uint32_t ErrorCode; /*!< FLASH error code __IO uint32_t ErrorCode; /*!< FLASH error code
This parameter can be a value of @ref FLASH_Error_Codes */ This parameter can be a value of @ref FLASH_Error_Codes */
} FLASH_ProcessTypeDef; } FLASH_ProcessTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup FLASH_Exported_Constants FLASH Exported Constants /** @defgroup FLASH_Exported_Constants FLASH Exported Constants
* @{ * @{
*/ */
/** @defgroup FLASH_Error_Codes FLASH Error Codes /** @defgroup FLASH_Error_Codes FLASH Error Codes
* @{ * @{
*/ */
#define HAL_FLASH_ERROR_NONE 0x00U /*!< No error */ #define HAL_FLASH_ERROR_NONE 0x00U /*!< No error */
#define HAL_FLASH_ERROR_PROG 0x01U /*!< Programming error */ #define HAL_FLASH_ERROR_PROG 0x01U /*!< Programming error */
#define HAL_FLASH_ERROR_WRP 0x02U /*!< Write protection error */ #define HAL_FLASH_ERROR_WRP 0x02U /*!< Write protection error */
#define HAL_FLASH_ERROR_OPTV 0x04U /*!< Option validity error */ #define HAL_FLASH_ERROR_OPTV 0x04U /*!< Option validity error */
/** /**
* @} * @}
*/ */
/** @defgroup FLASH_Type_Program FLASH Type Program /** @defgroup FLASH_Type_Program FLASH Type Program
* @{ * @{
*/ */
#define FLASH_TYPEPROGRAM_HALFWORD 0x01U /*!<Program a half-word (16-bit) at a specified address.*/ #define FLASH_TYPEPROGRAM_HALFWORD 0x01U /*!<Program a half-word (16-bit) at a specified address.*/
#define FLASH_TYPEPROGRAM_WORD 0x02U /*!<Program a word (32-bit) at a specified address.*/ #define FLASH_TYPEPROGRAM_WORD 0x02U /*!<Program a word (32-bit) at a specified address.*/
#define FLASH_TYPEPROGRAM_DOUBLEWORD 0x03U /*!<Program a double word (64-bit) at a specified address*/ #define FLASH_TYPEPROGRAM_DOUBLEWORD 0x03U /*!<Program a double word (64-bit) at a specified address*/
/** /**
* @} * @}
*/ */
#if defined(FLASH_ACR_LATENCY) #if defined(FLASH_ACR_LATENCY)
/** @defgroup FLASH_Latency FLASH Latency /** @defgroup FLASH_Latency FLASH Latency
* @{ * @{
*/ */
#define FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero Latency cycle */ #define FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero Latency cycle */
#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */ #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */
#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */ #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */
/** /**
* @} * @}
*/ */
#else #else
/** @defgroup FLASH_Latency FLASH Latency /** @defgroup FLASH_Latency FLASH Latency
* @{ * @{
*/ */
#define FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero Latency cycle */ #define FLASH_LATENCY_0 0x00000000U /*!< FLASH Zero Latency cycle */
/** /**
* @} * @}
*/ */
#endif /* FLASH_ACR_LATENCY */ #endif /* FLASH_ACR_LATENCY */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup FLASH_Exported_Macros FLASH Exported Macros /** @defgroup FLASH_Exported_Macros FLASH Exported Macros
* @brief macros to control FLASH features * @brief macros to control FLASH features
* @{ * @{
*/ */
/** @defgroup FLASH_Half_Cycle FLASH Half Cycle /** @defgroup FLASH_Half_Cycle FLASH Half Cycle
* @brief macros to handle FLASH half cycle * @brief macros to handle FLASH half cycle
* @{ * @{
*/ */
/** /**
* @brief Enable the FLASH half cycle access. * @brief Enable the FLASH half cycle access.
* @note half cycle access can only be used with a low-frequency clock of less than * @note half cycle access can only be used with a low-frequency clock of less than
8 MHz that can be obtained with the use of HSI or HSE but not of PLL. 8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
* @retval None * @retval None
*/ */
#define __HAL_FLASH_HALF_CYCLE_ACCESS_ENABLE() (FLASH->ACR |= FLASH_ACR_HLFCYA) #define __HAL_FLASH_HALF_CYCLE_ACCESS_ENABLE() (FLASH->ACR |= FLASH_ACR_HLFCYA)
/** /**
* @brief Disable the FLASH half cycle access. * @brief Disable the FLASH half cycle access.
* @note half cycle access can only be used with a low-frequency clock of less than * @note half cycle access can only be used with a low-frequency clock of less than
8 MHz that can be obtained with the use of HSI or HSE but not of PLL. 8 MHz that can be obtained with the use of HSI or HSE but not of PLL.
* @retval None * @retval None
*/ */
#define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA)) #define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA))
/** /**
* @} * @}
*/ */
#if defined(FLASH_ACR_LATENCY) #if defined(FLASH_ACR_LATENCY)
/** @defgroup FLASH_EM_Latency FLASH Latency /** @defgroup FLASH_EM_Latency FLASH Latency
* @brief macros to handle FLASH Latency * @brief macros to handle FLASH Latency
* @{ * @{
*/ */
/** /**
* @brief Set the FLASH Latency. * @brief Set the FLASH Latency.
* @param __LATENCY__ FLASH Latency * @param __LATENCY__ FLASH Latency
* The value of this parameter depend on device used within the same series * The value of this parameter depend on device used within the same series
* @retval None * @retval None
*/ */
#define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__)) #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__))
/** /**
* @brief Get the FLASH Latency. * @brief Get the FLASH Latency.
* @retval FLASH Latency * @retval FLASH Latency
* The value of this parameter depend on device used within the same series * The value of this parameter depend on device used within the same series
*/ */
#define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
/** /**
* @} * @}
*/ */
#endif /* FLASH_ACR_LATENCY */ #endif /* FLASH_ACR_LATENCY */
/** @defgroup FLASH_Prefetch FLASH Prefetch /** @defgroup FLASH_Prefetch FLASH Prefetch
* @brief macros to handle FLASH Prefetch buffer * @brief macros to handle FLASH Prefetch buffer
* @{ * @{
*/ */
/** /**
* @brief Enable the FLASH prefetch buffer. * @brief Enable the FLASH prefetch buffer.
* @retval None * @retval None
*/ */
#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE) #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE)
/** /**
* @brief Disable the FLASH prefetch buffer. * @brief Disable the FLASH prefetch buffer.
* @retval None * @retval None
*/ */
#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE)) #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE))
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Include FLASH HAL Extended module */ /* Include FLASH HAL Extended module */
#include "stm32f1xx_hal_flash_ex.h" #include "stm32f1xx_hal_flash_ex.h"
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup FLASH_Exported_Functions /** @addtogroup FLASH_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup FLASH_Exported_Functions_Group1 /** @addtogroup FLASH_Exported_Functions_Group1
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
/* FLASH IRQ handler function */ /* FLASH IRQ handler function */
void HAL_FLASH_IRQHandler(void); void HAL_FLASH_IRQHandler(void);
/* Callbacks in non blocking modes */ /* Callbacks in non blocking modes */
void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
/** /**
* @} * @}
*/ */
/** @addtogroup FLASH_Exported_Functions_Group2 /** @addtogroup FLASH_Exported_Functions_Group2
* @{ * @{
*/ */
/* Peripheral Control functions ***********************************************/ /* Peripheral Control functions ***********************************************/
HAL_StatusTypeDef HAL_FLASH_Unlock(void); HAL_StatusTypeDef HAL_FLASH_Unlock(void);
HAL_StatusTypeDef HAL_FLASH_Lock(void); HAL_StatusTypeDef HAL_FLASH_Lock(void);
HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
void HAL_FLASH_OB_Launch(void); void HAL_FLASH_OB_Launch(void);
/** /**
* @} * @}
*/ */
/** @addtogroup FLASH_Exported_Functions_Group3 /** @addtogroup FLASH_Exported_Functions_Group3
* @{ * @{
*/ */
/* Peripheral State and Error functions ***************************************/ /* Peripheral State and Error functions ***************************************/
uint32_t HAL_FLASH_GetError(void); uint32_t HAL_FLASH_GetError(void);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private function -------------------------------------------------*/ /* Private function -------------------------------------------------*/
/** @addtogroup FLASH_Private_Functions /** @addtogroup FLASH_Private_Functions
* @{ * @{
*/ */
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
#if defined(FLASH_BANK2_END) #if defined(FLASH_BANK2_END)
HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout); HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout);
#endif /* FLASH_BANK2_END */ #endif /* FLASH_BANK2_END */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_FLASH_H */ #endif /* __STM32F1xx_HAL_FLASH_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1604
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h
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648
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_gpio.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h
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@@ -1,324 +1,324 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_gpio.h * @file stm32f1xx_hal_gpio.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of GPIO HAL module. * @brief Header file of GPIO HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_GPIO_H #ifndef __STM32F1xx_HAL_GPIO_H
#define __STM32F1xx_HAL_GPIO_H #define __STM32F1xx_HAL_GPIO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup GPIO /** @addtogroup GPIO
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup GPIO_Exported_Types GPIO Exported Types /** @defgroup GPIO_Exported_Types GPIO Exported Types
* @{ * @{
*/ */
/** /**
* @brief GPIO Init structure definition * @brief GPIO Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Pin; /*!< Specifies the GPIO pins to be configured. uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
This parameter can be any value of @ref GPIO_pins_define */ This parameter can be any value of @ref GPIO_pins_define */
uint32_t Mode; /*!< Specifies the operating mode for the selected pins. uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
This parameter can be a value of @ref GPIO_mode_define */ This parameter can be a value of @ref GPIO_mode_define */
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
This parameter can be a value of @ref GPIO_pull_define */ This parameter can be a value of @ref GPIO_pull_define */
uint32_t Speed; /*!< Specifies the speed for the selected pins. uint32_t Speed; /*!< Specifies the speed for the selected pins.
This parameter can be a value of @ref GPIO_speed_define */ This parameter can be a value of @ref GPIO_speed_define */
} GPIO_InitTypeDef; } GPIO_InitTypeDef;
/** /**
* @brief GPIO Bit SET and Bit RESET enumeration * @brief GPIO Bit SET and Bit RESET enumeration
*/ */
typedef enum typedef enum
{ {
GPIO_PIN_RESET = 0U, GPIO_PIN_RESET = 0U,
GPIO_PIN_SET GPIO_PIN_SET
} GPIO_PinState; } GPIO_PinState;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup GPIO_Exported_Constants GPIO Exported Constants /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
* @{ * @{
*/ */
/** @defgroup GPIO_pins_define GPIO pins define /** @defgroup GPIO_pins_define GPIO pins define
* @{ * @{
*/ */
#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */ #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */ #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */ #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */ #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */ #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */ #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */ #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */ #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */ #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */ #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */ #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */ #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */ #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */ #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */ #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */ #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */ #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
#define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */ #define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_mode_define GPIO mode define /** @defgroup GPIO_mode_define GPIO mode define
* @brief GPIO Configuration Mode * @brief GPIO Configuration Mode
* Elements values convention: 0xX0yz00YZ * Elements values convention: 0xX0yz00YZ
* - X : GPIO mode or EXTI Mode * - X : GPIO mode or EXTI Mode
* - y : External IT or Event trigger detection * - y : External IT or Event trigger detection
* - z : IO configuration on External IT or Event * - z : IO configuration on External IT or Event
* - Y : Output type (Push Pull or Open Drain) * - Y : Output type (Push Pull or Open Drain)
* - Z : IO Direction mode (Input, Output, Alternate or Analog) * - Z : IO Direction mode (Input, Output, Alternate or Analog)
* @{ * @{
*/ */
#define GPIO_MODE_INPUT 0x00000000U /*!< Input Floating Mode */ #define GPIO_MODE_INPUT 0x00000000U /*!< Input Floating Mode */
#define GPIO_MODE_OUTPUT_PP 0x00000001U /*!< Output Push Pull Mode */ #define GPIO_MODE_OUTPUT_PP 0x00000001U /*!< Output Push Pull Mode */
#define GPIO_MODE_OUTPUT_OD 0x00000011U /*!< Output Open Drain Mode */ #define GPIO_MODE_OUTPUT_OD 0x00000011U /*!< Output Open Drain Mode */
#define GPIO_MODE_AF_PP 0x00000002U /*!< Alternate Function Push Pull Mode */ #define GPIO_MODE_AF_PP 0x00000002U /*!< Alternate Function Push Pull Mode */
#define GPIO_MODE_AF_OD 0x00000012U /*!< Alternate Function Open Drain Mode */ #define GPIO_MODE_AF_OD 0x00000012U /*!< Alternate Function Open Drain Mode */
#define GPIO_MODE_AF_INPUT GPIO_MODE_INPUT /*!< Alternate Function Input Mode */ #define GPIO_MODE_AF_INPUT GPIO_MODE_INPUT /*!< Alternate Function Input Mode */
#define GPIO_MODE_ANALOG 0x00000003U /*!< Analog Mode */ #define GPIO_MODE_ANALOG 0x00000003U /*!< Analog Mode */
#define GPIO_MODE_IT_RISING 0x10110000U /*!< External Interrupt Mode with Rising edge trigger detection */ #define GPIO_MODE_IT_RISING 0x10110000U /*!< External Interrupt Mode with Rising edge trigger detection */
#define GPIO_MODE_IT_FALLING 0x10210000U /*!< External Interrupt Mode with Falling edge trigger detection */ #define GPIO_MODE_IT_FALLING 0x10210000U /*!< External Interrupt Mode with Falling edge trigger detection */
#define GPIO_MODE_IT_RISING_FALLING 0x10310000U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ #define GPIO_MODE_IT_RISING_FALLING 0x10310000U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
#define GPIO_MODE_EVT_RISING 0x10120000U /*!< External Event Mode with Rising edge trigger detection */ #define GPIO_MODE_EVT_RISING 0x10120000U /*!< External Event Mode with Rising edge trigger detection */
#define GPIO_MODE_EVT_FALLING 0x10220000U /*!< External Event Mode with Falling edge trigger detection */ #define GPIO_MODE_EVT_FALLING 0x10220000U /*!< External Event Mode with Falling edge trigger detection */
#define GPIO_MODE_EVT_RISING_FALLING 0x10320000U /*!< External Event Mode with Rising/Falling edge trigger detection */ #define GPIO_MODE_EVT_RISING_FALLING 0x10320000U /*!< External Event Mode with Rising/Falling edge trigger detection */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_speed_define GPIO speed define /** @defgroup GPIO_speed_define GPIO speed define
* @brief GPIO Output Maximum frequency * @brief GPIO Output Maximum frequency
* @{ * @{
*/ */
#define GPIO_SPEED_FREQ_LOW (GPIO_CRL_MODE0_1) /*!< Low speed */ #define GPIO_SPEED_FREQ_LOW (GPIO_CRL_MODE0_1) /*!< Low speed */
#define GPIO_SPEED_FREQ_MEDIUM (GPIO_CRL_MODE0_0) /*!< Medium speed */ #define GPIO_SPEED_FREQ_MEDIUM (GPIO_CRL_MODE0_0) /*!< Medium speed */
#define GPIO_SPEED_FREQ_HIGH (GPIO_CRL_MODE0) /*!< High speed */ #define GPIO_SPEED_FREQ_HIGH (GPIO_CRL_MODE0) /*!< High speed */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_pull_define GPIO pull define /** @defgroup GPIO_pull_define GPIO pull define
* @brief GPIO Pull-Up or Pull-Down Activation * @brief GPIO Pull-Up or Pull-Down Activation
* @{ * @{
*/ */
#define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */ #define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
#define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */ #define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
#define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */ #define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup GPIO_Exported_Macros GPIO Exported Macros /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
* @{ * @{
*/ */
/** /**
* @brief Checks whether the specified EXTI line flag is set or not. * @brief Checks whether the specified EXTI line flag is set or not.
* @param __EXTI_LINE__: specifies the EXTI line flag to check. * @param __EXTI_LINE__: specifies the EXTI line flag to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET). * @retval The new state of __EXTI_LINE__ (SET or RESET).
*/ */
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
/** /**
* @brief Clears the EXTI's line pending flags. * @brief Clears the EXTI's line pending flags.
* @param __EXTI_LINE__: specifies the EXTI lines flags to clear. * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15) * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
/** /**
* @brief Checks whether the specified EXTI line is asserted or not. * @brief Checks whether the specified EXTI line is asserted or not.
* @param __EXTI_LINE__: specifies the EXTI line to check. * @param __EXTI_LINE__: specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET). * @retval The new state of __EXTI_LINE__ (SET or RESET).
*/ */
#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
/** /**
* @brief Clears the EXTI's line pending bits. * @brief Clears the EXTI's line pending bits.
* @param __EXTI_LINE__: specifies the EXTI lines to clear. * @param __EXTI_LINE__: specifies the EXTI lines to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15) * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
/** /**
* @brief Generates a Software interrupt on selected EXTI line. * @brief Generates a Software interrupt on selected EXTI line.
* @param __EXTI_LINE__: specifies the EXTI line to check. * @param __EXTI_LINE__: specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
/** /**
* @} * @}
*/ */
/* Include GPIO HAL Extension module */ /* Include GPIO HAL Extension module */
#include "stm32f1xx_hal_gpio_ex.h" #include "stm32f1xx_hal_gpio_ex.h"
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup GPIO_Exported_Functions /** @addtogroup GPIO_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup GPIO_Exported_Functions_Group1 /** @addtogroup GPIO_Exported_Functions_Group1
* @{ * @{
*/ */
/* Initialization and de-initialization functions *****************************/ /* Initialization and de-initialization functions *****************************/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
/** /**
* @} * @}
*/ */
/** @addtogroup GPIO_Exported_Functions_Group2 /** @addtogroup GPIO_Exported_Functions_Group2
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup GPIO_Private_Constants GPIO Private Constants /** @defgroup GPIO_Private_Constants GPIO Private Constants
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup GPIO_Private_Macros GPIO Private Macros /** @defgroup GPIO_Private_Macros GPIO Private Macros
* @{ * @{
*/ */
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
#define IS_GPIO_PIN(PIN) ((((PIN) & GPIO_PIN_MASK ) != 0x00U) && (((PIN) & ~GPIO_PIN_MASK) == 0x00U)) #define IS_GPIO_PIN(PIN) ((((PIN) & GPIO_PIN_MASK ) != 0x00U) && (((PIN) & ~GPIO_PIN_MASK) == 0x00U))
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
((MODE) == GPIO_MODE_OUTPUT_PP) ||\ ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
((MODE) == GPIO_MODE_OUTPUT_OD) ||\ ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
((MODE) == GPIO_MODE_AF_PP) ||\ ((MODE) == GPIO_MODE_AF_PP) ||\
((MODE) == GPIO_MODE_AF_OD) ||\ ((MODE) == GPIO_MODE_AF_OD) ||\
((MODE) == GPIO_MODE_IT_RISING) ||\ ((MODE) == GPIO_MODE_IT_RISING) ||\
((MODE) == GPIO_MODE_IT_FALLING) ||\ ((MODE) == GPIO_MODE_IT_FALLING) ||\
((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\ ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
((MODE) == GPIO_MODE_EVT_RISING) ||\ ((MODE) == GPIO_MODE_EVT_RISING) ||\
((MODE) == GPIO_MODE_EVT_FALLING) ||\ ((MODE) == GPIO_MODE_EVT_FALLING) ||\
((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\ ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
((MODE) == GPIO_MODE_ANALOG)) ((MODE) == GPIO_MODE_ANALOG))
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || \ #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || \
((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || ((SPEED) == GPIO_SPEED_FREQ_HIGH)) ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || ((SPEED) == GPIO_SPEED_FREQ_HIGH))
#define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
((PULL) == GPIO_PULLDOWN)) ((PULL) == GPIO_PULLDOWN))
/** /**
* @} * @}
*/ */
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** @defgroup GPIO_Private_Functions GPIO Private Functions /** @defgroup GPIO_Private_Functions GPIO Private Functions
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_GPIO_H */ #endif /* __STM32F1xx_HAL_GPIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h
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1300
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_i2c.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h
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476
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_iwdg.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h
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@@ -1,238 +1,238 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_iwdg.h * @file stm32f1xx_hal_iwdg.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of IWDG HAL module. * @brief Header file of IWDG HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_IWDG_H #ifndef __STM32F1xx_HAL_IWDG_H
#define __STM32F1xx_HAL_IWDG_H #define __STM32F1xx_HAL_IWDG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup IWDG /** @addtogroup IWDG
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup IWDG_Exported_Types IWDG Exported Types /** @defgroup IWDG_Exported_Types IWDG Exported Types
* @{ * @{
*/ */
/** /**
* @brief IWDG Init structure definition * @brief IWDG Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Prescaler; /*!< Select the prescaler of the IWDG. uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
This parameter can be a value of @ref IWDG_Prescaler */ This parameter can be a value of @ref IWDG_Prescaler */
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
} IWDG_InitTypeDef; } IWDG_InitTypeDef;
/** /**
* @brief IWDG Handle Structure definition * @brief IWDG Handle Structure definition
*/ */
typedef struct typedef struct
{ {
IWDG_TypeDef *Instance; /*!< Register base address */ IWDG_TypeDef *Instance; /*!< Register base address */
IWDG_InitTypeDef Init; /*!< IWDG required parameters */ IWDG_InitTypeDef Init; /*!< IWDG required parameters */
} IWDG_HandleTypeDef; } IWDG_HandleTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
* @{ * @{
*/ */
/** @defgroup IWDG_Prescaler IWDG Prescaler /** @defgroup IWDG_Prescaler IWDG Prescaler
* @{ * @{
*/ */
#define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
* @{ * @{
*/ */
/** /**
* @brief Enable the IWDG peripheral. * @brief Enable the IWDG peripheral.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
/** /**
* @brief Reload IWDG counter with value defined in the reload register * @brief Reload IWDG counter with value defined in the reload register
* (write access to IWDG_PR & IWDG_RLR registers disabled). * (write access to IWDG_PR & IWDG_RLR registers disabled).
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
* @{ * @{
*/ */
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
* @{ * @{
*/ */
/* Initialization/Start functions ********************************************/ /* Initialization/Start functions ********************************************/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
/** /**
* @} * @}
*/ */
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
* @{ * @{
*/ */
/* I/O operation functions ****************************************************/ /* I/O operation functions ****************************************************/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_Private_Constants IWDG Private Constants /** @defgroup IWDG_Private_Constants IWDG Private Constants
* @{ * @{
*/ */
/** /**
* @brief IWDG Key Register BitMask * @brief IWDG Key Register BitMask
*/ */
#define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
#define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Macros IWDG Private Macros /** @defgroup IWDG_Private_Macros IWDG Private Macros
* @{ * @{
*/ */
/** /**
* @brief Enable write access to IWDG_PR and IWDG_RLR registers. * @brief Enable write access to IWDG_PR and IWDG_RLR registers.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
/** /**
* @brief Disable write access to IWDG_PR and IWDG_RLR registers. * @brief Disable write access to IWDG_PR and IWDG_RLR registers.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
/** /**
* @brief Check IWDG prescaler value. * @brief Check IWDG prescaler value.
* @param __PRESCALER__ IWDG prescaler value * @param __PRESCALER__ IWDG prescaler value
* @retval None * @retval None
*/ */
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
((__PRESCALER__) == IWDG_PRESCALER_8) || \ ((__PRESCALER__) == IWDG_PRESCALER_8) || \
((__PRESCALER__) == IWDG_PRESCALER_16) || \ ((__PRESCALER__) == IWDG_PRESCALER_16) || \
((__PRESCALER__) == IWDG_PRESCALER_32) || \ ((__PRESCALER__) == IWDG_PRESCALER_32) || \
((__PRESCALER__) == IWDG_PRESCALER_64) || \ ((__PRESCALER__) == IWDG_PRESCALER_64) || \
((__PRESCALER__) == IWDG_PRESCALER_128)|| \ ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
((__PRESCALER__) == IWDG_PRESCALER_256)) ((__PRESCALER__) == IWDG_PRESCALER_256))
/** /**
* @brief Check IWDG reload value. * @brief Check IWDG reload value.
* @param __RELOAD__ IWDG reload value * @param __RELOAD__ IWDG reload value
* @retval None * @retval None
*/ */
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_IWDG_H */ #endif /* __STM32F1xx_HAL_IWDG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

808
workspace/TS100/HAL_Driver/Inc/stm32f1xx_hal_pwr.h → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h
View File

@@ -1,404 +1,404 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_pwr.h * @file stm32f1xx_hal_pwr.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of PWR HAL module. * @brief Header file of PWR HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_PWR_H #ifndef __STM32F1xx_HAL_PWR_H
#define __STM32F1xx_HAL_PWR_H #define __STM32F1xx_HAL_PWR_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup PWR /** @addtogroup PWR
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup PWR_Exported_Types PWR Exported Types /** @defgroup PWR_Exported_Types PWR Exported Types
* @{ * @{
*/ */
/** /**
* @brief PWR PVD configuration structure definition * @brief PWR PVD configuration structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
This parameter can be a value of @ref PWR_PVD_detection_level */ This parameter can be a value of @ref PWR_PVD_detection_level */
uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
This parameter can be a value of @ref PWR_PVD_Mode */ This parameter can be a value of @ref PWR_PVD_Mode */
}PWR_PVDTypeDef; }PWR_PVDTypeDef;
/** /**
* @} * @}
*/ */
/* Internal constants --------------------------------------------------------*/ /* Internal constants --------------------------------------------------------*/
/** @addtogroup PWR_Private_Constants /** @addtogroup PWR_Private_Constants
* @{ * @{
*/ */
#define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup PWR_Exported_Constants PWR Exported Constants /** @defgroup PWR_Exported_Constants PWR Exported Constants
* @{ * @{
*/ */
/** @defgroup PWR_PVD_detection_level PWR PVD detection level /** @defgroup PWR_PVD_detection_level PWR PVD detection level
* @{ * @{
*/ */
#define PWR_PVDLEVEL_0 PWR_CR_PLS_2V2 #define PWR_PVDLEVEL_0 PWR_CR_PLS_2V2
#define PWR_PVDLEVEL_1 PWR_CR_PLS_2V3 #define PWR_PVDLEVEL_1 PWR_CR_PLS_2V3
#define PWR_PVDLEVEL_2 PWR_CR_PLS_2V4 #define PWR_PVDLEVEL_2 PWR_CR_PLS_2V4
#define PWR_PVDLEVEL_3 PWR_CR_PLS_2V5 #define PWR_PVDLEVEL_3 PWR_CR_PLS_2V5
#define PWR_PVDLEVEL_4 PWR_CR_PLS_2V6 #define PWR_PVDLEVEL_4 PWR_CR_PLS_2V6
#define PWR_PVDLEVEL_5 PWR_CR_PLS_2V7 #define PWR_PVDLEVEL_5 PWR_CR_PLS_2V7
#define PWR_PVDLEVEL_6 PWR_CR_PLS_2V8 #define PWR_PVDLEVEL_6 PWR_CR_PLS_2V8
#define PWR_PVDLEVEL_7 PWR_CR_PLS_2V9 #define PWR_PVDLEVEL_7 PWR_CR_PLS_2V9
/** /**
* @} * @}
*/ */
/** @defgroup PWR_PVD_Mode PWR PVD Mode /** @defgroup PWR_PVD_Mode PWR PVD Mode
* @{ * @{
*/ */
#define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
#define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
#define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
#define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
#define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
#define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
#define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
* @{ * @{
*/ */
#define PWR_WAKEUP_PIN1 PWR_CSR_EWUP #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP
/** /**
* @} * @}
*/ */
/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
* @{ * @{
*/ */
#define PWR_MAINREGULATOR_ON 0x00000000U #define PWR_MAINREGULATOR_ON 0x00000000U
#define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
/** /**
* @} * @}
*/ */
/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
* @{ * @{
*/ */
#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
/** /**
* @} * @}
*/ */
/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
* @{ * @{
*/ */
#define PWR_STOPENTRY_WFI ((uint8_t)0x01) #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
#define PWR_STOPENTRY_WFE ((uint8_t)0x02) #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
/** /**
* @} * @}
*/ */
/** @defgroup PWR_Flag PWR Flag /** @defgroup PWR_Flag PWR Flag
* @{ * @{
*/ */
#define PWR_FLAG_WU PWR_CSR_WUF #define PWR_FLAG_WU PWR_CSR_WUF
#define PWR_FLAG_SB PWR_CSR_SBF #define PWR_FLAG_SB PWR_CSR_SBF
#define PWR_FLAG_PVDO PWR_CSR_PVDO #define PWR_FLAG_PVDO PWR_CSR_PVDO
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup PWR_Exported_Macros PWR Exported Macros /** @defgroup PWR_Exported_Macros PWR Exported Macros
* @{ * @{
*/ */
/** @brief Check PWR flag is set or not. /** @brief Check PWR flag is set or not.
* @param __FLAG__: specifies the flag to check. * @param __FLAG__: specifies the flag to check.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
* was received from the WKUP pin or from the RTC alarm * was received from the WKUP pin or from the RTC alarm
* An additional wakeup event is detected if the WKUP pin is enabled * An additional wakeup event is detected if the WKUP pin is enabled
* (by setting the EWUP bit) when the WKUP pin level is already high. * (by setting the EWUP bit) when the WKUP pin level is already high.
* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
* resumed from StandBy mode. * resumed from StandBy mode.
* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
* by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
* For this reason, this bit is equal to 0 after Standby or reset * For this reason, this bit is equal to 0 after Standby or reset
* until the PVDE bit is set. * until the PVDE bit is set.
* @retval The new state of __FLAG__ (TRUE or FALSE). * @retval The new state of __FLAG__ (TRUE or FALSE).
*/ */
#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
/** @brief Clear the PWR's pending flags. /** @brief Clear the PWR's pending flags.
* @param __FLAG__: specifies the flag to clear. * @param __FLAG__: specifies the flag to clear.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg PWR_FLAG_WU: Wake Up flag * @arg PWR_FLAG_WU: Wake Up flag
* @arg PWR_FLAG_SB: StandBy flag * @arg PWR_FLAG_SB: StandBy flag
*/ */
#define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
/** /**
* @brief Enable interrupt on PVD Exti Line 16. * @brief Enable interrupt on PVD Exti Line 16.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable interrupt on PVD Exti Line 16. * @brief Disable interrupt on PVD Exti Line 16.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
/** /**
* @brief Enable event on PVD Exti Line 16. * @brief Enable event on PVD Exti Line 16.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable event on PVD Exti Line 16. * @brief Disable event on PVD Exti Line 16.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
/** /**
* @brief PVD EXTI line configuration: set falling edge trigger. * @brief PVD EXTI line configuration: set falling edge trigger.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable the PVD Extended Interrupt Falling Trigger. * @brief Disable the PVD Extended Interrupt Falling Trigger.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
/** /**
* @brief PVD EXTI line configuration: set rising edge trigger. * @brief PVD EXTI line configuration: set rising edge trigger.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable the PVD Extended Interrupt Rising Trigger. * @brief Disable the PVD Extended Interrupt Rising Trigger.
* This parameter can be: * This parameter can be:
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
/** /**
* @brief PVD EXTI line configuration: set rising & falling edge trigger. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
/** /**
* @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
* This parameter can be: * This parameter can be:
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
/** /**
* @brief Check whether the specified PVD EXTI interrupt flag is set or not. * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
* @retval EXTI PVD Line Status. * @retval EXTI PVD Line Status.
*/ */
#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
/** /**
* @brief Clear the PVD EXTI flag. * @brief Clear the PVD EXTI flag.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
/** /**
* @brief Generate a Software interrupt on selected EXTI line. * @brief Generate a Software interrupt on selected EXTI line.
* @retval None. * @retval None.
*/ */
#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
/** /**
* @} * @}
*/ */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
/** @defgroup PWR_Private_Macros PWR Private Macros /** @defgroup PWR_Private_Macros PWR Private Macros
* @{ * @{
*/ */
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
((MODE) == PWR_PVD_MODE_NORMAL)) ((MODE) == PWR_PVD_MODE_NORMAL))
#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1)) #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1))
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup PWR_Exported_Functions PWR Exported Functions /** @addtogroup PWR_Exported_Functions PWR Exported Functions
* @{ * @{
*/ */
/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
* @{ * @{
*/ */
/* Initialization and de-initialization functions *******************************/ /* Initialization and de-initialization functions *******************************/
void HAL_PWR_DeInit(void); void HAL_PWR_DeInit(void);
void HAL_PWR_EnableBkUpAccess(void); void HAL_PWR_EnableBkUpAccess(void);
void HAL_PWR_DisableBkUpAccess(void); void HAL_PWR_DisableBkUpAccess(void);
/** /**
* @} * @}
*/ */
/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
* @{ * @{
*/ */
/* Peripheral Control functions ************************************************/ /* Peripheral Control functions ************************************************/
void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
/* #define HAL_PWR_ConfigPVD 12*/ /* #define HAL_PWR_ConfigPVD 12*/
void HAL_PWR_EnablePVD(void); void HAL_PWR_EnablePVD(void);
void HAL_PWR_DisablePVD(void); void HAL_PWR_DisablePVD(void);
/* WakeUp pins configuration functions ****************************************/ /* WakeUp pins configuration functions ****************************************/
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
/* Low Power modes configuration functions ************************************/ /* Low Power modes configuration functions ************************************/
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
void HAL_PWR_EnterSTANDBYMode(void); void HAL_PWR_EnterSTANDBYMode(void);
void HAL_PWR_EnableSleepOnExit(void); void HAL_PWR_EnableSleepOnExit(void);
void HAL_PWR_DisableSleepOnExit(void); void HAL_PWR_DisableSleepOnExit(void);
void HAL_PWR_EnableSEVOnPend(void); void HAL_PWR_EnableSEVOnPend(void);
void HAL_PWR_DisableSEVOnPend(void); void HAL_PWR_DisableSEVOnPend(void);
void HAL_PWR_PVD_IRQHandler(void); void HAL_PWR_PVD_IRQHandler(void);
void HAL_PWR_PVDCallback(void); void HAL_PWR_PVDCallback(void);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_PWR_H */ #endif /* __STM32F1xx_HAL_PWR_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@@ -1,343 +1,343 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f1xx_hal_tim_ex.h * @file stm32f1xx_hal_tim_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of TIM HAL Extension module. * @brief Header file of TIM HAL Extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_TIM_EX_H #ifndef __STM32F1xx_HAL_TIM_EX_H
#define __STM32F1xx_HAL_TIM_EX_H #define __STM32F1xx_HAL_TIM_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal_def.h" #include "stm32f1xx_hal_def.h"
/** @addtogroup STM32F1xx_HAL_Driver /** @addtogroup STM32F1xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup TIMEx /** @addtogroup TIMEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup TIMEx_Exported_Types TIMEx Exported Types /** @defgroup TIMEx_Exported_Types TIMEx Exported Types
* @{ * @{
*/ */
/** /**
* @brief TIM Hall sensor Configuration Structure definition * @brief TIM Hall sensor Configuration Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
This parameter can be a value of @ref TIM_Input_Capture_Polarity */ This parameter can be a value of @ref TIM_Input_Capture_Polarity */
uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
uint32_t IC1Filter; /*!< Specifies the input capture filter. uint32_t IC1Filter; /*!< Specifies the input capture filter.
This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
} TIM_HallSensor_InitTypeDef; } TIM_HallSensor_InitTypeDef;
#if defined (STM32F100xB) || defined (STM32F100xE) || \ #if defined (STM32F100xB) || defined (STM32F100xE) || \
defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \
defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F105xC) || defined (STM32F107xC)
/** /**
* @brief TIM Break and Dead time configuration Structure definition * @brief TIM Break and Dead time configuration Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t OffStateRunMode; /*!< TIM off state in run mode uint32_t OffStateRunMode; /*!< TIM off state in run mode
This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
uint32_t LockLevel; /*!< TIM Lock level uint32_t LockLevel; /*!< TIM Lock level
This parameter can be a value of @ref TIM_Lock_level */ This parameter can be a value of @ref TIM_Lock_level */
uint32_t DeadTime; /*!< TIM dead Time uint32_t DeadTime; /*!< TIM dead Time
This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
uint32_t BreakState; /*!< TIM Break State uint32_t BreakState; /*!< TIM Break State
This parameter can be a value of @ref TIM_Break_Input_enable_disable */ This parameter can be a value of @ref TIM_Break_Input_enable_disable */
uint32_t BreakPolarity; /*!< TIM Break input polarity uint32_t BreakPolarity; /*!< TIM Break input polarity
This parameter can be a value of @ref TIM_Break_Polarity */ This parameter can be a value of @ref TIM_Break_Polarity */
uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
} TIM_BreakDeadTimeConfigTypeDef; } TIM_BreakDeadTimeConfigTypeDef;
#endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */
/* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */
/* defined(STM32F105xC) || defined(STM32F107xC) */ /* defined(STM32F105xC) || defined(STM32F107xC) */
/** /**
* @brief TIM Master configuration Structure definition * @brief TIM Master configuration Structure definition
*/ */
typedef struct { typedef struct {
uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
This parameter can be a value of @ref TIM_Master_Mode_Selection */ This parameter can be a value of @ref TIM_Master_Mode_Selection */
uint32_t MasterSlaveMode; /*!< Master/slave mode selection uint32_t MasterSlaveMode; /*!< Master/slave mode selection
This parameter can be a value of @ref TIM_Master_Slave_Mode */ This parameter can be a value of @ref TIM_Master_Slave_Mode */
}TIM_MasterConfigTypeDef; }TIM_MasterConfigTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
#if defined (STM32F100xB) || defined (STM32F100xE) || \ #if defined (STM32F100xB) || defined (STM32F100xE) || \
defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \
defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F105xC) || defined (STM32F107xC)
/** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
* @{ * @{
*/ */
/** @defgroup TIMEx_Clock_Filter TIMEx Clock Filter /** @defgroup TIMEx_Clock_Filter TIMEx Clock Filter
* @{ * @{
*/ */
#define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU) /*!< BreakDead Time */ #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU) /*!< BreakDead Time */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */
/* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */
/* defined(STM32F105xC) || defined(STM32F107xC) */ /* defined(STM32F105xC) || defined(STM32F107xC) */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** /**
* @brief Sets the TIM Output compare preload. * @brief Sets the TIM Output compare preload.
* @param __HANDLE__: TIM handle. * @param __HANDLE__: TIM handle.
* @param __CHANNEL__: TIM Channels to be configured. * @param __CHANNEL__: TIM Channels to be configured.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg TIM_CHANNEL_1: TIM Channel 1 selected * @arg TIM_CHANNEL_1: TIM Channel 1 selected
* @arg TIM_CHANNEL_2: TIM Channel 2 selected * @arg TIM_CHANNEL_2: TIM Channel 2 selected
* @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval None * @retval None
*/ */
#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ #define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\ (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\ ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\ ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\
((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE))
/** /**
* @brief Resets the TIM Output compare preload. * @brief Resets the TIM Output compare preload.
* @param __HANDLE__: TIM handle. * @param __HANDLE__: TIM handle.
* @param __CHANNEL__: TIM Channels to be configured. * @param __CHANNEL__: TIM Channels to be configured.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg TIM_CHANNEL_1: TIM Channel 1 selected * @arg TIM_CHANNEL_1: TIM Channel 1 selected
* @arg TIM_CHANNEL_2: TIM Channel 2 selected * @arg TIM_CHANNEL_2: TIM Channel 2 selected
* @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval None * @retval None
*/ */
#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ #define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) :\ (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\ ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\ ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\
((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE)) ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE))
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup TIMEx_Exported_Functions /** @addtogroup TIMEx_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group1 /** @addtogroup TIMEx_Exported_Functions_Group1
* @{ * @{
*/ */
/* Timer Hall Sensor functions **********************************************/ /* Timer Hall Sensor functions **********************************************/
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
/* Non-Blocking mode: Interrupt */ /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
/* Non-Blocking mode: DMA */ /* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
/** /**
* @} * @}
*/ */
#if defined (STM32F100xB) || defined (STM32F100xE) || \ #if defined (STM32F100xB) || defined (STM32F100xE) || \
defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \
defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F105xC) || defined (STM32F107xC)
/** @addtogroup TIMEx_Exported_Functions_Group2 /** @addtogroup TIMEx_Exported_Functions_Group2
* @{ * @{
*/ */
/* Timer Complementary Output Compare functions *****************************/ /* Timer Complementary Output Compare functions *****************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: Interrupt */ /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */ /* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/** /**
* @} * @}
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group3 /** @addtogroup TIMEx_Exported_Functions_Group3
* @{ * @{
*/ */
/* Timer Complementary PWM functions ****************************************/ /* Timer Complementary PWM functions ****************************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: Interrupt */ /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */ /* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/** /**
* @} * @}
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group4 /** @addtogroup TIMEx_Exported_Functions_Group4
* @{ * @{
*/ */
/* Timer Complementary One Pulse functions **********************************/ /* Timer Complementary One Pulse functions **********************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
/* Non-Blocking mode: Interrupt */ /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
/** /**
* @} * @}
*/ */
#endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */
/* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */
/* defined(STM32F105xC) || defined(STM32F107xC) */ /* defined(STM32F105xC) || defined(STM32F107xC) */
/** @addtogroup TIMEx_Exported_Functions_Group5 /** @addtogroup TIMEx_Exported_Functions_Group5
* @{ * @{
*/ */
/* Extended Control functions ************************************************/ /* Extended Control functions ************************************************/
#if defined (STM32F100xB) || defined (STM32F100xE) || \ #if defined (STM32F100xB) || defined (STM32F100xE) || \
defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \
defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F105xC) || defined (STM32F107xC)
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
#endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */
/* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */
/* defined(STM32F105xC) || defined(STM32F107xC) */ /* defined(STM32F105xC) || defined(STM32F107xC) */
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
/** /**
* @} * @}
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group6 /** @addtogroup TIMEx_Exported_Functions_Group6
* @{ * @{
*/ */
/* Extension Callback *********************************************************/ /* Extension Callback *********************************************************/
void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
/** /**
* @} * @}
*/ */
#if defined (STM32F100xB) || defined (STM32F100xE) || \ #if defined (STM32F100xB) || defined (STM32F100xE) || \
defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \
defined (STM32F105xC) || defined (STM32F107xC) defined (STM32F105xC) || defined (STM32F107xC)
/** @addtogroup TIMEx_Exported_Functions_Group7 /** @addtogroup TIMEx_Exported_Functions_Group7
* @{ * @{
*/ */
/* Extension Peripheral State functions **************************************/ /* Extension Peripheral State functions **************************************/
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
/** /**
* @} * @}
*/ */
#endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */
/* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */
/* defined(STM32F105xC) || defined(STM32F107xC) */ /* defined(STM32F105xC) || defined(STM32F107xC) */
/** /**
* @} * @}
*/ */
/* End of exported functions -------------------------------------------------*/ /* End of exported functions -------------------------------------------------*/
/* Private functions----------------------------------------------------------*/ /* Private functions----------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIMEx Private Functions /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
* @{ * @{
*/ */
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
/** /**
* @} * @}
*/ */
/* End of private functions --------------------------------------------------*/ /* End of private functions --------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32F1xx_HAL_TIM_EX_H */ #endif /* __STM32F1xx_HAL_TIM_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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workspace/TS100/HAL_Driver/Src/stm32f1xx_hal.c → workspace/TS100/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
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