From 81de60e1e46cd9f919059b0f390546d5548e8a79 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Sun, 6 Jun 2021 18:45:00 +0200 Subject: [PATCH 01/10] USB PD timeout added --- Translations/translation_BG.json | 7 +++++++ Translations/translation_CS.json | 7 +++++++ Translations/translation_DA.json | 7 +++++++ Translations/translation_DE.json | 7 +++++++ Translations/translation_EN.json | 7 +++++++ Translations/translation_ES.json | 7 +++++++ Translations/translation_FI.json | 7 +++++++ Translations/translation_FR.json | 7 +++++++ Translations/translation_HR.json | 7 +++++++ Translations/translation_HU.json | 7 +++++++ Translations/translation_IT.json | 7 +++++++ Translations/translation_JA_JP.json | 7 +++++++ Translations/translation_LT.json | 7 +++++++ Translations/translation_NL.json | 7 +++++++ Translations/translation_NL_BE.json | 7 +++++++ Translations/translation_NO.json | 7 +++++++ Translations/translation_PL.json | 7 +++++++ Translations/translation_PT.json | 7 +++++++ Translations/translation_RU.json | 7 +++++++ Translations/translation_SK.json | 7 +++++++ Translations/translation_SL.json | 7 +++++++ Translations/translation_SR_CYRL.json | 7 +++++++ Translations/translation_SR_LATN.json | 7 +++++++ Translations/translation_SV.json | 7 +++++++ Translations/translation_TR.json | 7 +++++++ Translations/translation_UK.json | 7 +++++++ Translations/translation_YUE_HK.json | 7 +++++++ Translations/translation_ZH_CN.json | 7 +++++++ Translations/translation_ZH_TW.json | 7 +++++++ Translations/translations_def.js | 6 ++++++ source/Core/Drivers/FUSB302/policy_engine.cpp | 14 ++++++++++++++ source/Core/Drivers/FUSB302/policy_engine.h | 8 ++++++++ source/Core/Inc/Settings.h | 1 + source/Core/Inc/Translation.h | 1 + source/Core/Src/Settings.cpp | 1 + source/Core/Src/gui.cpp | 18 ++++++++++++++++++ 36 files changed, 252 insertions(+) diff --git a/Translations/translation_BG.json b/Translations/translation_BG.json index 337ea374..230dc44d 100644 --- a/Translations/translation_BG.json +++ b/Translations/translation_BG.json @@ -223,6 +223,13 @@ ], "desc": "Мощност на избраното захранване" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Лимит на", diff --git a/Translations/translation_CS.json b/Translations/translation_CS.json index 9964c606..cee4e94d 100644 --- a/Translations/translation_CS.json +++ b/Translations/translation_CS.json @@ -222,6 +222,13 @@ ], "desc": "Výkon použítého napájecího adaptéru ve wattech." }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Omezení", diff --git a/Translations/translation_DA.json b/Translations/translation_DA.json index 63560530..dc4ed073 100644 --- a/Translations/translation_DA.json +++ b/Translations/translation_DA.json @@ -222,6 +222,13 @@ ], "desc": "Power Wattage of the power adapter used" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_DE.json b/Translations/translation_DE.json index 9fa6d1c2..91a012a0 100644 --- a/Translations/translation_DE.json +++ b/Translations/translation_DE.json @@ -223,6 +223,13 @@ ], "desc": "Maximal zulässige Spannung der verwendeten Spannungsversorgung (V=Volt)" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Leistungs-", diff --git a/Translations/translation_EN.json b/Translations/translation_EN.json index 8e22848f..51f7e8a1 100644 --- a/Translations/translation_EN.json +++ b/Translations/translation_EN.json @@ -222,6 +222,13 @@ ], "desc": "Max QC voltage the iron should negotiate for" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_ES.json b/Translations/translation_ES.json index 801164a9..75c5268c 100644 --- a/Translations/translation_ES.json +++ b/Translations/translation_ES.json @@ -223,6 +223,13 @@ ], "desc": "Potencia en vatios del adaptador de corriente utilizado." }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Ajustar la", diff --git a/Translations/translation_FI.json b/Translations/translation_FI.json index 86cbd721..4a64a92a 100644 --- a/Translations/translation_FI.json +++ b/Translations/translation_FI.json @@ -221,6 +221,13 @@ ], "desc": "Ensisijainen maksimi QC jännite" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Tehon-", diff --git a/Translations/translation_FR.json b/Translations/translation_FR.json index bc49e8e1..9a19f1b0 100644 --- a/Translations/translation_FR.json +++ b/Translations/translation_FR.json @@ -222,6 +222,13 @@ ], "desc": "Tension maximale désirée avec une alimentation QC" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Limite de", diff --git a/Translations/translation_HR.json b/Translations/translation_HR.json index 8d57938d..e697c05f 100644 --- a/Translations/translation_HR.json +++ b/Translations/translation_HR.json @@ -222,6 +222,13 @@ ], "desc": "Snaga modula za napajanje" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_HU.json b/Translations/translation_HU.json index 2ee4fa77..152345a9 100644 --- a/Translations/translation_HU.json +++ b/Translations/translation_HU.json @@ -225,6 +225,13 @@ ], "desc": "Maximális USB feszültség (QuickCharge)" }, + "PDNegTimeout": { + "text2": [ + "PD", + "időtúllépés" + ], + "desc": "PD egyeztetési leidőzítés 100ms lépésekben megadva néhány QC töltővel való kompatibilitás érdekében (0: kikapcsolva)" + }, "PowerLimit": { "text2": [ "Teljesítmény", diff --git a/Translations/translation_IT.json b/Translations/translation_IT.json index ee13efe1..03e335f2 100644 --- a/Translations/translation_IT.json +++ b/Translations/translation_IT.json @@ -222,6 +222,13 @@ ], "desc": "Imposta il massimo voltaggio negoziabile con un alimentatore Quick Charge" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Limite", diff --git a/Translations/translation_JA_JP.json b/Translations/translation_JA_JP.json index 9a34b60e..43346306 100644 --- a/Translations/translation_JA_JP.json +++ b/Translations/translation_JA_JP.json @@ -154,6 +154,13 @@ "text2": "QC電圧", "desc": "QC電源使用時に要求する目標電圧" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": "電力制限", "desc": "はんだ付てが使用できる最大電力を制限する " diff --git a/Translations/translation_LT.json b/Translations/translation_LT.json index ee8f9346..08ade638 100644 --- a/Translations/translation_LT.json +++ b/Translations/translation_LT.json @@ -222,6 +222,13 @@ ], "desc": "Maksimali QC maitinimo bloko įtampa" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Galios", diff --git a/Translations/translation_NL.json b/Translations/translation_NL.json index 8bdd20fe..9ec43f05 100644 --- a/Translations/translation_NL.json +++ b/Translations/translation_NL.json @@ -222,6 +222,13 @@ ], "desc": "Wattage van de gebruikte voeding" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Vermogen", diff --git a/Translations/translation_NL_BE.json b/Translations/translation_NL_BE.json index 20e46163..f835bb55 100644 --- a/Translations/translation_NL_BE.json +++ b/Translations/translation_NL_BE.json @@ -222,6 +222,13 @@ ], "desc": "Vermogen van de adapter" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_NO.json b/Translations/translation_NO.json index 43c390f1..36a0029f 100644 --- a/Translations/translation_NO.json +++ b/Translations/translation_NO.json @@ -222,6 +222,13 @@ ], "desc": "Power Wattage of the power adapter used" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_PL.json b/Translations/translation_PL.json index f5fc3bb8..f079404d 100644 --- a/Translations/translation_PL.json +++ b/Translations/translation_PL.json @@ -223,6 +223,13 @@ ], "desc": "Moc używanego zasilacza w (W)" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Ogr.", diff --git a/Translations/translation_PT.json b/Translations/translation_PT.json index 65729ca6..d494f4ba 100644 --- a/Translations/translation_PT.json +++ b/Translations/translation_PT.json @@ -222,6 +222,13 @@ ], "desc": "Potência da fonte usada (Watt)" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_RU.json b/Translations/translation_RU.json index 55a84446..4493031b 100644 --- a/Translations/translation_RU.json +++ b/Translations/translation_RU.json @@ -223,6 +223,13 @@ ], "desc": "Мощность используемого источника питания" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Предел", diff --git a/Translations/translation_SK.json b/Translations/translation_SK.json index 6e943d2b..fd5fa433 100644 --- a/Translations/translation_SK.json +++ b/Translations/translation_SK.json @@ -222,6 +222,13 @@ ], "desc": "Obmedzenie výkonu podľa použitého zdroja" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Obmedzenie", diff --git a/Translations/translation_SL.json b/Translations/translation_SL.json index beb803bd..30f57661 100644 --- a/Translations/translation_SL.json +++ b/Translations/translation_SL.json @@ -222,6 +222,13 @@ ], "desc": "Moč napajalnega vira v vatih [W]" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Meja", diff --git a/Translations/translation_SR_CYRL.json b/Translations/translation_SR_CYRL.json index 64d76e15..4f15c1bc 100644 --- a/Translations/translation_SR_CYRL.json +++ b/Translations/translation_SR_CYRL.json @@ -222,6 +222,13 @@ ], "desc": "Снага напајања у ватима." }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_SR_LATN.json b/Translations/translation_SR_LATN.json index 97e9a7c3..204c1c48 100644 --- a/Translations/translation_SR_LATN.json +++ b/Translations/translation_SR_LATN.json @@ -222,6 +222,13 @@ ], "desc": "Snaga napajanja u vatima." }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Power", diff --git a/Translations/translation_SV.json b/Translations/translation_SV.json index 65afc2cb..5f4ff096 100644 --- a/Translations/translation_SV.json +++ b/Translations/translation_SV.json @@ -216,6 +216,13 @@ ], "desc": "Maximal QC-spänning enheten skall efterfråga" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Max-", diff --git a/Translations/translation_TR.json b/Translations/translation_TR.json index bd194f5a..3da91e6a 100644 --- a/Translations/translation_TR.json +++ b/Translations/translation_TR.json @@ -232,6 +232,13 @@ ], "desc": "Desired max QC Voltage negotiated for" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerInput": { "text2": [ "Güç", diff --git a/Translations/translation_UK.json b/Translations/translation_UK.json index 5c76f57b..aa613683 100644 --- a/Translations/translation_UK.json +++ b/Translations/translation_UK.json @@ -223,6 +223,13 @@ ], "desc": "Потужність джерела живлення в Ватах" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": [ "Макс.", diff --git a/Translations/translation_YUE_HK.json b/Translations/translation_YUE_HK.json index b6c6454c..51215151 100644 --- a/Translations/translation_YUE_HK.json +++ b/Translations/translation_YUE_HK.json @@ -154,6 +154,13 @@ "text2": "QC電壓", "desc": "使用QC電源時請求嘅最高目標電壓" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": "功率限制", "desc": "限制辣雞可用嘅最大功率 " diff --git a/Translations/translation_ZH_CN.json b/Translations/translation_ZH_CN.json index ca2370fd..1af6fe72 100644 --- a/Translations/translation_ZH_CN.json +++ b/Translations/translation_ZH_CN.json @@ -154,6 +154,13 @@ "text2": "QC电压", "desc": "使用QC电源时请求的最高目标电压" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": "功率限制", "desc": "限制铬铁可用的最大功率 " diff --git a/Translations/translation_ZH_TW.json b/Translations/translation_ZH_TW.json index 46082a59..6cb02207 100644 --- a/Translations/translation_ZH_TW.json +++ b/Translations/translation_ZH_TW.json @@ -154,6 +154,13 @@ "text2": "QC電壓", "desc": "使用QC電源時請求的最高目標電壓" }, + "PDNegTimeout": { + "text2": [ + "PD", + "timeout" + ], + "desc": "PD negotiation timeout in 100ms steps for compatibility with some QC chargers (0: disabled)" + }, "PowerLimit": { "text2": "功率限制", "desc": "限制鉻鐵可用的最大功率 " diff --git a/Translations/translations_def.js b/Translations/translations_def.js index 6d0f206e..7baa271d 100644 --- a/Translations/translations_def.js +++ b/Translations/translations_def.js @@ -280,6 +280,12 @@ var def = "maxLen": 8, "maxLen2": 16 }, + { + "id": "PDNegTimeout", + "maxLen": 8, + "maxLen2": 16 + }, + { "id": "PowerLimit", "maxLen": 5, diff --git a/source/Core/Drivers/FUSB302/policy_engine.cpp b/source/Core/Drivers/FUSB302/policy_engine.cpp index 8d76a63f..8a2a29bd 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.cpp +++ b/source/Core/Drivers/FUSB302/policy_engine.cpp @@ -21,6 +21,8 @@ #include "int_n.h" #include #include +#include "Settings.h" + bool PolicyEngine::pdNegotiationComplete; int PolicyEngine::current_voltage_mv; int PolicyEngine::_requested_voltage; @@ -617,6 +619,18 @@ void PolicyEngine::PPSTimerCallback() { } } +bool PolicyEngine::NegotiationTimeoutReached() { + if (systemSettings.PDNegTimeout == 0){ + return false; + } + + if (xTaskGetTickCount() > (TICKS_SECOND/10 * systemSettings.PDNegTimeout)) { + return true; + } + + return false; +} + EventBits_t PolicyEngine::pushMessage(union pd_msg *msg) { if (PD_MSGTYPE_GET(msg) == PD_MSGTYPE_SOFT_RESET && PD_NUMOBJ_GET(msg) == 0) { /* Clear MessageIDCounter */ diff --git a/source/Core/Drivers/FUSB302/policy_engine.h b/source/Core/Drivers/FUSB302/policy_engine.h index 6ad27716..96bd12a5 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.h +++ b/source/Core/Drivers/FUSB302/policy_engine.h @@ -36,6 +36,8 @@ public: static bool setupCompleteOrTimedOut() { if (pdNegotiationComplete) return true; + if (PolicyEngine::NegotiationTimeoutReached()) + return true; if (state == policy_engine_state::PESinkSourceUnresponsive) return true; if (state == policy_engine_state::PESinkReady) @@ -46,11 +48,17 @@ public: static bool pdHasNegotiated() { if (state == policy_engine_state::PESinkSourceUnresponsive) return false; + if (pdNegotiationComplete) + return true; + if (PolicyEngine::NegotiationTimeoutReached()) + return false; return true; } // Call this periodically, at least once every second static void PPSTimerCallback(); + static bool NegotiationTimeoutReached(); + enum class Notifications { PDB_EVT_PE_RESET = EVENT_MASK(0), PDB_EVT_PE_MSG_RX = EVENT_MASK(1), diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index 45e3bb20..f04c026c 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -27,6 +27,7 @@ typedef struct { uint8_t minDCVoltageCells; // The voltage we cut out at for under voltage when powered by DC jack uint8_t minVoltageCells; // Minimum allowed voltage per cell <3S - 3.0V (30)> <4S - 2.4V (24)> <...> (Minimum recommended 2.7V) uint8_t QCIdealVoltage; // Desired QC3.0 voltage (9,12,20V) + uint8_t PDNegTimeout; // PD timeout in 100ms steps uint8_t OrientationMode : 2; // Selects between Auto,Right and left handed layouts uint8_t sensitivity : 4; // Sensitivity of accelerometer (5 bits) uint8_t animationLoop : 1; // Animation loop switch diff --git a/source/Core/Inc/Translation.h b/source/Core/Inc/Translation.h index 84e88844..5bb54963 100644 --- a/source/Core/Inc/Translation.h +++ b/source/Core/Inc/Translation.h @@ -45,6 +45,7 @@ enum class SettingsItemIndex : uint8_t { AdvancedSoldering, ScrollingSpeed, QCMaxVoltage, + PDNegTimeout, PowerLimit, ReverseButtonTempChange, TempChangeShortStep, diff --git a/source/Core/Src/Settings.cpp b/source/Core/Src/Settings.cpp index 358323f3..db014f90 100644 --- a/source/Core/Src/Settings.cpp +++ b/source/Core/Src/Settings.cpp @@ -57,6 +57,7 @@ void resetSettings() { systemSettings.minDCVoltageCells = CUT_OUT_SETTING; // default to no cut-off voltage systemSettings.minVoltageCells = RECOM_VOL_CELL; // Minimum voltage per cell (Recommended 3.3V (33)) systemSettings.QCIdealVoltage = 0; // Default to 9V for QC3.0 Voltage + systemSettings.PDNegTimeout = 0; // Default for PD timout to 0 systemSettings.version = SETTINGSVERSION; // Store the version number to allow for easier upgrades systemSettings.detailedSoldering = DETAILED_SOLDERING; // Detailed soldering screen systemSettings.detailedIDLE = DETAILED_IDLE; // Detailed idle screen (off for first time users) diff --git a/source/Core/Src/gui.cpp b/source/Core/Src/gui.cpp index 50cf0f03..ac15b83b 100644 --- a/source/Core/Src/gui.cpp +++ b/source/Core/Src/gui.cpp @@ -27,6 +27,9 @@ static bool settings_setQCInputV(void); static bool settings_displayQCInputV(void); #endif +static bool settings_setPDNegTimeout(void); +static bool settings_displayPDNegTimeout(void); + #ifndef NO_SLEEP_MODE static bool settings_setSleepTemp(void); static bool settings_displaySleepTemp(void); @@ -174,6 +177,7 @@ const menuitem powerMenu[] = { #ifdef POW_QC {SETTINGS_DESC(SettingsItemIndex::QCMaxVoltage), settings_setQCInputV, settings_displayQCInputV}, /*Voltage input*/ #endif + {SETTINGS_DESC(SettingsItemIndex::PDNegTimeout), settings_setPDNegTimeout, settings_displayPDNegTimeout}, /*PD timeout setup*/ {0, nullptr, nullptr} // end of menu marker. DO NOT REMOVE }; #endif @@ -350,6 +354,7 @@ static bool settings_displayInputMinVRange(void) { static bool settings_setQCInputV(void) { #ifdef POW_QC_20V systemSettings.QCIdealVoltage = (systemSettings.QCIdealVoltage + 1) % 3; + return systemSettings.QCIdealVoltage == 2; #else systemSettings.QCIdealVoltage = (systemSettings.QCIdealVoltage + 1) % 2; @@ -382,6 +387,19 @@ static bool settings_displayQCInputV(void) { #endif +static bool settings_setPDNegTimeout(void) { + systemSettings.PDNegTimeout = (systemSettings.PDNegTimeout + 1) % 50; + + return systemSettings.QCIdealVoltage == 49; +} + +static bool settings_displayPDNegTimeout(void){ + printShortDescription(SettingsItemIndex::PDNegTimeout, 5); + OLED::printNumber(systemSettings.PDNegTimeout, 2, FontStyle::LARGE); + + return systemSettings.QCIdealVoltage == 49; +} + #ifndef NO_SLEEP_MODE static bool settings_setSleepTemp(void) { // If in C, 10 deg, if in F 20 deg From a75d97360f933d2137b5af09acfd2cf2496e1114 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Mon, 7 Jun 2021 01:09:41 +0200 Subject: [PATCH 02/10] Suggestions mostly corrected --- source/Core/BSP/MHP30/Power.cpp | 2 +- source/Core/BSP/Miniware/Power.cpp | 2 +- source/Core/BSP/Pine64/Power.cpp | 4 ++-- source/Core/Drivers/FUSB302/policy_engine.cpp | 8 ++++---- source/Core/Drivers/FUSB302/policy_engine.h | 10 +++------- source/Core/Inc/Settings.h | 3 ++- source/Core/Src/gui.cpp | 12 ++++++++---- 7 files changed, 21 insertions(+), 20 deletions(-) diff --git a/source/Core/BSP/MHP30/Power.cpp b/source/Core/BSP/MHP30/Power.cpp index 95dd26e3..401b370e 100644 --- a/source/Core/BSP/MHP30/Power.cpp +++ b/source/Core/BSP/MHP30/Power.cpp @@ -16,7 +16,7 @@ void power_check() { if (FUSB302_present) { PolicyEngine::PPSTimerCallback(); // Cant start QC until either PD works or fails - if (PolicyEngine::setupCompleteOrTimedOut() == false) { + if (PolicyEngine::setupCompleteOrTimedOut(systemSettings.PDNegTimeout) == false) { return; } if (PolicyEngine::pdHasNegotiated()) { diff --git a/source/Core/BSP/Miniware/Power.cpp b/source/Core/BSP/Miniware/Power.cpp index 8cbee738..8b7c8eb3 100644 --- a/source/Core/BSP/Miniware/Power.cpp +++ b/source/Core/BSP/Miniware/Power.cpp @@ -16,7 +16,7 @@ void power_check() { if (FUSB302_present) { PolicyEngine::PPSTimerCallback(); // Cant start QC until either PD works or fails - if (PolicyEngine::setupCompleteOrTimedOut() == false) { + if (PolicyEngine::setupCompleteOrTimedOut(systemSettings.PDNegTimeout) == false) { return; } if (PolicyEngine::pdHasNegotiated()) { diff --git a/source/Core/BSP/Pine64/Power.cpp b/source/Core/BSP/Pine64/Power.cpp index 2dfa76a0..42bee942 100644 --- a/source/Core/BSP/Pine64/Power.cpp +++ b/source/Core/BSP/Pine64/Power.cpp @@ -16,7 +16,7 @@ void power_check() { if (FUSB302_present) { PolicyEngine::PPSTimerCallback(); // Cant start QC until either PD works or fails - if (PolicyEngine::setupCompleteOrTimedOut() == false) { + if (PolicyEngine::setupCompleteOrTimedOut(systemSettings.PDNegTimeout) == false) { return; } if (PolicyEngine::pdHasNegotiated()) { @@ -43,7 +43,7 @@ uint8_t usb_pd_detect() { bool getIsPoweredByDCIN() { // We return false until we are sure we are not using PD - if (PolicyEngine::setupCompleteOrTimedOut() == false) { + if (PolicyEngine::setupCompleteOrTimedOut(systemSettings.PDNegTimeout) == false) { return false; } if (PolicyEngine::pdHasNegotiated()) { diff --git a/source/Core/Drivers/FUSB302/policy_engine.cpp b/source/Core/Drivers/FUSB302/policy_engine.cpp index 8a2a29bd..3b135a1a 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.cpp +++ b/source/Core/Drivers/FUSB302/policy_engine.cpp @@ -21,7 +21,6 @@ #include "int_n.h" #include #include -#include "Settings.h" bool PolicyEngine::pdNegotiationComplete; int PolicyEngine::current_voltage_mv; @@ -619,12 +618,13 @@ void PolicyEngine::PPSTimerCallback() { } } -bool PolicyEngine::NegotiationTimeoutReached() { - if (systemSettings.PDNegTimeout == 0){ +bool PolicyEngine::NegotiationTimeoutReached(uint8_t timeout) { + if (timeout == 0){ return false; } - if (xTaskGetTickCount() > (TICKS_SECOND/10 * systemSettings.PDNegTimeout)) { + if (xTaskGetTickCount() > (TICKS_100MS * timeout)) { + state = PESinkSourceUnresponsive; return true; } diff --git a/source/Core/Drivers/FUSB302/policy_engine.h b/source/Core/Drivers/FUSB302/policy_engine.h index 96bd12a5..8cd89611 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.h +++ b/source/Core/Drivers/FUSB302/policy_engine.h @@ -33,10 +33,10 @@ public: static void handleMessage(union pd_msg *msg); // Returns true if headers indicate PD3.0 compliant static bool isPD3_0(); - static bool setupCompleteOrTimedOut() { + static bool setupCompleteOrTimedOut(uint8_t timeout) { if (pdNegotiationComplete) return true; - if (PolicyEngine::NegotiationTimeoutReached()) + if (PolicyEngine::NegotiationTimeoutReached(timeout)) return true; if (state == policy_engine_state::PESinkSourceUnresponsive) return true; @@ -48,16 +48,12 @@ public: static bool pdHasNegotiated() { if (state == policy_engine_state::PESinkSourceUnresponsive) return false; - if (pdNegotiationComplete) - return true; - if (PolicyEngine::NegotiationTimeoutReached()) - return false; return true; } // Call this periodically, at least once every second static void PPSTimerCallback(); - static bool NegotiationTimeoutReached(); + static bool NegotiationTimeoutReached(uint8_t timeout); enum class Notifications { PDB_EVT_PE_RESET = EVENT_MASK(0), diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index f04c026c..642f9f5a 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -27,7 +27,6 @@ typedef struct { uint8_t minDCVoltageCells; // The voltage we cut out at for under voltage when powered by DC jack uint8_t minVoltageCells; // Minimum allowed voltage per cell <3S - 3.0V (30)> <4S - 2.4V (24)> <...> (Minimum recommended 2.7V) uint8_t QCIdealVoltage; // Desired QC3.0 voltage (9,12,20V) - uint8_t PDNegTimeout; // PD timeout in 100ms steps uint8_t OrientationMode : 2; // Selects between Auto,Right and left handed layouts uint8_t sensitivity : 4; // Sensitivity of accelerometer (5 bits) uint8_t animationLoop : 1; // Animation loop switch @@ -62,6 +61,8 @@ typedef struct { uint8_t pdMissingWarningCounter; // Counter of how many times we have warned we cannot detect the pd interface char uiLanguage[8]; // Selected UI Language code, null-terminated *only if* the length is less than 8 chars + uint8_t PDNegTimeout; // PD timeout in 100ms steps + uint32_t padding; // This is here for in case we are not an even divisor so // that nothing gets cut off // MUST BE LAST diff --git a/source/Core/Src/gui.cpp b/source/Core/Src/gui.cpp index ac15b83b..662c2ee5 100644 --- a/source/Core/Src/gui.cpp +++ b/source/Core/Src/gui.cpp @@ -26,10 +26,10 @@ static bool settings_displayInputMinVRange(void); static bool settings_setQCInputV(void); static bool settings_displayQCInputV(void); #endif - +#ifdef POW_PD static bool settings_setPDNegTimeout(void); static bool settings_displayPDNegTimeout(void); - +#endif #ifndef NO_SLEEP_MODE static bool settings_setSleepTemp(void); static bool settings_displaySleepTemp(void); @@ -165,7 +165,7 @@ const menuitem rootSettingsMenu[] { } // end of menu marker. DO NOT REMOVE }; -#if defined(POW_DC) || defined(POW_QC) +#if defined(POW_DC) || defined(POW_QC) || defined(POW_PD) const menuitem powerMenu[] = { /* * Power Source @@ -177,7 +177,9 @@ const menuitem powerMenu[] = { #ifdef POW_QC {SETTINGS_DESC(SettingsItemIndex::QCMaxVoltage), settings_setQCInputV, settings_displayQCInputV}, /*Voltage input*/ #endif - {SETTINGS_DESC(SettingsItemIndex::PDNegTimeout), settings_setPDNegTimeout, settings_displayPDNegTimeout}, /*PD timeout setup*/ +#ifdef POW_PD + {SETTINGS_DESC(SettingsItemIndex::PDNegTimeout), settings_setPDNegTimeout, settings_displayPDNegTimeout}, /*PD timeout setup*/ +#endif {0, nullptr, nullptr} // end of menu marker. DO NOT REMOVE }; #endif @@ -387,6 +389,7 @@ static bool settings_displayQCInputV(void) { #endif +#ifdef POW_PD static bool settings_setPDNegTimeout(void) { systemSettings.PDNegTimeout = (systemSettings.PDNegTimeout + 1) % 50; @@ -399,6 +402,7 @@ static bool settings_displayPDNegTimeout(void){ return systemSettings.QCIdealVoltage == 49; } +#endif #ifndef NO_SLEEP_MODE static bool settings_setSleepTemp(void) { From 71223367d6bf351266fbab77800c5ba608680ec7 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Mon, 7 Jun 2021 06:58:24 +0200 Subject: [PATCH 03/10] Fixed typo --- source/Core/Src/gui.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/source/Core/Src/gui.cpp b/source/Core/Src/gui.cpp index 662c2ee5..20e83a39 100644 --- a/source/Core/Src/gui.cpp +++ b/source/Core/Src/gui.cpp @@ -393,14 +393,14 @@ static bool settings_displayQCInputV(void) { static bool settings_setPDNegTimeout(void) { systemSettings.PDNegTimeout = (systemSettings.PDNegTimeout + 1) % 50; - return systemSettings.QCIdealVoltage == 49; + return systemSettings.PDNegTimeout == 49; } static bool settings_displayPDNegTimeout(void){ printShortDescription(SettingsItemIndex::PDNegTimeout, 5); OLED::printNumber(systemSettings.PDNegTimeout, 2, FontStyle::LARGE); - return systemSettings.QCIdealVoltage == 49; + return systemSettings.PDNegTimeout == 49; } #endif From 54a28b47fed8ff8255becbe561a19609e8cfad58 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Mon, 7 Jun 2021 13:54:11 +0200 Subject: [PATCH 04/10] Cosmetic fixes --- source/Core/Src/gui.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/source/Core/Src/gui.cpp b/source/Core/Src/gui.cpp index 20e83a39..9e9a518f 100644 --- a/source/Core/Src/gui.cpp +++ b/source/Core/Src/gui.cpp @@ -178,7 +178,7 @@ const menuitem powerMenu[] = { {SETTINGS_DESC(SettingsItemIndex::QCMaxVoltage), settings_setQCInputV, settings_displayQCInputV}, /*Voltage input*/ #endif #ifdef POW_PD - {SETTINGS_DESC(SettingsItemIndex::PDNegTimeout), settings_setPDNegTimeout, settings_displayPDNegTimeout}, /*PD timeout setup*/ + {SETTINGS_DESC(SettingsItemIndex::PDNegTimeout), settings_setPDNegTimeout, settings_displayPDNegTimeout}, /*PD timeout setup*/ #endif {0, nullptr, nullptr} // end of menu marker. DO NOT REMOVE }; @@ -396,7 +396,7 @@ static bool settings_setPDNegTimeout(void) { return systemSettings.PDNegTimeout == 49; } -static bool settings_displayPDNegTimeout(void){ +static bool settings_displayPDNegTimeout(void) { printShortDescription(SettingsItemIndex::PDNegTimeout, 5); OLED::printNumber(systemSettings.PDNegTimeout, 2, FontStyle::LARGE); From b3f987d34a6b71f8c4ab04550e585ba6389e1d15 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Mon, 7 Jun 2021 14:55:30 +0200 Subject: [PATCH 05/10] Cosmetic fixes2 --- source/Core/Drivers/FUSB302/policy_engine.cpp | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/source/Core/Drivers/FUSB302/policy_engine.cpp b/source/Core/Drivers/FUSB302/policy_engine.cpp index 3b135a1a..d752b9d0 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.cpp +++ b/source/Core/Drivers/FUSB302/policy_engine.cpp @@ -619,16 +619,16 @@ void PolicyEngine::PPSTimerCallback() { } bool PolicyEngine::NegotiationTimeoutReached(uint8_t timeout) { - if (timeout == 0){ - return false; - } - - if (xTaskGetTickCount() > (TICKS_100MS * timeout)) { - state = PESinkSourceUnresponsive; - return true; - } - + if (timeout == 0){ return false; + } + + if (xTaskGetTickCount() > (TICKS_100MS * timeout)) { + state = PESinkSourceUnresponsive; + return true; + } + + return false; } EventBits_t PolicyEngine::pushMessage(union pd_msg *msg) { From a7ec2748bb47e658c9292d3c97786e5605cf9e8b Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Mon, 7 Jun 2021 16:14:55 +0200 Subject: [PATCH 06/10] Cosmetic fixes3 --- source/Core/Drivers/FUSB302/policy_engine.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/source/Core/Drivers/FUSB302/policy_engine.cpp b/source/Core/Drivers/FUSB302/policy_engine.cpp index d752b9d0..989913cc 100644 --- a/source/Core/Drivers/FUSB302/policy_engine.cpp +++ b/source/Core/Drivers/FUSB302/policy_engine.cpp @@ -619,7 +619,7 @@ void PolicyEngine::PPSTimerCallback() { } bool PolicyEngine::NegotiationTimeoutReached(uint8_t timeout) { - if (timeout == 0){ + if (timeout == 0) { return false; } From 8bfbff360a895189b31f4c3f9170250203e54b60 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Tue, 8 Jun 2021 01:02:18 +0200 Subject: [PATCH 07/10] Cosmetic fix of a comment --- source/Core/Inc/Settings.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index 642f9f5a..5db9c98c 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -61,7 +61,7 @@ typedef struct { uint8_t pdMissingWarningCounter; // Counter of how many times we have warned we cannot detect the pd interface char uiLanguage[8]; // Selected UI Language code, null-terminated *only if* the length is less than 8 chars - uint8_t PDNegTimeout; // PD timeout in 100ms steps + uint8_t PDNegTimeout; // PD timeout in 100ms steps uint32_t padding; // This is here for in case we are not an even divisor so // that nothing gets cut off From 3e502f462d6cdc312078e25bd111980ea5bae05c Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Tue, 8 Jun 2021 22:49:48 +0200 Subject: [PATCH 08/10] Test --- .../Inc/Legacy/stm32_hal_legacy.h | 258 ++++++++++-------- .../Inc/stm32f1xx_hal_dma_ex.h | 216 +++++++++------ .../Inc/stm32f1xx_hal_gpio_ex.h | 12 +- .../Inc/stm32f1xx_hal_i2c.h | 7 +- .../Inc/stm32f1xx_hal_tim.h | 147 +++++----- .../Inc/Legacy/stm32_hal_legacy.h | 258 ++++++++++-------- .../Inc/stm32f1xx_hal_dma_ex.h | 216 +++++++++------ .../Inc/stm32f1xx_hal_i2c.h | 7 +- .../Inc/stm32f1xx_hal_tim.h | 147 +++++----- source/Core/Inc/Settings.h | 2 +- 10 files changed, 695 insertions(+), 575 deletions(-) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 0f0f3960..18329db8 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -1897,22 +1897,18 @@ extern "C" { #define COMP_LOCK __HAL_COMP_LOCK #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ @@ -1923,112 +1919,134 @@ extern "C" { (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : __HAL_COMP_COMP6_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() \ - : __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() \ - : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : __HAL_COMP_COMP7_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F373xC) || defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h index aba2ad04..c05897c2 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h @@ -53,76 +53,112 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TC7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 \ - : DMA_FLAG_TC5) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_TC6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_TC7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 : DMA_FLAG_TC5) /** * @brief Returns the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_HT7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 \ - : DMA_FLAG_HT5) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_HT6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_HT7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 : DMA_FLAG_HT5) /** * @brief Returns the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TE7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 \ - : DMA_FLAG_TE5) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_TE6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_TE7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 : DMA_FLAG_TE5) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_GL7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 \ - : DMA_FLAG_GL5) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_GL6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_GL7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 : DMA_FLAG_GL5) /** * @brief Get the DMA Channel pending flags. @@ -164,56 +200,68 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ - : DMA_FLAG_TC7) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 : DMA_FLAG_TC7) /** * @brief Return the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ - : DMA_FLAG_HT7) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 : DMA_FLAG_HT7) /** * @brief Return the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ - : DMA_FLAG_TE7) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 : DMA_FLAG_TE7) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ - : DMA_FLAG_GL7) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 : DMA_FLAG_GL7) /** * @brief Get the DMA Channel pending flags. diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h index 152705ba..387ea593 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h @@ -799,14 +799,10 @@ extern "C" { #elif defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F103xB) || defined(STM32F105xC) || defined(STM32F107xC) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA)) ? 0uL : ((__GPIOx__) == (GPIOB)) ? 1uL : ((__GPIOx__) == (GPIOC)) ? 2uL : ((__GPIOx__) == (GPIOD)) ? 3uL : 4uL) #elif defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) -#define GPIO_GET_INDEX(__GPIOx__) \ - (((__GPIOx__) == (GPIOA)) ? 0uL \ - : ((__GPIOx__) == (GPIOB)) ? 1uL \ - : ((__GPIOx__) == (GPIOC)) ? 2uL \ - : ((__GPIOx__) == (GPIOD)) ? 3uL \ - : ((__GPIOx__) == (GPIOE)) ? 4uL \ - : ((__GPIOx__) == (GPIOF)) ? 5uL \ - : 6uL) +#define GPIO_GET_INDEX(__GPIOx__) \ + (((__GPIOx__) == (GPIOA)) \ + ? 0uL \ + : ((__GPIOx__) == (GPIOB)) ? 1uL : ((__GPIOx__) == (GPIOC)) ? 2uL : ((__GPIOx__) == (GPIOD)) ? 3uL : ((__GPIOx__) == (GPIOE)) ? 4uL : ((__GPIOx__) == (GPIOF)) ? 5uL : 6uL) #endif #define AFIO_REMAP_ENABLE(REMAP_PIN) \ diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h index 4acd1634..576cf8e9 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h @@ -659,10 +659,9 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U) ? 4U : I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) \ (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2) ? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) -#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ - (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) +#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ + (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0))) #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h index e0106e42..129d0287 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h @@ -1374,11 +1374,11 @@ mode. * @arg TIM_ICPSC_DIV4: capture is done once every 4 events * @arg TIM_ICPSC_DIV8: capture is done once every 8 events */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) \ - : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) +#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) /** * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. @@ -1392,11 +1392,11 @@ mode. * @param __COMPARE__ specifies the Capture Compare register new value. * @retval None */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) \ - : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) +#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) /** * @brief Get the TIM Capture Compare Register value on runtime. @@ -1409,11 +1409,10 @@ mode. * @arg TIM_CHANNEL_4: get capture/compare 4 register value * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) \ - : ((__HANDLE__)->Instance->CCR4)) +#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCR1) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) : ((__HANDLE__)->Instance->CCR4)) /** * @brief Set the TIM Output compare preload. @@ -1426,11 +1425,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) \ - : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) +#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) /** * @brief Reset the TIM Output compare preload. @@ -1443,11 +1442,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) +#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) /** * @brief Enable fast mode for a given channel. @@ -1464,11 +1463,11 @@ mode. * @note Fast mode acts only if the channel is configured in PWM1 or PWM2 mode. * @retval None */ -#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) \ - : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) +#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) /** * @brief Disable fast mode for a given channel. @@ -1485,11 +1484,11 @@ mode. * trigger input is 5 clock cycles. * @retval None */ -#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) +#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) /** * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. @@ -1692,41 +1691,40 @@ mode. #define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__) ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER) -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) \ - : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) +#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) +#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) \ - : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) +#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) \ - : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) +#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) -#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] \ - : (__HANDLE__)->ChannelState[3]) +#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? (__HANDLE__)->ChannelState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] : (__HANDLE__)->ChannelState[3]) -#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) \ - : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ @@ -1736,17 +1734,16 @@ mode. (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ } while (0) -#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] \ - : (__HANDLE__)->ChannelNState[3]) +#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? (__HANDLE__)->ChannelNState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] : (__HANDLE__)->ChannelNState[3]) -#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) \ - : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 0bede785..2cb4c15a 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -1422,22 +1422,18 @@ extern "C" { #define COMP_LOCK __HAL_COMP_LOCK #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ @@ -1448,112 +1444,134 @@ extern "C" { (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : __HAL_COMP_COMP6_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() \ - : __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() \ - : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : __HAL_COMP_COMP7_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ + ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ + ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ + ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ + ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F373xC) || defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h index adacc86b..226a8afe 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h @@ -69,76 +69,112 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TC7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 \ - : DMA_FLAG_TC5) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_TC6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_TC7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 : DMA_FLAG_TC5) /** * @brief Returns the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_HT7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 \ - : DMA_FLAG_HT5) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_HT6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_HT7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 : DMA_FLAG_HT5) /** * @brief Returns the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TE7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 \ - : DMA_FLAG_TE5) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_TE6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_TE7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 : DMA_FLAG_TE5) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_GL7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 \ - : DMA_FLAG_GL5) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ + ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ + ? DMA_FLAG_GL6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ + ? DMA_FLAG_GL7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 : DMA_FLAG_GL5) /** * @brief Get the DMA Channel pending flags. @@ -180,56 +216,68 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ - : DMA_FLAG_TC7) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 : DMA_FLAG_TC7) /** * @brief Return the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ - : DMA_FLAG_HT7) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 : DMA_FLAG_HT7) /** * @brief Return the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ - : DMA_FLAG_TE7) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 : DMA_FLAG_TE7) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ - : DMA_FLAG_GL7) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ + ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ + ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ + ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ + ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 : DMA_FLAG_GL7) /** * @brief Get the DMA Channel pending flags. diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h index aea803b3..ebebdba2 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h @@ -577,10 +577,9 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U) ? 4U : I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) \ (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2) ? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) -#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ - (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) +#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ + (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h index d472bfb9..f0780c9a 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h @@ -1376,11 +1376,11 @@ mode. * @arg TIM_ICPSC_DIV4: capture is done once every 4 events * @arg TIM_ICPSC_DIV8: capture is done once every 8 events */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) \ - : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) +#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) /** * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. @@ -1394,11 +1394,11 @@ mode. * @param __COMPARE__ specifies the Capture Compare register new value. * @retval None */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) \ - : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) +#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) /** * @brief Get the TIM Capture Compare Register value on runtime. @@ -1411,11 +1411,10 @@ mode. * @arg TIM_CHANNEL_4: get capture/compare 4 register value * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) \ - : ((__HANDLE__)->Instance->CCR4)) +#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCR1) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) : ((__HANDLE__)->Instance->CCR4)) /** * @brief Set the TIM Output compare preload. @@ -1428,11 +1427,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) \ - : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) +#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) /** * @brief Reset the TIM Output compare preload. @@ -1445,11 +1444,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) +#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) /** * @brief Enable fast mode for a given channel. @@ -1466,11 +1465,11 @@ mode. * @note Fast mode acts only if the channel is configured in PWM1 or PWM2 mode. * @retval None */ -#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) \ - : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) +#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) /** * @brief Disable fast mode for a given channel. @@ -1487,11 +1486,11 @@ mode. * trigger input is 5 clock cycles. * @retval None */ -#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) +#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) /** * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. @@ -1694,41 +1693,40 @@ mode. #define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__) ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER) -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) \ - : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) +#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) \ - : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) +#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) \ - : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) +#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) \ - : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) +#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) -#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] \ - : (__HANDLE__)->ChannelState[3]) +#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? (__HANDLE__)->ChannelState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] : (__HANDLE__)->ChannelState[3]) -#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) \ - : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ @@ -1738,17 +1736,16 @@ mode. (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ } while (0) -#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] \ - : (__HANDLE__)->ChannelNState[3]) +#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? (__HANDLE__)->ChannelNState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] : (__HANDLE__)->ChannelNState[3]) -#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) \ - : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) \ + ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index 5db9c98c..7dc94474 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -61,7 +61,7 @@ typedef struct { uint8_t pdMissingWarningCounter; // Counter of how many times we have warned we cannot detect the pd interface char uiLanguage[8]; // Selected UI Language code, null-terminated *only if* the length is less than 8 chars - uint8_t PDNegTimeout; // PD timeout in 100ms steps + uint8_t PDNegTimeout; // PD timeout in 100ms steps uint32_t padding; // This is here for in case we are not an even divisor so // that nothing gets cut off From 2755bb15b28041bc2bf0cd4ba939858c4a393689 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Tue, 8 Jun 2021 22:57:09 +0200 Subject: [PATCH 09/10] Revert "Test" This reverts commit 3e502f462d6cdc312078e25bd111980ea5bae05c. --- .../Inc/Legacy/stm32_hal_legacy.h | 258 ++++++++---------- .../Inc/stm32f1xx_hal_dma_ex.h | 216 ++++++--------- .../Inc/stm32f1xx_hal_gpio_ex.h | 12 +- .../Inc/stm32f1xx_hal_i2c.h | 7 +- .../Inc/stm32f1xx_hal_tim.h | 147 +++++----- .../Inc/Legacy/stm32_hal_legacy.h | 258 ++++++++---------- .../Inc/stm32f1xx_hal_dma_ex.h | 216 ++++++--------- .../Inc/stm32f1xx_hal_i2c.h | 7 +- .../Inc/stm32f1xx_hal_tim.h | 147 +++++----- source/Core/Inc/Settings.h | 2 +- 10 files changed, 575 insertions(+), 695 deletions(-) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 18329db8..0f0f3960 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -1897,18 +1897,22 @@ extern "C" { #define COMP_LOCK __HAL_COMP_LOCK #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ @@ -1919,134 +1923,112 @@ extern "C" { (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : __HAL_COMP_COMP6_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() \ + : __HAL_COMP_COMP7_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() \ + : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F373xC) || defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h index c05897c2..aba2ad04 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h @@ -53,112 +53,76 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_TC6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_TC7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 : DMA_FLAG_TC5) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TC7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 \ + : DMA_FLAG_TC5) /** * @brief Returns the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_HT6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_HT7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 : DMA_FLAG_HT5) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_HT7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 \ + : DMA_FLAG_HT5) /** * @brief Returns the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_TE6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_TE7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 : DMA_FLAG_TE5) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TE7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 \ + : DMA_FLAG_TE5) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_GL6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_GL7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 : DMA_FLAG_GL5) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_GL7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 \ + : DMA_FLAG_GL5) /** * @brief Get the DMA Channel pending flags. @@ -200,68 +164,56 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 : DMA_FLAG_TC7) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ + : DMA_FLAG_TC7) /** * @brief Return the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 : DMA_FLAG_HT7) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ + : DMA_FLAG_HT7) /** * @brief Return the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 : DMA_FLAG_TE7) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ + : DMA_FLAG_TE7) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 : DMA_FLAG_GL7) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ + : DMA_FLAG_GL7) /** * @brief Get the DMA Channel pending flags. diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h index 387ea593..152705ba 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h @@ -799,10 +799,14 @@ extern "C" { #elif defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F103xB) || defined(STM32F105xC) || defined(STM32F107xC) #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA)) ? 0uL : ((__GPIOx__) == (GPIOB)) ? 1uL : ((__GPIOx__) == (GPIOC)) ? 2uL : ((__GPIOx__) == (GPIOD)) ? 3uL : 4uL) #elif defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) -#define GPIO_GET_INDEX(__GPIOx__) \ - (((__GPIOx__) == (GPIOA)) \ - ? 0uL \ - : ((__GPIOx__) == (GPIOB)) ? 1uL : ((__GPIOx__) == (GPIOC)) ? 2uL : ((__GPIOx__) == (GPIOD)) ? 3uL : ((__GPIOx__) == (GPIOE)) ? 4uL : ((__GPIOx__) == (GPIOF)) ? 5uL : 6uL) +#define GPIO_GET_INDEX(__GPIOx__) \ + (((__GPIOx__) == (GPIOA)) ? 0uL \ + : ((__GPIOx__) == (GPIOB)) ? 1uL \ + : ((__GPIOx__) == (GPIOC)) ? 2uL \ + : ((__GPIOx__) == (GPIOD)) ? 3uL \ + : ((__GPIOx__) == (GPIOE)) ? 4uL \ + : ((__GPIOx__) == (GPIOF)) ? 5uL \ + : 6uL) #endif #define AFIO_REMAP_ENABLE(REMAP_PIN) \ diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h index 576cf8e9..4acd1634 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h @@ -659,9 +659,10 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U) ? 4U : I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) \ (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2) ? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) -#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ - (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) +#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ + (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0))) #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) diff --git a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h index 129d0287..e0106e42 100644 --- a/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h +++ b/source/Core/BSP/MHP30/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h @@ -1374,11 +1374,11 @@ mode. * @arg TIM_ICPSC_DIV4: capture is done once every 4 events * @arg TIM_ICPSC_DIV8: capture is done once every 8 events */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) +#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) \ + : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) /** * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. @@ -1392,11 +1392,11 @@ mode. * @param __COMPARE__ specifies the Capture Compare register new value. * @retval None */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) +#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) \ + : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) /** * @brief Get the TIM Capture Compare Register value on runtime. @@ -1409,10 +1409,11 @@ mode. * @arg TIM_CHANNEL_4: get capture/compare 4 register value * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCR1) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) : ((__HANDLE__)->Instance->CCR4)) +#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) \ + : ((__HANDLE__)->Instance->CCR4)) /** * @brief Set the TIM Output compare preload. @@ -1425,11 +1426,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) +#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) \ + : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) /** * @brief Reset the TIM Output compare preload. @@ -1442,11 +1443,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) +#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) /** * @brief Enable fast mode for a given channel. @@ -1463,11 +1464,11 @@ mode. * @note Fast mode acts only if the channel is configured in PWM1 or PWM2 mode. * @retval None */ -#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) +#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) \ + : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) /** * @brief Disable fast mode for a given channel. @@ -1484,11 +1485,11 @@ mode. * trigger input is 5 clock cycles. * @retval None */ -#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) +#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) /** * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. @@ -1691,40 +1692,41 @@ mode. #define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__) ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER) -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) +#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) \ + : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) +#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) +#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) \ + : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) +#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) \ + : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) -#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? (__HANDLE__)->ChannelState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] : (__HANDLE__)->ChannelState[3]) +#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] \ + : (__HANDLE__)->ChannelState[3]) -#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) \ + : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ @@ -1734,16 +1736,17 @@ mode. (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ } while (0) -#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? (__HANDLE__)->ChannelNState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] : (__HANDLE__)->ChannelNState[3]) +#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] \ + : (__HANDLE__)->ChannelNState[3]) -#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) \ + : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 2cb4c15a..0bede785 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -1422,18 +1422,22 @@ extern "C" { #define COMP_LOCK __HAL_COMP_LOCK #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ @@ -1444,134 +1448,112 @@ extern "C" { (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F302xE) || defined(STM32F302xC) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : __HAL_COMP_COMP6_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : __HAL_COMP_COMP6_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : __HAL_COMP_COMP6_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : __HAL_COMP_COMP6_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) -#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ - : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) -#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) -#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ - (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ - : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) -#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : __HAL_COMP_COMP7_EXTI_GET_FLAG()) -#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ - (((__FLAG__) == COMP_EXTI_LINE_COMP1) \ - ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP2) \ - ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP3) \ - ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP4) \ - ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ - : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) +#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) +#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() \ + : __HAL_COMP_COMP7_EXTI_ENABLE_IT()) +#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) \ + (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() \ + : ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() \ + : __HAL_COMP_COMP7_EXTI_DISABLE_IT()) +#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() \ + : __HAL_COMP_COMP7_EXTI_GET_FLAG()) +#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) \ + (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() \ + : ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() \ + : __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) #endif #if defined(STM32F373xC) || defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h index 226a8afe..adacc86b 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h @@ -69,112 +69,76 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_TC6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_TC7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 : DMA_FLAG_TC5) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TC7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TC4 \ + : DMA_FLAG_TC5) /** * @brief Returns the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_HT6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_HT7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 : DMA_FLAG_HT5) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_HT7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_HT4 \ + : DMA_FLAG_HT5) /** * @brief Returns the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_TE6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_TE7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 : DMA_FLAG_TE5) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_TE7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_TE4 \ + : DMA_FLAG_TE5) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) \ - ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) \ - ? DMA_FLAG_GL6 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) \ - ? DMA_FLAG_GL7 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 : DMA_FLAG_GL5) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7)) ? DMA_FLAG_GL7 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4)) ? DMA_FLAG_GL4 \ + : DMA_FLAG_GL5) /** * @brief Get the DMA Channel pending flags. @@ -216,68 +180,56 @@ extern "C" { * @param __HANDLE__: DMA handle * @retval The specified transfer complete flag index. */ -#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TC1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TC2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TC3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TC4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 : DMA_FLAG_TC7) +#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TC1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TC2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TC3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TC4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TC5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TC6 \ + : DMA_FLAG_TC7) /** * @brief Return the current DMA Channel half transfer complete flag. * @param __HANDLE__: DMA handle * @retval The specified half transfer complete flag index. */ -#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_HT1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_HT2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_HT3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_HT4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 : DMA_FLAG_HT7) +#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_HT1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_HT2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_HT3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_HT4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_HT5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_HT6 \ + : DMA_FLAG_HT7) /** * @brief Return the current DMA Channel transfer error flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_TE1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_TE2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_TE3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_TE4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 : DMA_FLAG_TE7) +#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_TE1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_TE2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_TE3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_TE4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_TE5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_TE6 \ + : DMA_FLAG_TE7) /** * @brief Return the current DMA Channel Global interrupt flag. * @param __HANDLE__: DMA handle * @retval The specified transfer error flag index. */ -#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ - (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) \ - ? DMA_FLAG_GL1 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) \ - ? DMA_FLAG_GL2 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) \ - ? DMA_FLAG_GL3 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) \ - ? DMA_FLAG_GL4 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ - : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 : DMA_FLAG_GL7) +#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__) \ + (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1)) ? DMA_FLAG_GL1 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2)) ? DMA_FLAG_GL2 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3)) ? DMA_FLAG_GL3 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4)) ? DMA_FLAG_GL4 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5)) ? DMA_FLAG_GL5 \ + : ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6)) ? DMA_FLAG_GL6 \ + : DMA_FLAG_GL7) /** * @brief Get the DMA Channel pending flags. diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h index ebebdba2..aea803b3 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h @@ -577,9 +577,10 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U) ? 4U : I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) \ (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2) ? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) -#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ - (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ - : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) +#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) \ + (((__SPEED__) <= 100000U) ? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U) ? 1U \ + : ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0))) #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h index f0780c9a..d472bfb9 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h @@ -1376,11 +1376,11 @@ mode. * @arg TIM_ICPSC_DIV4: capture is done once every 4 events * @arg TIM_ICPSC_DIV8: capture is done once every 8 events */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) +#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8U) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) \ + : (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8U) /** * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. @@ -1394,11 +1394,11 @@ mode. * @param __COMPARE__ specifies the Capture Compare register new value. * @retval None */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) +#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) \ + : ((__HANDLE__)->Instance->CCR4 = (__COMPARE__))) /** * @brief Get the TIM Capture Compare Register value on runtime. @@ -1411,10 +1411,11 @@ mode. * @arg TIM_CHANNEL_4: get capture/compare 4 register value * @retval 16-bit or 32-bit value of the capture/compare register (TIMx_CCRy) */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCR1) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) : ((__HANDLE__)->Instance->CCR4)) +#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) \ + : ((__HANDLE__)->Instance->CCR4)) /** * @brief Set the TIM Output compare preload. @@ -1427,11 +1428,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) +#define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) \ + : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE)) /** * @brief Reset the TIM Output compare preload. @@ -1444,11 +1445,11 @@ mode. * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval None */ -#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) +#define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2PE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3PE) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4PE)) /** * @brief Enable fast mode for a given channel. @@ -1465,11 +1466,11 @@ mode. * @note Fast mode acts only if the channel is configured in PWM1 or PWM2 mode. * @retval None */ -#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) +#define __HAL_TIM_ENABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3FE) \ + : ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4FE)) /** * @brief Disable fast mode for a given channel. @@ -1486,11 +1487,11 @@ mode. * trigger input is 5 clock cycles. * @retval None */ -#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) +#define __HAL_TIM_DISABLE_OCxFAST(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE)) /** * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. @@ -1693,40 +1694,41 @@ mode. #define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__) ((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER) -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) +#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) \ + : ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U))) -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) +#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) \ + : ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC)) -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) +#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) \ + : ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U)))) -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) +#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P)) \ + : ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P))) -#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? (__HANDLE__)->ChannelState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] : (__HANDLE__)->ChannelState[3]) +#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] \ + : (__HANDLE__)->ChannelState[3]) -#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) \ + : ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ @@ -1736,16 +1738,17 @@ mode. (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ } while (0) -#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? (__HANDLE__)->ChannelNState[0] \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] : (__HANDLE__)->ChannelNState[3]) +#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] \ + : (__HANDLE__)->ChannelNState[3]) -#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) \ - ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ - : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) +#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__) \ + (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) \ + : ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) \ + : ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) \ do { \ diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index 7dc94474..5db9c98c 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -61,7 +61,7 @@ typedef struct { uint8_t pdMissingWarningCounter; // Counter of how many times we have warned we cannot detect the pd interface char uiLanguage[8]; // Selected UI Language code, null-terminated *only if* the length is less than 8 chars - uint8_t PDNegTimeout; // PD timeout in 100ms steps + uint8_t PDNegTimeout; // PD timeout in 100ms steps uint32_t padding; // This is here for in case we are not an even divisor so // that nothing gets cut off From 93f8adbd4c6ad6aae0c5daf369650078cfdf5c86 Mon Sep 17 00:00:00 2001 From: Varga Zsolt Date: Tue, 8 Jun 2021 23:00:13 +0200 Subject: [PATCH 10/10] Redoing last modification --- source/Core/Inc/Settings.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/source/Core/Inc/Settings.h b/source/Core/Inc/Settings.h index 5db9c98c..7dc94474 100644 --- a/source/Core/Inc/Settings.h +++ b/source/Core/Inc/Settings.h @@ -61,7 +61,7 @@ typedef struct { uint8_t pdMissingWarningCounter; // Counter of how many times we have warned we cannot detect the pd interface char uiLanguage[8]; // Selected UI Language code, null-terminated *only if* the length is less than 8 chars - uint8_t PDNegTimeout; // PD timeout in 100ms steps + uint8_t PDNegTimeout; // PD timeout in 100ms steps uint32_t padding; // This is here for in case we are not an even divisor so // that nothing gets cut off