Fixes for I2C on Pinecil + USB-PD stack (#1099)
* Remove unused includes * Adding in submodule * Move fusb functions to the BSP * Remove old code * Creating IronOS PD integration wrapper * Redirect to wrapper * pd lib updates * fix Docker build * Finish linking across * Cleanup * Update Makefile * Update push.yml * Update push.yml * PD -> Compensate for different tick rates * Update codeql-analysis.yml * Fix PD #define for @Firebie * Check irq low at start * Update BSP.h * Update main.cpp * Closer delay * Update OLED.cpp * Bugfix trying to start QC too early * Missing fusb shouldnt hang qc * Update FreeRTOSConfig.h * Update the GD drivers * Update Pinecil IRQ setup * Redirect printf() to uart * Update Power.cpp * Adding extras to PD state * Update USBPD.cpp * Delay in printf * Iterate once before delay on start * Update usb-pd * master usb-pd now * Format gd libs * Update gd32vf103_bkp.c * Guard with PD timeout * Remove CodeQL * Slow for testing, fix runt pulses at start * Fix runt pulse in read size 1 * Cleaner probing setup * Testing delay during stop gen in read 1 * Update I2C driver * Update gd32vf103_i2c.c * Cleaning up i2c wrapper a little, given up on dma for rx * Update preRTOS.cpp * Update Setup.cpp * Update MOVThread.cpp * Slow down UART to work with new clock config * Better ack setup for 2 byte read * Cleanup POW_PD so cant be lost in #includes * tipResistance -> TIP_RESISTANCE * handle NOP race on len==2 * Update configuration.h * Dont use neg timeout to mask anymore * Not required for MHP * Fix up source display Miniware * Fix race on PD init * Update POWThread.cpp * Update formatting * MHP format * Update push.yml * Faster TS80P I2C * Bugfix for IRQ handlers * Correctly handle I2C race on PD access * Fix CI error (unused var) and MHP IRQ * Test Pinecil alt ADC mode
This commit is contained in:
Ben V. Brown
GitHub
@@ -8,6 +8,7 @@
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#include "IRQ.h"
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#include "Setup.h"
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#include <I2C_Wrapper.hpp>
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SemaphoreHandle_t FRToSI2C::I2CSemaphore = nullptr;
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StaticSemaphore_t FRToSI2C::xSemaphoreBuffer;
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#define I2C_TIME_OUT (uint16_t)(12000)
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@@ -23,7 +24,7 @@ uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
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return temp;
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}
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enum i2c_step {
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enum class i2c_step {
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// Write+read steps
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Write_start, // Sending start on bus
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Write_device_address, // start sent, send device address
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@@ -51,32 +52,20 @@ struct i2c_state {
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uint16_t numberOfBytes;
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dma_parameter_struct dma_init_struct;
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};
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volatile i2c_state currentState;
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i2c_state currentState;
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void perform_i2c_step() {
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// Performs next step of the i2c state machine
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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// Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
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i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_PECERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_PECERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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currentState.currentStep = i2c_step::Error_occured;
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}
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switch (currentState.currentStep) {
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case Error_occured:
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case i2c_step::Error_occured:
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i2c_stop_on_bus(I2C0);
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break;
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case Write_start:
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case i2c_step::Write_start:
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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@@ -84,133 +73,177 @@ void perform_i2c_step() {
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if (!i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)) {
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/* send the start signal */
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Write_device_address;
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currentState.currentStep = i2c_step::Write_device_address;
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}
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break;
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case Write_device_address:
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case i2c_step::Write_device_address:
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/* i2c master sends START signal successfully */
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND); // Clear sbsend by reading ctrl banks
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_TRANSMITTER);
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currentState.currentStep = Write_device_memory_address;
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currentState.currentStep = i2c_step::Write_device_memory_address;
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}
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break;
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case Write_device_memory_address:
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case i2c_step::Write_device_memory_address:
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// Send the device memory location
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { // addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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// Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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} else if (currentState.wakePart) {
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if (currentState.wakePart) {
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// We are stopping here
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currentState.currentStep = Send_stop;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_TBE)) {
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// Write out the 8 byte address
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i2c_data_transmit(I2C0, currentState.memoryAddress);
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if (currentState.isMemoryWrite) {
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currentState.currentStep = Write_device_data_start;
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} else {
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currentState.currentStep = Read_start;
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}
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currentState.currentStep = i2c_step::Send_stop;
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return;
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}
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i2c_flag_clear(I2C0, I2C_FLAG_BTC);
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// Write out the 8 byte address
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i2c_data_transmit(I2C0, currentState.memoryAddress);
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if (currentState.isMemoryWrite) {
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currentState.currentStep = i2c_step::Write_device_data_start;
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} else {
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currentState.currentStep = i2c_step::Read_start;
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}
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}
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break;
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case Write_device_data_start:
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/* wait until BTC bit is set */
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case i2c_step::Write_device_data_start:
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/* wait until the transmission data register is empty */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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dma_deinit(DMA0, DMA_CH5);
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dma_init(DMA0, DMA_CH5, ¤tState.dma_init_struct);
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i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
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dma_circulation_disable(DMA0, DMA_CH5);
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/* enable I2C0 DMA */
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i2c_dma_enable(I2C0, I2C_DMA_ON);
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/* enable DMA0 channel5 */
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dma_channel_enable(DMA0, DMA_CH5);
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currentState.currentStep = Write_device_data_finish;
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currentState.currentStep = i2c_step::Write_device_data_finish;
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}
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break;
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case Write_device_data_finish: // Wait for complete then goto stop
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case i2c_step::Write_device_data_finish: // Wait for complete then goto stop
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/* wait until BTC bit is set */
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if (dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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currentState.currentStep = Send_stop;
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currentState.currentStep = i2c_step::Send_stop;
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}
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}
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break;
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case Read_start:
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/* wait until BTC bit is set */
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case i2c_step::Read_start:
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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/* wait until BTC bit is set */
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Read_device_address;
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currentState.currentStep = i2c_step::Read_device_address;
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}
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break;
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case Read_device_address:
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case i2c_step::Read_device_address:
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_RECEIVER);
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currentState.currentStep = Read_device_data_start;
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if (currentState.numberOfBytes == 1) {
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/* disable acknowledge */
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_RECEIVER);
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while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) {}
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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/* wait for the byte to be received */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {}
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/* read the byte received from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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while (i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {
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i2c_data_receive(I2C0);
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}
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i2c_stop_on_bus(I2C0);
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP)) {
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asm("nop");
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}
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currentState.currentStep = i2c_step::Done;
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} else if (currentState.numberOfBytes == 2) {
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/* disable acknowledge */
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_RECEIVER);
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while (!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) {}
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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/* wait for the byte to be received */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {}
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i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* read the byte received from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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currentState.buffer++;
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/* wait for the byte to be received */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {}
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/* read the byte received from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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while (i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {
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i2c_data_receive(I2C0);
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}
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i2c_stop_on_bus(I2C0);
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while ((I2C_CTL0(I2C0) & I2C_CTL0_STOP)) {
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asm("nop");
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}
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currentState.currentStep = i2c_step::Done;
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} else {
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_RECEIVER);
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currentState.currentStep = i2c_step::Read_device_data_start;
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}
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}
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break;
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case Read_device_data_start:
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case i2c_step::Read_device_data_start:
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { // addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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// Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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}
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/* one byte master reception procedure (polling) */
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if (currentState.numberOfBytes == 0) {
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currentState.currentStep = Send_stop;
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} else if (currentState.numberOfBytes == 1) {
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/* disable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register
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* (I2C_STAT0 has already been read) */
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i2c_flag_get(I2C0, I2C_FLAG_ADDSEND); // sat0
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i2c_flag_get(I2C0, I2C_FLAG_I2CBSY); // sat1
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/* send a stop condition to I2C bus*/
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i2c_stop_on_bus(I2C0);
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/* wait for the byte to be received */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
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;
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/* read the byte received from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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currentState.currentStep = Wait_stop;
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currentState.currentStep = i2c_step::Send_stop;
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} else { /* more than one byte master reception procedure (DMA) */
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/* enable I2C0 DMA */
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i2c_dma_enable(I2C0, I2C_DMA_ON);
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/* enable DMA0 channel5 */
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dma_channel_enable(DMA0, DMA_CH6);
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currentState.currentStep = Read_device_data_finish;
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while (currentState.numberOfBytes) {
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if (3 == currentState.numberOfBytes) {
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/* wait until BTC bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) {}
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i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
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/* disable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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} else if (2 == currentState.numberOfBytes) {
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/* wait until BTC bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_BTC)) {}
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/* disable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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}
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/* wait until RBNE bit is set */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE)) {}
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/* read a byte from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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/* point to the next location where the byte read will be saved */
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currentState.buffer++;
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/* decrement the read bytes counter */
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currentState.numberOfBytes--;
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}
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currentState.currentStep = i2c_step::Wait_stop;
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// currentState.currentStep = i2c_step::Read_device_data_finish;
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}
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}
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break;
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case Read_device_data_finish: // Wait for complete then goto stop
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case i2c_step::Read_device_data_finish: // Wait for complete then goto stop
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/* wait until BTC bit is set */
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if (dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
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currentState.currentStep = Send_stop;
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}
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break;
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case Send_stop:
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case i2c_step::Send_stop:
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/* send a stop condition to I2C bus*/
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i2c_stop_on_bus(I2C0);
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currentState.currentStep = Wait_stop;
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currentState.currentStep = i2c_step::Wait_stop;
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break;
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case Wait_stop:
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case i2c_step::Wait_stop:
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/* i2c master sends STOP signal successfully */
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if ((I2C_CTL0(I2C0) & 0x0200) != 0x0200) {
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currentState.currentStep = Done;
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if ((I2C_CTL0(I2C0) & I2C_CTL0_STOP) != I2C_CTL0_STOP) {
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currentState.currentStep = i2c_step::Done;
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}
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break;
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default:
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@@ -220,16 +253,6 @@ void perform_i2c_step() {
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}
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bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8_t *p_buffer, uint16_t number_of_byte, bool isWrite, bool isWakeOnly) {
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{
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// TODO is this required
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/* disable I2C0 */
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i2c_disable(I2C0);
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/* enable I2C0 */
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i2c_enable(I2C0);
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}
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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i2c_interrupt_disable(I2C0, I2C_INT_BUF);
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i2c_interrupt_disable(I2C0, I2C_INT_EV);
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currentState.isMemoryWrite = isWrite;
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currentState.wakePart = isWakeOnly;
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@@ -237,45 +260,38 @@ bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8
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currentState.memoryAddress = memory_address;
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currentState.numberOfBytes = number_of_byte;
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currentState.buffer = p_buffer;
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if (!isWakeOnly) {
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// Setup DMA
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currentState.dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
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currentState.dma_init_struct.memory_addr = (uint32_t)p_buffer;
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currentState.dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
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currentState.dma_init_struct.number = number_of_byte;
|
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currentState.dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
|
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currentState.dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
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currentState.dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
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currentState.dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
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if (currentState.isMemoryWrite) {
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dma_deinit(DMA0, DMA_CH5);
|
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currentState.dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
|
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dma_init(DMA0, DMA_CH5, (dma_parameter_struct *)¤tState.dma_init_struct);
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} else {
|
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dma_deinit(DMA0, DMA_CH6);
|
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currentState.dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
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dma_init(DMA0, DMA_CH6, (dma_parameter_struct *)¤tState.dma_init_struct);
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}
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// Setup DMA
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currentState.dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
|
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currentState.dma_init_struct.memory_addr = (uint32_t)p_buffer;
|
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currentState.dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
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currentState.dma_init_struct.number = number_of_byte;
|
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currentState.dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
|
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currentState.dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
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currentState.dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
||||
currentState.dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
||||
|
||||
if (!currentState.isMemoryWrite) {
|
||||
i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
|
||||
}
|
||||
if (currentState.isMemoryWrite) {
|
||||
currentState.dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
|
||||
} else {
|
||||
currentState.dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
|
||||
}
|
||||
// Clear flags
|
||||
I2C_STAT0(I2C0) = 0;
|
||||
I2C_STAT1(I2C0) = 0;
|
||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||
|
||||
currentState.currentStep = Write_start; // Always start in write mode
|
||||
TickType_t timeout = xTaskGetTickCount() + TICKS_SECOND;
|
||||
while ((currentState.currentStep != Done) && (currentState.currentStep != Error_occured)) {
|
||||
i2c_ackpos_config(I2C0, I2C_ACKPOS_CURRENT);
|
||||
i2c_data_receive(I2C0);
|
||||
i2c_data_receive(I2C0);
|
||||
currentState.currentStep = i2c_step::Write_start; // Always start in write mode
|
||||
TickType_t timeout = xTaskGetTickCount() + TICKS_100MS;
|
||||
while ((currentState.currentStep != i2c_step::Done) && (currentState.currentStep != i2c_step::Error_occured)) {
|
||||
if (xTaskGetTickCount() > timeout) {
|
||||
i2c_stop_on_bus(I2C0);
|
||||
return false;
|
||||
}
|
||||
perform_i2c_step();
|
||||
}
|
||||
return currentState.currentStep == Done;
|
||||
return currentState.currentStep == i2c_step::Done;
|
||||
}
|
||||
|
||||
bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address, uint8_t *p_buffer, uint16_t number_of_byte) {
|
||||
|
||||
Reference in New Issue
Block a user