1
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forked from me/IronOS

Bitbang I2C setup + detect test

This commit is contained in:
Ben V. Brown
2020-06-12 21:10:03 +10:00
parent 450ce17935
commit 34ae57ee58
15 changed files with 1435 additions and 1630 deletions

View File

@@ -6,13 +6,16 @@
*/
#include "FUSB302.h"
#include "usb_pd_tcpm.h"
#include "USBC_TCPM/usb_pd_tcpm.h"
#include "USBC_TCPM/tcpm.h"
#include "USBC_PD/usb_pd.h"
#include <string.h>
#include "cmsis_os.h"
#include "I2C_Wrapper.hpp"
#define PACKET_IS_GOOD_CRC(head) (PD_HEADER_TYPE(head) == PD_CTRL_GOOD_CRC && \
PD_HEADER_CNT(head) == 0)
const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { { 0,
fusb302_I2C_SLAVE_ADDR, &fusb302_tcpm_drv, TCPC_ALERT_ACTIVE_LOW }, };
static struct fusb302_chip_state {
int cc_polarity;
int vconn_enabled;
@@ -44,7 +47,7 @@ static void fusb302_flush_rx_fifo(int port) {
* then we'll have to keep a shadow of what this register
* value should be so we don't clobber it here!
*/
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_write(port, TCPC_REG_CONTROL1, TCPC_REG_CONTROL1_RX_FLUSH);
}
@@ -52,7 +55,6 @@ static void fusb302_flush_rx_fifo(int port) {
static void fusb302_flush_tx_fifo(int port) {
int reg;
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_CONTROL0, &reg);
reg |= TCPC_REG_CONTROL0_TX_FLUSH;
tcpc_write(port, TCPC_REG_CONTROL0, reg);
@@ -62,7 +64,6 @@ static void fusb302_flush_tx_fifo(int port) {
static void fusb302_auto_goodcrc_enable(int port, int enable) {
int reg;
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_SWITCHES1, &reg);
if (enable)
@@ -101,8 +102,6 @@ static int measure_cc_pin_source(int port, int cc_measure) {
int reg;
int cc_lvl;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Read status register */
tcpc_read(port, TCPC_REG_SWITCHES0, &reg);
/* Save current value */
@@ -181,8 +180,6 @@ static void detect_cc_pin_sink(int port, int *cc1, int *cc2) {
int bc_lvl_cc1;
int bc_lvl_cc2;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/*
* Measure CC1 first.
*/
@@ -317,7 +314,7 @@ static int fusb302_send_message(int port, uint16_t header, const uint32_t *data,
buf[buf_pos++] = fusb302_TKN_TXON;
/* burst write for speed! */
i2c_master_lock(tcpc_config[port].i2c_host_port);
rv = tcpc_xfer(port, buf, buf_pos, 0, 0, I2C_XFER_SINGLE);
return rv;
@@ -328,8 +325,6 @@ static int fusb302_tcpm_select_rp_value(int port, int rp) {
int rv;
uint8_t vnc, rd;
i2c_master_lock(tcpc_config[port].i2c_host_port);
rv = tcpc_read(port, TCPC_REG_CONTROL0, &reg);
if (rv)
return rv;
@@ -373,8 +368,6 @@ static int fusb302_tcpm_init(int port) {
/* all other variables assumed to default to 0 */
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Restore default settings */
tcpc_write(port, TCPC_REG_RESET, TCPC_REG_RESET_SW_RESET);
@@ -448,8 +441,6 @@ static int fusb302_tcpm_get_cc(int port, int *cc1, int *cc2) {
static int fusb302_tcpm_set_cc(int port, int pull) {
int reg;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* NOTE: FUSB302 toggles a single pull-up between CC1 and CC2 */
/* NOTE: FUSB302 Does not support Ra. */
switch (pull) {
@@ -523,8 +514,6 @@ static int fusb302_tcpm_set_polarity(int port, int polarity) {
/* Port polarity : 0 => CC1 is CC line, 1 => CC2 is CC line */
int reg;
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_SWITCHES0, &reg);
/* clear VCONN switch bits */
@@ -590,8 +579,6 @@ static int fusb302_tcpm_set_vconn(int port, int enable) {
tcpm_set_polarity(port, state[port].cc_polarity);
} else {
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_SWITCHES0, &reg);
/* clear VCONN switch bits */
@@ -605,7 +592,8 @@ static int fusb302_tcpm_set_vconn(int port, int enable) {
return 0;
}
static int fusb302_tcpm_set_msg_header(int port, int power_role, int data_role) {
static int fusb302_tcpm_set_msg_header(int port, int power_role,
int data_role) {
int reg;
tcpc_read(port, TCPC_REG_SWITCHES1, &reg);
@@ -628,8 +616,6 @@ static int fusb302_tcpm_set_rx_enable(int port, int enable) {
state[port].rx_enable = enable;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Get current switch state */
tcpc_read(port, TCPC_REG_SWITCHES0, &reg);
@@ -678,8 +664,6 @@ static int fusb302_tcpm_set_rx_enable(int port, int enable) {
static int fusb302_rx_fifo_is_empty(int port) {
int reg, ret;
i2c_master_lock(tcpc_config[port].i2c_host_port);
ret = (!tcpc_read(port, TCPC_REG_STATUS1, &reg))
&& (reg & TCPC_REG_STATUS1_RX_EMPTY);
@@ -705,7 +689,6 @@ static int fusb302_tcpm_get_message(int port, uint32_t *payload, int *head) {
/* Read until we have a non-GoodCRC packet or an empty FIFO */
do {
buf[0] = TCPC_REG_FIFOS;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/*
* PART 1 OF BURST READ: Write in register address.
@@ -794,10 +777,11 @@ static int fusb302_tcpm_transmit(int port, enum tcpm_transmit_type type,
fusb302_send_message(port, header, data, buf, buf_pos);
// wait for the GoodCRC to come back before we let the rest
// of the code do stuff like change polarity and miss it
delay_us(600);
return;
// delay_us(600);
osDelay(1);
break;
case TCPC_TX_HARD_RESET:
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Simply hit the SEND_HARD_RESET bit */
tcpc_read(port, TCPC_REG_CONTROL3, &reg);
reg |= TCPC_REG_CONTROL3_SEND_HARDRESET;
@@ -805,7 +789,7 @@ static int fusb302_tcpm_transmit(int port, enum tcpm_transmit_type type,
break;
case TCPC_TX_BIST_MODE_2:
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Hit the BIST_MODE2 bit and start TX */
tcpc_read(port, TCPC_REG_CONTROL1, &reg);
reg |= TCPC_REG_CONTROL1_BIST_MODE2;
@@ -836,7 +820,7 @@ static int fusb302_tcpm_get_vbus_level(int port)
int reg;
/* Read status register */
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_STATUS0, &reg);
@@ -852,7 +836,6 @@ void fusb302_tcpc_alert(int port) {
/* reading interrupt registers clears them */
i2c_master_lock(tcpc_config[port].i2c_host_port);
tcpc_read(port, TCPC_REG_INTERRUPT, &interrupt);
tcpc_read(port, TCPC_REG_INTERRUPTA, &interrupta);
tcpc_read(port, TCPC_REG_INTERRUPTB, &interruptb);
@@ -924,8 +907,6 @@ void fusb302_tcpc_alert(int port) {
void tcpm_set_bist_test_data(int port) {
int reg;
i2c_master_lock(tcpc_config[port].i2c_host_port);
/* Read control3 register */
tcpc_read(port, TCPC_REG_CONTROL3, &reg);
@@ -937,16 +918,20 @@ void tcpm_set_bist_test_data(int port) {
}
const struct tcpm_drv fusb302_tcpm_drv = { .init = &fusb302_tcpm_init,
.release = &fusb302_tcpm_release, .get_cc = &fusb302_tcpm_get_cc,
#ifdef CONFIG_USB_PD_VBUS_DETECT_TCPC
.get_vbus_level = &fusb302_tcpm_get_vbus_level,
#endif
.select_rp_value = &fusb302_tcpm_select_rp_value, .set_cc =
&fusb302_tcpm_set_cc,
.set_polarity = &fusb302_tcpm_set_polarity, .set_vconn =
&fusb302_tcpm_set_vconn, .set_msg_header =
&fusb302_tcpm_set_msg_header, .set_rx_enable =
&fusb302_tcpm_set_rx_enable, .get_message =
&fusb302_tcpm_get_message, .transmit = &fusb302_tcpm_transmit,
.tcpc_alert = &fusb302_tcpc_alert, };
const struct tcpm_drv fusb302_tcpm_drv = { &fusb302_tcpm_init, //init
&fusb302_tcpm_release, //.release
&fusb302_tcpm_get_cc, //get_cc
NULL, //get_vbus_level
&fusb302_tcpm_select_rp_value, //select_rp_value
&fusb302_tcpm_set_cc, //set_cc
&fusb302_tcpm_set_polarity, //set_polarity
&fusb302_tcpm_set_vconn, //set_vconn
&fusb302_tcpm_set_msg_header, //set_msg_header
&fusb302_tcpm_set_rx_enable, //set_rx_enable
&fusb302_tcpm_get_message, //get_message
&fusb302_tcpm_transmit, //transmit
&fusb302_tcpc_alert, //tcpc_alert
NULL, //tcpc_discharge_vbus
NULL, //get_chip_info
};

View File

@@ -9,7 +9,7 @@
#define fusb302_H
#include <stdint.h>
#include "usb_pd_tcpm.h"
#include "USBC_TCPM/usb_pd_tcpm.h"
#include "USBC_PD/usb_pd.h"
/* Chip Device ID - 302A or 302B */
@@ -18,13 +18,13 @@
/* I2C slave address varies by part number */
/* FUSB302BUCX / FUSB302BMPX */
#define fusb302_I2C_SLAVE_ADDR 0x22 // 7-bit address for Arduino
#define fusb302_I2C_SLAVE_ADDR 0x22<<1 // 7-bit address
/* FUSB302B01MPX */
#define fusb302_I2C_SLAVE_ADDR_B01 0x23
#define fusb302_I2C_SLAVE_ADDR_B01 0x23<<1
/* FUSB302B10MPX */
#define fusb302_I2C_SLAVE_ADDR_B10 0x24
#define fusb302_I2C_SLAVE_ADDR_B10 0x24<<1
/* FUSB302B11MPX */
#define fusb302_I2C_SLAVE_ADDR_B11 0x25
#define fusb302_I2C_SLAVE_ADDR_B11 0x25<<1
/* Default retry count for transmitting */
#define PD_RETRY_COUNT 3
@@ -210,41 +210,8 @@ enum fusb302_txfifo_tokens {
extern const struct tcpm_drv fusb302_tcpm_drv;
/*
// Common methods for TCPM implementations
int fusb302_init(void);
int fusb302_get_cc(int *cc1, int *cc2);
int fusb302_get_vbus_level(void);
int fusb302_select_rp_value(int rp);
int fusb302_set_cc(int pull);
int fusb302_set_polarity(int polarity);
int fusb302_set_vconn(int enable);
int fusb302_set_msg_header(int power_role, int data_role);
int fusb302_set_rx_enable(int enable);
int fusb302_get_message(uint32_t *payload, int *head);
int fusb302_transmit(enum tcpm_transmit_type type,
uint16_t header, const uint32_t *data);
//int alert(void);
void fusb302_pd_reset(int port);
void fusb302_auto_goodcrc_enable(int enable);
int fusb302_convert_bc_lvl(int bc_lvl);
void fusb302_detect_cc_pin_source_manual(int *cc1_lvl, int *cc2_lvl);
int fusb302_measure_cc_pin_source(int cc_measure);
void fusb302_detect_cc_pin_sink(int *cc1, int *cc2);
int fusb302_send_message(uint16_t header, const uint32_t *data,
uint8_t *buf, int buf_pos);
void fusb302_flush_rx_fifo(int port);
void fusb302_flush_tx_fifo(int port);
void fusb302_clear_int_pin(void);
void fusb302_set_bist_test_data(void);
int fusb302_get_chip_id(int *id);
uint32_t fusb302_get_interrupt_reason(void);
int fusb302_tcpc_write(int reg, int val);
int fusb302_tcpc_read(int reg, int *val);
int fusb302_tcpc_xfer(const uint8_t *out,
int out_size, uint8_t *in,
int in_size, int flags);
*/
//returns 1 if the FUSB302 is on the I2C bus
uint8_t fusb302_detect();
#endif /* fusb302_H */

View File

@@ -7,13 +7,13 @@
#include "tcpm_driver.h"
#include "I2C_Wrapper.hpp"
#include "I2CBB.hpp"
extern const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT];
#define STATUS_OK 0
/* I2C wrapper functions - get I2C port / slave addr from config struct. */
int tcpc_write(int port, int reg, int val) {
FRToSI2C::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) &val,
1);
I2CBB::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) &val, 1);
return STATUS_OK;
}
@@ -21,16 +21,14 @@ int tcpc_write16(int port, int reg, int val) {
uint8_t data[2];
data[0] = (0xFF) & val;
data[1] = (0xFF) & (val >> 8);
FRToSI2C::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data,
2);
I2CBB::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data, 2);
return STATUS_OK;
}
int tcpc_read(int port, int reg, int *val) {
uint8_t data[1];
FRToSI2C::Mem_Read(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data,
1);
I2CBB::Mem_Read(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data, 1);
*val = data[0];
@@ -39,8 +37,7 @@ int tcpc_read(int port, int reg, int *val) {
int tcpc_read16(int port, int reg, int *val) {
uint8_t data[2];
FRToSI2C::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data,
2);
I2CBB::Mem_Write(tcpc_config[port].i2c_slave_addr, reg, (uint8_t*) data, 2);
*val = data[0];
*val |= (data[1] << 8);
@@ -57,13 +54,19 @@ int tcpc_xfer(int port, const uint8_t *out, int out_size, uint8_t *in,
if (flags & I2C_XFER_STOP) {
//Issuing a stop between the requests
//Send as a Tx followed by a Rx
FRToSI2C::Transmit(tcpc_config[port].i2c_slave_addr, (uint8_t*)out, out_size);
FRToSI2C::Receive(tcpc_config[port].i2c_slave_addr, in, in_size);
I2CBB::Transmit(tcpc_config[port].i2c_slave_addr, (uint8_t*) out,
out_size);
I2CBB::Receive(tcpc_config[port].i2c_slave_addr, in, in_size);
} else {
//issue as a continious transmit & recieve
FRToSI2C::TransmitReceive(tcpc_config[port].i2c_slave_addr, (uint8_t*)out,
I2CBB::TransmitReceive(tcpc_config[port].i2c_slave_addr, (uint8_t*) out,
out_size, in, in_size);
}
return STATUS_OK;
}
uint8_t fusb302_detect() {
//Probe the I2C bus for its address
return I2CBB::probe(fusb302_I2C_SLAVE_ADDR);
}

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@@ -10,7 +10,7 @@
#define USB_PD_DRIVER_H_
#include "USBC_PD/usb_pd.h"
#include "cmsis_os.h"
#include <stdint.h>
//#define CONFIG_BBRAM
@@ -64,8 +64,8 @@ PDO_FIXED_COMM_CAP)
#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
#define usleep(us) (delay_us(us))
#define msleep(us) (delay_ms(us))
#define usleep(us) (osDelay(1))
#define msleep(us) (osDelay(us))
typedef union {
uint64_t val;

View File

@@ -1,354 +0,0 @@
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* USB Power delivery port management */
#ifndef __CROS_EC_USB_PD_TCPM_H
#define __CROS_EC_USB_PD_TCPM_H
/* List of common error codes that can be returned */
enum ec_error_list {
/* Success - no error */
EC_SUCCESS = 0,
/* Unknown error */
EC_ERROR_UNKNOWN = 1,
/* Function not implemented yet */
EC_ERROR_UNIMPLEMENTED = 2,
/* Overflow error; too much input provided. */
EC_ERROR_OVERFLOW = 3,
/* Timeout */
EC_ERROR_TIMEOUT = 4,
/* Invalid argument */
EC_ERROR_INVAL = 5,
/* Already in use, or not ready yet */
EC_ERROR_BUSY = 6,
/* Access denied */
EC_ERROR_ACCESS_DENIED = 7,
/* Failed because component does not have power */
EC_ERROR_NOT_POWERED = 8,
/* Failed because component is not calibrated */
EC_ERROR_NOT_CALIBRATED = 9,
/* Failed because CRC error */
EC_ERROR_CRC = 10,
/* Invalid console command param (PARAMn means parameter n is bad) */
EC_ERROR_PARAM1 = 11,
EC_ERROR_PARAM2 = 12,
EC_ERROR_PARAM3 = 13,
EC_ERROR_PARAM4 = 14,
EC_ERROR_PARAM5 = 15,
EC_ERROR_PARAM6 = 16,
EC_ERROR_PARAM7 = 17,
EC_ERROR_PARAM8 = 18,
EC_ERROR_PARAM9 = 19,
/* Wrong number of params */
EC_ERROR_PARAM_COUNT = 20,
/* Interrupt event not handled */
EC_ERROR_NOT_HANDLED = 21,
/* Data has not changed */
EC_ERROR_UNCHANGED = 22,
/* Memory allocation */
EC_ERROR_MEMORY_ALLOCATION = 23,
/* Verified boot errors */
EC_ERROR_VBOOT_SIGNATURE = 0x1000, /* 4096 */
EC_ERROR_VBOOT_SIG_MAGIC = 0x1001,
EC_ERROR_VBOOT_SIG_SIZE = 0x1002,
EC_ERROR_VBOOT_SIG_ALGORITHM = 0x1003,
EC_ERROR_VBOOT_HASH_ALGORITHM = 0x1004,
EC_ERROR_VBOOT_SIG_OFFSET = 0x1005,
EC_ERROR_VBOOT_DATA_SIZE = 0x1006,
/* Verified boot key errors */
EC_ERROR_VBOOT_KEY = 0x1100,
EC_ERROR_VBOOT_KEY_MAGIC = 0x1101,
EC_ERROR_VBOOT_KEY_SIZE = 0x1102,
/* Verified boot data errors */
EC_ERROR_VBOOT_DATA = 0x1200,
EC_ERROR_VBOOT_DATA_VERIFY = 0x1201,
/* Module-internal error codes may use this range. */
EC_ERROR_INTERNAL_FIRST = 0x10000,
EC_ERROR_INTERNAL_LAST = 0x1FFFF
};
/* Flags for i2c_xfer() */
#define I2C_XFER_START (1 << 0) /* Start smbus session from idle state */
#define I2C_XFER_STOP (1 << 1) /* Terminate smbus session with stop bit */
#define I2C_XFER_SINGLE (I2C_XFER_START | I2C_XFER_STOP) /* One transaction */
/* Default retry count for transmitting */
#define PD_RETRY_COUNT 3
/* Time to wait for TCPC to complete transmit */
#define PD_T_TCPC_TX_TIMEOUT (100*MSEC)
enum tcpc_cc_voltage_status {
TYPEC_CC_VOLT_OPEN = 0,
TYPEC_CC_VOLT_RA = 1,
TYPEC_CC_VOLT_RD = 2,
TYPEC_CC_VOLT_SNK_DEF = 5,
TYPEC_CC_VOLT_SNK_1_5 = 6,
TYPEC_CC_VOLT_SNK_3_0 = 7,
};
enum tcpc_cc_pull {
TYPEC_CC_RA = 0,
TYPEC_CC_RP = 1,
TYPEC_CC_RD = 2,
TYPEC_CC_OPEN = 3,
};
enum tcpc_rp_value {
TYPEC_RP_USB = 0,
TYPEC_RP_1A5 = 1,
TYPEC_RP_3A0 = 2,
TYPEC_RP_RESERVED = 3,
};
enum tcpm_transmit_type {
TCPC_TX_SOP = 0,
TCPC_TX_SOP_PRIME = 1,
TCPC_TX_SOP_PRIME_PRIME = 2,
TCPC_TX_SOP_DEBUG_PRIME = 3,
TCPC_TX_SOP_DEBUG_PRIME_PRIME = 4,
TCPC_TX_HARD_RESET = 5,
TCPC_TX_CABLE_RESET = 6,
TCPC_TX_BIST_MODE_2 = 7
};
enum tcpc_transmit_complete {
TCPC_TX_COMPLETE_SUCCESS = 0,
TCPC_TX_COMPLETE_DISCARDED = 1,
TCPC_TX_COMPLETE_FAILED = 2,
};
struct tcpm_drv {
/**
* Initialize TCPM driver and wait for TCPC readiness.
*
* @param port Type-C port number
*
* @return EC_SUCCESS or error
*/
int (*init)(int port);
/**
* Release the TCPM hardware and disconnect the driver.
* Only .init() can be called after .release().
*
* @param port Type-C port number
*
* @return EC_SUCCESS or error
*/
int (*release)(int port);
/**
* Read the CC line status.
*
* @param port Type-C port number
* @param cc1 pointer to CC status for CC1
* @param cc2 pointer to CC status for CC2
*
* @return EC_SUCCESS or error
*/
int (*get_cc)(int port, int *cc1, int *cc2);
/**
* Read VBUS
*
* @param port Type-C port number
*
* @return 0 => VBUS not detected, 1 => VBUS detected
*/
int (*get_vbus_level)(int port);
/**
* Set the value of the CC pull-up used when we are a source.
*
* @param port Type-C port number
* @param rp One of enum tcpc_rp_value
*
* @return EC_SUCCESS or error
*/
int (*select_rp_value)(int port, int rp);
/**
* Set the CC pull resistor. This sets our role as either source or sink.
*
* @param port Type-C port number
* @param pull One of enum tcpc_cc_pull
*
* @return EC_SUCCESS or error
*/
int (*set_cc)(int port, int pull);
/**
* Set polarity
*
* @param port Type-C port number
* @param polarity 0=> transmit on CC1, 1=> transmit on CC2
*
* @return EC_SUCCESS or error
*/
int (*set_polarity)(int port, int polarity);
/**
* Set Vconn.
*
* @param port Type-C port number
* @param polarity Polarity of the CC line to read
*
* @return EC_SUCCESS or error
*/
int (*set_vconn)(int port, int enable);
/**
* Set PD message header to use for goodCRC
*
* @param port Type-C port number
* @param power_role Power role to use in header
* @param data_role Data role to use in header
*
* @return EC_SUCCESS or error
*/
int (*set_msg_header)(int port, int power_role, int data_role);
/**
* Set RX enable flag
*
* @param port Type-C port number
* @enable true for enable, false for disable
*
* @return EC_SUCCESS or error
*/
int (*set_rx_enable)(int port, int enable);
/**
* Read last received PD message.
*
* @param port Type-C port number
* @param payload Pointer to location to copy payload of message
* @param header of message
*
* @return EC_SUCCESS or error
*/
int (*get_message)(int port, uint32_t *payload, int *head);
/**
* Transmit PD message
*
* @param port Type-C port number
* @param type Transmit type
* @param header Packet header
* @param cnt Number of bytes in payload
* @param data Payload
*
* @return EC_SUCCESS or error
*/
int (*transmit)(int port, enum tcpm_transmit_type type, uint16_t header,
const uint32_t *data);
/**
* TCPC is asserting alert
*
* @param port Type-C port number
*/
void (*tcpc_alert)(int port);
/**
* Discharge PD VBUS on src/sink disconnect & power role swap
*
* @param port Type-C port number
* @param enable Discharge enable or disable
*/
void (*tcpc_discharge_vbus)(int port, int enable);
#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
/**
* Enable TCPC auto DRP toggling.
*
* @param port Type-C port number
* @param enable 1: Enable 0: Disable
*
* @return EC_SUCCESS or error
*/
int (*drp_toggle)(int port, int enable);
#endif
/**
* Get firmware version.
*
* @param port Type-C port number
* @param renew Force renewal
* @param info Pointer to pointer to PD chip info
*
* @return EC_SUCCESS or error
*/
int (*get_chip_info)(int port, int renew,
struct ec_response_pd_chip_info **info);
};
enum tcpc_alert_polarity {
TCPC_ALERT_ACTIVE_LOW,
TCPC_ALERT_ACTIVE_HIGH,
};
struct tcpc_config_t {
int i2c_host_port;
int i2c_slave_addr;
const struct tcpm_drv *drv;
enum tcpc_alert_polarity pol;
};
/**
* Returns the PD_STATUS_TCPC_ALERT_* mask corresponding to the TCPC ports
* that are currently asserting ALERT.
*
* @return PD_STATUS_TCPC_ALERT_* mask.
*/
uint16_t tcpc_get_alert_status(void);
/**
* Optional, set the TCPC power mode.
*
* @param port Type-C port number
* @param mode 0: off/sleep, 1: on/awake
*/
void board_set_tcpc_power_mode(int port, int mode) __attribute__((weak));
/**
* Initialize TCPC.
*
* @param port Type-C port number
*/
void tcpc_init(int port);
/**
* TCPC is asserting alert
*
* @param port Type-C port number
*/
void tcpc_alert_clear(int port);
/**
* Run TCPC task once. This checks for incoming messages, processes
* any outgoing messages, and reads CC lines.
*
* @param port Type-C port number
* @param evt Event type that woke up this task
*/
int tcpc_run(int port, int evt);
/**
* Initialize board specific TCPC functions post TCPC initialization.
*
* @param port Type-C port number
*
* @return EC_SUCCESS or error
*/
int board_tcpc_post_init(int port) __attribute__((weak));
#endif /* __CROS_EC_USB_PD_TCPM_H */