Reformat
This commit is contained in:
@@ -11,119 +11,117 @@
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#include <IRQ.h>
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#include <IRQ.h>
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const uint16_t powerPWM = 255;
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const uint16_t powerPWM = 255;
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const uint8_t holdoffTicks = 13; // delay of 7 ms
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const uint8_t holdoffTicks = 25; // delay of 7 ms
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const uint8_t tempMeasureTicks = 17;
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const uint8_t tempMeasureTicks = 25;
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uint16_t totalPWM; //htim2.Init.Period, the full PWM cycle
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uint16_t totalPWM; // htim2.Init.Period, the full PWM cycle
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//2 second filter (ADC is PID_TIM_HZ Hz)
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// 2 second filter (ADC is PID_TIM_HZ Hz)
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history<uint16_t, PID_TIM_HZ> rawTempFilter = { { 0 }, 0, 0 };
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history<uint16_t, PID_TIM_HZ> rawTempFilter = {{0}, 0, 0};
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void resetWatchdog() {
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void resetWatchdog() {
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//TODO
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// TODO
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}
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}
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uint16_t getTipInstantTemperature() {
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uint16_t getTipInstantTemperature() {
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uint16_t sum = 0; // 12 bit readings * 8 -> 15 bits
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volatile uint16_t sum = 0; // 12 bit readings * 8*2 -> 16 bits
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for (int i = 0; i < 4; i++) {
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for (int i = 0; i < 4; i++) {
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sum += adc_inserted_data_read(ADC0, i);
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sum += adc_inserted_data_read(ADC0, i);
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sum += adc_inserted_data_read(ADC1, i);
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sum += adc_inserted_data_read(ADC1, i);
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}
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}
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return sum; // 8x over sample
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return sum; // 8x over sample
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}
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}
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uint16_t getTipRawTemp(uint8_t refresh) {
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uint16_t getTipRawTemp(uint8_t refresh) {
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if (refresh) {
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if (refresh) {
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uint16_t lastSample = getTipInstantTemperature();
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uint16_t lastSample = getTipInstantTemperature();
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rawTempFilter.update(lastSample);
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rawTempFilter.update(lastSample);
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return lastSample;
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return lastSample;
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} else {
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} else {
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return rawTempFilter.average();
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return rawTempFilter.average();
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}
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}
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}
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}
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uint16_t getHandleTemperature() {
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uint16_t getHandleTemperature() {
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#ifdef TEMP_TMP36
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#ifdef TEMP_TMP36
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// We return the current handle temperature in X10 C
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// We return the current handle temperature in X10 C
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// TMP36 in handle, 0.5V offset and then 10mV per deg C (0.75V @ 25C for
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// TMP36 in handle, 0.5V offset and then 10mV per deg C (0.75V @ 25C for
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// example) STM32 = 4096 count @ 3.3V input -> But We oversample by 32/(2^2) =
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// example) STM32 = 4096 count @ 3.3V input -> But We oversample by 32/(2^2) =
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// 8 times oversampling Therefore 32768 is the 3.3V input, so 0.1007080078125
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// 8 times oversampling Therefore 32768 is the 3.3V input, so 0.1007080078125
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// mV per count So we need to subtract an offset of 0.5V to center on 0C
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// mV per count So we need to subtract an offset of 0.5V to center on 0C
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// (4964.8 counts)
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// (4964.8 counts)
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//
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//
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int32_t result = getADC(0);
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int32_t result = getADC(0);
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result -= 4965; // remove 0.5V offset
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result -= 4965; // remove 0.5V offset
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// 10mV per C
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// 10mV per C
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// 99.29 counts per Deg C above 0C
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// 99.29 counts per Deg C above 0C
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result *= 100;
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result *= 100;
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result /= 993;
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result /= 993;
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return result;
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return result;
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#else
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#else
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#error
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#error
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#endif
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#endif
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}
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}
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uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample) {
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uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample) {
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static uint8_t preFillneeded = 10;
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static uint8_t preFillneeded = 10;
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static uint32_t samples[BATTFILTERDEPTH];
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static uint32_t samples[BATTFILTERDEPTH];
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static uint8_t index = 0;
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static uint8_t index = 0;
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if (preFillneeded) {
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if (preFillneeded) {
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for (uint8_t i = 0; i < BATTFILTERDEPTH; i++)
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for (uint8_t i = 0; i < BATTFILTERDEPTH; i++)
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samples[i] = getADC(1);
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samples[i] = getADC(1);
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preFillneeded--;
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preFillneeded--;
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}
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}
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if (sample) {
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if (sample) {
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samples[index] = getADC(1);
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samples[index] = getADC(1);
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index = (index + 1) % BATTFILTERDEPTH;
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index = (index + 1) % BATTFILTERDEPTH;
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}
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}
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uint32_t sum = 0;
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uint32_t sum = 0;
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for (uint8_t i = 0; i < BATTFILTERDEPTH; i++)
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for (uint8_t i = 0; i < BATTFILTERDEPTH; i++)
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sum += samples[i];
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sum += samples[i];
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sum /= BATTFILTERDEPTH;
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sum /= BATTFILTERDEPTH;
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if (divisor == 0) {
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if (divisor == 0) {
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divisor = 1;
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divisor = 1;
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}
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}
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return sum * 4 / divisor;
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return sum * 4 / divisor;
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}
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}
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void unstick_I2C() {
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void unstick_I2C() {
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/* configure SDA/SCL for GPIO */
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/* configure SDA/SCL for GPIO */
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GPIO_BC(GPIOB) |= SDA_Pin | SCL_Pin;
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GPIO_BC(GPIOB) |= SDA_Pin | SCL_Pin;
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gpio_init(SDA_GPIO_Port, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ, SDA_Pin | SCL_Pin);
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gpio_init(SDA_GPIO_Port, GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ,
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asm ("nop");
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SDA_Pin | SCL_Pin);
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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GPIO_BOP(GPIOB) |= SCL_Pin;
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asm("nop");
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asm ("nop");
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GPIO_BOP(GPIOB) |= SCL_Pin;
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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asm ("nop");
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asm("nop");
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GPIO_BOP(GPIOB) |= SDA_Pin;
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asm("nop");
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/* connect PB6 to I2C0_SCL */
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GPIO_BOP(GPIOB) |= SDA_Pin;
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/* connect PB7 to I2C0_SDA */
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/* connect PB6 to I2C0_SCL */
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gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, SDA_Pin | SCL_Pin);
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/* connect PB7 to I2C0_SDA */
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gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ,
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SDA_Pin | SCL_Pin);
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}
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}
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uint8_t getButtonA() {
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uint8_t getButtonA() {
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return (gpio_input_bit_get(KEY_A_GPIO_Port, KEY_A_Pin) == SET) ? 1 : 0;
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return (gpio_input_bit_get(KEY_A_GPIO_Port, KEY_A_Pin) == SET) ? 1 : 0;
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}
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}
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uint8_t getButtonB() {
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uint8_t getButtonB() {
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return (gpio_input_bit_get(KEY_B_GPIO_Port, KEY_B_Pin) == SET) ? 1 : 0;
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return (gpio_input_bit_get(KEY_B_GPIO_Port, KEY_B_Pin) == SET) ? 1 : 0;
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}
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}
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void reboot() {
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void reboot() {
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// TODO
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// TODO
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for (;;) {
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for (;;) {
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}
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}
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}
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}
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void delay_ms(uint16_t count) {
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void delay_ms(uint16_t count) { delay_1ms(count); }
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delay_1ms(count);
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}
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@@ -12,510 +12,521 @@ SemaphoreHandle_t FRToSI2C::I2CSemaphore = nullptr;
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StaticSemaphore_t FRToSI2C::xSemaphoreBuffer;
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StaticSemaphore_t FRToSI2C::xSemaphoreBuffer;
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#define I2C_TIME_OUT (uint16_t)(5000)
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#define I2C_TIME_OUT (uint16_t)(5000)
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void FRToSI2C::CpltCallback() {
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void FRToSI2C::CpltCallback() {
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//TODO
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// TODO
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}
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}
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bool FRToSI2C::I2C_RegisterWrite(uint8_t address, uint8_t reg, uint8_t data) {
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bool FRToSI2C::I2C_RegisterWrite(uint8_t address, uint8_t reg, uint8_t data) {
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return Mem_Write(address, reg, &data, 1);
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return Mem_Write(address, reg, &data, 1);
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}
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}
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uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
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uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
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uint8_t temp = 0;
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uint8_t temp = 0;
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Mem_Read(add, reg, &temp, 1);
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Mem_Read(add, reg, &temp, 1);
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return temp;
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return temp;
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}
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}
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address, uint8_t *p_buffer, uint16_t number_of_byte) {
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t read_address,
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if (!lock())
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uint8_t *p_buffer, uint16_t number_of_byte) {
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return false;
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if (!lock())
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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return false;
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i2c_interrupt_disable(I2C0, I2C_INT_BUF);
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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i2c_interrupt_disable(I2C0, I2C_INT_EV);
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i2c_interrupt_disable(I2C0, I2C_INT_BUF);
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dma_parameter_struct dma_init_struct;
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i2c_interrupt_disable(I2C0, I2C_INT_EV);
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dma_parameter_struct dma_init_struct;
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uint8_t state = I2C_START;
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uint8_t state = I2C_START;
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uint8_t in_rx_cycle = 0;
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uint8_t in_rx_cycle = 0;
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uint16_t timeout = 0;
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uint16_t timeout = 0;
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uint8_t tries = 0;
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uint8_t tries = 0;
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uint8_t i2c_timeout_flag = 0;
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uint8_t i2c_timeout_flag = 0;
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while (!(i2c_timeout_flag)) {
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while (!(i2c_timeout_flag)) {
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switch (state) {
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switch (state) {
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case I2C_START:
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case I2C_START:
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tries++;
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tries++;
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if (tries > 64) {
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if (tries > 64) {
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i2c_stop_on_bus(I2C0);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
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timeout++;
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timeout++;
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}
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}
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unlock();
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unlock();
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return false;
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return false;
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}
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}
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if (0 == in_rx_cycle) {
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if (0 == in_rx_cycle) {
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/* disable I2C0 */
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/* disable I2C0 */
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i2c_disable(I2C0);
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i2c_disable(I2C0);
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/* enable I2C0 */
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/* enable I2C0 */
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i2c_enable(I2C0);
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i2c_enable(I2C0);
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/* enable acknowledge */
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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/* i2c master sends start signal only when the bus is idle */
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) &&
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timeout++;
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(timeout < I2C_TIME_OUT)) {
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}
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timeout++;
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if (timeout < I2C_TIME_OUT) {
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}
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/* send the start signal */
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if (timeout < I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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/* send the start signal */
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timeout = 0;
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i2c_start_on_bus(I2C0);
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state = I2C_SEND_ADDRESS;
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timeout = 0;
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} else {
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state = I2C_SEND_ADDRESS;
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I2C_Unstick();
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} else {
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timeout = 0;
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I2C_Unstick();
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state = I2C_START;
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timeout = 0;
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}
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state = I2C_START;
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} else {
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}
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i2c_start_on_bus(I2C0);
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} else {
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timeout = 0;
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i2c_start_on_bus(I2C0);
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state = I2C_SEND_ADDRESS;
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timeout = 0;
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}
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state = I2C_SEND_ADDRESS;
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break;
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}
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case I2C_SEND_ADDRESS:
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break;
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/* i2c master sends START signal successfully */
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case I2C_SEND_ADDRESS:
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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/* i2c master sends START signal successfully */
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timeout++;
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) &&
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}
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(timeout < I2C_TIME_OUT)) {
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if (timeout < I2C_TIME_OUT) {
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timeout++;
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if (RESET == in_rx_cycle) {
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}
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i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
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if (timeout < I2C_TIME_OUT) {
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state = I2C_CLEAR_ADDRESS_FLAG;
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if (RESET == in_rx_cycle) {
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} else {
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i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
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i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER);
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state = I2C_CLEAR_ADDRESS_FLAG;
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state = I2C_CLEAR_ADDRESS_FLAG;
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} else {
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}
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i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER);
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timeout = 0;
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state = I2C_CLEAR_ADDRESS_FLAG;
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} else {
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}
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timeout = 0;
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timeout = 0;
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state = I2C_START;
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} else {
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in_rx_cycle = 0;
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timeout = 0;
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}
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state = I2C_START;
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break;
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in_rx_cycle = 0;
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case I2C_CLEAR_ADDRESS_FLAG:
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}
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/* address flag set means i2c slave sends ACK */
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break;
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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case I2C_CLEAR_ADDRESS_FLAG:
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timeout++;
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/* address flag set means i2c slave sends ACK */
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) &&
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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(timeout < I2C_TIME_OUT)) {
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i2c_stop_on_bus(I2C0);
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timeout++;
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/* i2c master sends STOP signal successfully */
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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timeout++;
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i2c_stop_on_bus(I2C0);
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}
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/* i2c master sends STOP signal successfully */
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//Address NACK'd
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
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unlock();
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timeout++;
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return false;
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}
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}
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// Address NACK'd
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}
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unlock();
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if (timeout < I2C_TIME_OUT) {
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return false;
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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}
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timeout = 0;
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}
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state = I2C_TRANSMIT_DATA;
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if (timeout < I2C_TIME_OUT) {
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} else {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_stop_on_bus(I2C0);
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timeout = 0;
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/* i2c master sends STOP signal successfully */
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state = I2C_TRANSMIT_DATA;
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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} else {
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timeout++;
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i2c_stop_on_bus(I2C0);
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}
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/* i2c master sends STOP signal successfully */
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//Address NACK'd
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
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unlock();
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timeout++;
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return false;
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}
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}
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// Address NACK'd
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break;
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unlock();
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case I2C_TRANSMIT_DATA:
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return false;
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if (0 == in_rx_cycle) {
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}
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/* wait until the transmit data buffer is empty */
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break;
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while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
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case I2C_TRANSMIT_DATA:
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timeout++;
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if (0 == in_rx_cycle) {
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}
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/* wait until the transmit data buffer is empty */
|
||||||
if (timeout < I2C_TIME_OUT) {
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) &&
|
||||||
//Write out the 8 byte address
|
(timeout < I2C_TIME_OUT)) {
|
||||||
i2c_data_transmit(I2C0, read_address);
|
timeout++;
|
||||||
timeout = 0;
|
}
|
||||||
} else {
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
// Write out the 8 byte address
|
||||||
state = I2C_START;
|
i2c_data_transmit(I2C0, read_address);
|
||||||
in_rx_cycle = 0;
|
timeout = 0;
|
||||||
}
|
} else {
|
||||||
/* wait until BTC bit is set */
|
timeout = 0;
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) && (timeout < I2C_TIME_OUT )) {
|
state = I2C_START;
|
||||||
timeout++;
|
in_rx_cycle = 0;
|
||||||
}
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
/* wait until BTC bit is set */
|
||||||
timeout = 0;
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_BTC)) &&
|
||||||
state = I2C_START;
|
(timeout < I2C_TIME_OUT)) {
|
||||||
in_rx_cycle = 1;
|
timeout++;
|
||||||
} else {
|
}
|
||||||
timeout = 0;
|
if (timeout < I2C_TIME_OUT) {
|
||||||
state = I2C_START;
|
timeout = 0;
|
||||||
in_rx_cycle = 0;
|
state = I2C_START;
|
||||||
}
|
in_rx_cycle = 1;
|
||||||
} else {
|
} else {
|
||||||
/* one byte master reception procedure (polling) */
|
timeout = 0;
|
||||||
if (number_of_byte < 2) {
|
state = I2C_START;
|
||||||
/* disable acknowledge */
|
in_rx_cycle = 0;
|
||||||
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
}
|
||||||
/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register (I2C_STAT0 has already been read) */
|
} else {
|
||||||
i2c_flag_get(I2C0, I2C_FLAG_ADDSEND);
|
/* one byte master reception procedure (polling) */
|
||||||
/* send a stop condition to I2C bus*/
|
if (number_of_byte < 2) {
|
||||||
i2c_stop_on_bus(I2C0);
|
/* disable acknowledge */
|
||||||
/* wait for the byte to be received */
|
i2c_ack_config(I2C0, I2C_ACK_DISABLE);
|
||||||
while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
|
/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register
|
||||||
;
|
* (I2C_STAT0 has already been read) */
|
||||||
/* read the byte received from the EEPROM */
|
i2c_flag_get(I2C0, I2C_FLAG_ADDSEND);
|
||||||
*p_buffer = i2c_data_receive(I2C0);
|
/* send a stop condition to I2C bus*/
|
||||||
/* decrement the read bytes counter */
|
i2c_stop_on_bus(I2C0);
|
||||||
number_of_byte--;
|
/* wait for the byte to be received */
|
||||||
timeout = 0;
|
while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
|
||||||
} else { /* more than one byte master reception procedure (DMA) */
|
;
|
||||||
dma_deinit(DMA0, DMA_CH6);
|
/* read the byte received from the EEPROM */
|
||||||
dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
|
*p_buffer = i2c_data_receive(I2C0);
|
||||||
dma_init_struct.memory_addr = (uint32_t) p_buffer;
|
/* decrement the read bytes counter */
|
||||||
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
number_of_byte--;
|
||||||
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
|
timeout = 0;
|
||||||
dma_init_struct.number = number_of_byte;
|
} else { /* more than one byte master reception procedure (DMA) */
|
||||||
dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0);
|
dma_deinit(DMA0, DMA_CH6);
|
||||||
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
dma_init_struct.direction = DMA_PERIPHERAL_TO_MEMORY;
|
||||||
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
dma_init_struct.memory_addr = (uint32_t)p_buffer;
|
||||||
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
||||||
dma_init(DMA0, DMA_CH6, &dma_init_struct);
|
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
|
||||||
|
dma_init_struct.number = number_of_byte;
|
||||||
|
dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
|
||||||
|
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
||||||
|
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
||||||
|
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
||||||
|
dma_init(DMA0, DMA_CH6, &dma_init_struct);
|
||||||
|
|
||||||
i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
|
i2c_dma_last_transfer_config(I2C0, I2C_DMALST_ON);
|
||||||
/* enable I2C0 DMA */
|
/* enable I2C0 DMA */
|
||||||
i2c_dma_enable(I2C0, I2C_DMA_ON);
|
i2c_dma_enable(I2C0, I2C_DMA_ON);
|
||||||
/* enable DMA0 channel5 */
|
/* enable DMA0 channel5 */
|
||||||
dma_channel_enable(DMA0, DMA_CH6);
|
dma_channel_enable(DMA0, DMA_CH6);
|
||||||
/* wait until BTC bit is set */
|
/* wait until BTC bit is set */
|
||||||
while (!dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
|
while (!dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
|
||||||
osDelay(1);
|
osDelay(1);
|
||||||
}
|
}
|
||||||
/* send a stop condition to I2C bus*/
|
/* send a stop condition to I2C bus*/
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
}
|
}
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_STOP;
|
state = I2C_STOP;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case I2C_STOP:
|
case I2C_STOP:
|
||||||
/* i2c master sends STOP signal successfully */
|
/* i2c master sends STOP signal successfully */
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_END;
|
state = I2C_END;
|
||||||
i2c_timeout_flag = I2C_OK;
|
i2c_timeout_flag = I2C_OK;
|
||||||
} else {
|
} else {
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
in_rx_cycle = 0;
|
in_rx_cycle = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
in_rx_cycle = 0;
|
in_rx_cycle = 0;
|
||||||
i2c_timeout_flag = I2C_OK;
|
i2c_timeout_flag = I2C_OK;
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
unlock();
|
unlock();
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *p_buffer, uint16_t number_of_byte) {
|
bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
|
||||||
if (!lock())
|
uint8_t *p_buffer, uint16_t number_of_byte) {
|
||||||
return false;
|
if (!lock())
|
||||||
|
return false;
|
||||||
|
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
|
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_EV);
|
i2c_interrupt_disable(I2C0, I2C_INT_EV);
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
|
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
|
||||||
dma_parameter_struct dma_init_struct;
|
dma_parameter_struct dma_init_struct;
|
||||||
|
|
||||||
uint8_t state = I2C_START;
|
uint8_t state = I2C_START;
|
||||||
uint16_t timeout = 0;
|
uint16_t timeout = 0;
|
||||||
bool done = false;
|
bool done = false;
|
||||||
bool timedout = false;
|
bool timedout = false;
|
||||||
while (!(done || timedout)) {
|
while (!(done || timedout)) {
|
||||||
switch (state) {
|
switch (state) {
|
||||||
case I2C_START:
|
case I2C_START:
|
||||||
/* i2c master sends start signal only when the bus is idle */
|
/* i2c master sends start signal only when the bus is idle */
|
||||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
|
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
if (timeout < I2C_TIME_OUT) {
|
||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_SEND_ADDRESS;
|
state = I2C_SEND_ADDRESS;
|
||||||
} else {
|
} else {
|
||||||
I2C_Unstick();
|
I2C_Unstick();
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case I2C_SEND_ADDRESS:
|
case I2C_SEND_ADDRESS:
|
||||||
/* i2c master sends START signal successfully */
|
/* i2c master sends START signal successfully */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) &&
|
||||||
timeout++;
|
(timeout < I2C_TIME_OUT)) {
|
||||||
}
|
timeout++;
|
||||||
if (timeout < I2C_TIME_OUT) {
|
}
|
||||||
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
|
||||||
state = I2C_CLEAR_ADDRESS_FLAG;
|
timeout = 0;
|
||||||
} else {
|
state = I2C_CLEAR_ADDRESS_FLAG;
|
||||||
timedout = true;
|
} else {
|
||||||
done = true;
|
timedout = true;
|
||||||
timeout = 0;
|
done = true;
|
||||||
state = I2C_START;
|
timeout = 0;
|
||||||
}
|
state = I2C_START;
|
||||||
break;
|
}
|
||||||
case I2C_CLEAR_ADDRESS_FLAG:
|
break;
|
||||||
/* address flag set means i2c slave sends ACK */
|
case I2C_CLEAR_ADDRESS_FLAG:
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
|
/* address flag set means i2c slave sends ACK */
|
||||||
timeout++;
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) &&
|
||||||
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
(timeout < I2C_TIME_OUT)) {
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
timeout++;
|
||||||
i2c_stop_on_bus(I2C0);
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
||||||
/* i2c master sends STOP signal successfully */
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
i2c_stop_on_bus(I2C0);
|
||||||
timeout++;
|
/* i2c master sends STOP signal successfully */
|
||||||
}
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
//Address NACK'd
|
timeout++;
|
||||||
unlock();
|
}
|
||||||
return false;
|
// Address NACK'd
|
||||||
}
|
unlock();
|
||||||
}
|
return false;
|
||||||
timeout = 0;
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
}
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
timeout = 0;
|
||||||
state = I2C_TRANSMIT_DATA;
|
if (timeout < I2C_TIME_OUT) {
|
||||||
} else {
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||||
//Dont retry as this means a NAK
|
state = I2C_TRANSMIT_DATA;
|
||||||
i2c_stop_on_bus(I2C0);
|
} else {
|
||||||
/* i2c master sends STOP signal successfully */
|
// Dont retry as this means a NAK
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
i2c_stop_on_bus(I2C0);
|
||||||
timeout++;
|
/* i2c master sends STOP signal successfully */
|
||||||
}
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
unlock();
|
timeout++;
|
||||||
return false;
|
}
|
||||||
}
|
unlock();
|
||||||
break;
|
return false;
|
||||||
case I2C_TRANSMIT_DATA:
|
}
|
||||||
/* wait until the transmit data buffer is empty */
|
break;
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT )) {
|
case I2C_TRANSMIT_DATA:
|
||||||
timeout++;
|
/* wait until the transmit data buffer is empty */
|
||||||
}
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_TBE)) && (timeout < I2C_TIME_OUT)) {
|
||||||
if (timeout < I2C_TIME_OUT) {
|
timeout++;
|
||||||
/* send the EEPROM's internal address to write to : only one byte address */
|
}
|
||||||
i2c_data_transmit(I2C0, MemAddress);
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
/* send the EEPROM's internal address to write to : only one byte
|
||||||
} else {
|
* address */
|
||||||
timedout = true;
|
i2c_data_transmit(I2C0, MemAddress);
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_START;
|
} else {
|
||||||
}
|
timedout = true;
|
||||||
/* wait until BTC bit is set */
|
timeout = 0;
|
||||||
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
|
state = I2C_START;
|
||||||
;
|
}
|
||||||
dma_deinit(DMA0, DMA_CH5);
|
/* wait until BTC bit is set */
|
||||||
dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
|
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
|
||||||
dma_init_struct.memory_addr = (uint32_t) p_buffer;
|
;
|
||||||
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
dma_deinit(DMA0, DMA_CH5);
|
||||||
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
|
dma_init_struct.direction = DMA_MEMORY_TO_PERIPHERAL;
|
||||||
dma_init_struct.number = number_of_byte;
|
dma_init_struct.memory_addr = (uint32_t)p_buffer;
|
||||||
dma_init_struct.periph_addr = (uint32_t) &I2C_DATA(I2C0);
|
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
||||||
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
|
||||||
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
dma_init_struct.number = number_of_byte;
|
||||||
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
dma_init_struct.periph_addr = (uint32_t)&I2C_DATA(I2C0);
|
||||||
dma_init(DMA0, DMA_CH5, &dma_init_struct);
|
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
||||||
/* enable I2C0 DMA */
|
dma_init_struct.periph_width = DMA_PERIPHERAL_WIDTH_8BIT;
|
||||||
i2c_dma_enable(I2C0, I2C_DMA_ON);
|
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
||||||
/* enable DMA0 channel5 */
|
dma_init(DMA0, DMA_CH5, &dma_init_struct);
|
||||||
dma_channel_enable(DMA0, DMA_CH5);
|
/* enable I2C0 DMA */
|
||||||
/* wait until BTC bit is set */
|
i2c_dma_enable(I2C0, I2C_DMA_ON);
|
||||||
while (!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
|
/* enable DMA0 channel5 */
|
||||||
osDelay(1);
|
dma_channel_enable(DMA0, DMA_CH5);
|
||||||
}
|
/* wait until BTC bit is set */
|
||||||
/* wait until BTC bit is set */
|
while (!dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
|
||||||
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
|
osDelay(1);
|
||||||
;
|
}
|
||||||
state = I2C_STOP;
|
/* wait until BTC bit is set */
|
||||||
break;
|
while (!i2c_flag_get(I2C0, I2C_FLAG_BTC))
|
||||||
case I2C_STOP:
|
;
|
||||||
/* send a stop condition to I2C bus */
|
state = I2C_STOP;
|
||||||
i2c_stop_on_bus(I2C0);
|
break;
|
||||||
/* i2c master sends STOP signal successfully */
|
case I2C_STOP:
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
/* send a stop condition to I2C bus */
|
||||||
timeout++;
|
i2c_stop_on_bus(I2C0);
|
||||||
}
|
/* i2c master sends STOP signal successfully */
|
||||||
if (timeout < I2C_TIME_OUT) {
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout = 0;
|
timeout++;
|
||||||
state = I2C_END;
|
}
|
||||||
done = true;
|
if (timeout < I2C_TIME_OUT) {
|
||||||
} else {
|
timeout = 0;
|
||||||
timedout = true;
|
state = I2C_END;
|
||||||
done = true;
|
done = true;
|
||||||
timeout = 0;
|
} else {
|
||||||
state = I2C_START;
|
timedout = true;
|
||||||
}
|
done = true;
|
||||||
break;
|
timeout = 0;
|
||||||
default:
|
state = I2C_START;
|
||||||
state = I2C_START;
|
}
|
||||||
timeout = 0;
|
break;
|
||||||
break;
|
default:
|
||||||
}
|
state = I2C_START;
|
||||||
}
|
timeout = 0;
|
||||||
unlock();
|
break;
|
||||||
return timedout == false;
|
}
|
||||||
|
}
|
||||||
|
unlock();
|
||||||
|
return timedout == false;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool FRToSI2C::Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size) {
|
bool FRToSI2C::Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size) {
|
||||||
return Mem_Write(DevAddress, pData[0], pData + 1, Size - 1);
|
return Mem_Write(DevAddress, pData[0], pData + 1, Size - 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
bool FRToSI2C::probe(uint16_t DevAddress) {
|
bool FRToSI2C::probe(uint16_t DevAddress) {
|
||||||
uint8_t temp[1];
|
uint8_t temp[1];
|
||||||
return Mem_Read(DevAddress, 0x00, temp, sizeof(temp));
|
return Mem_Read(DevAddress, 0x00, temp, sizeof(temp));
|
||||||
}
|
}
|
||||||
|
|
||||||
void FRToSI2C::I2C_Unstick() {
|
void FRToSI2C::I2C_Unstick() { unstick_I2C(); }
|
||||||
unstick_I2C();
|
|
||||||
}
|
|
||||||
|
|
||||||
bool FRToSI2C::lock() {
|
bool FRToSI2C::lock() {
|
||||||
if (I2CSemaphore == nullptr) {
|
if (I2CSemaphore == nullptr) {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
return xSemaphoreTake(I2CSemaphore, 1000) == pdTRUE;
|
return xSemaphoreTake(I2CSemaphore, 1000) == pdTRUE;
|
||||||
}
|
}
|
||||||
|
|
||||||
void FRToSI2C::unlock() {
|
void FRToSI2C::unlock() { xSemaphoreGive(I2CSemaphore); }
|
||||||
xSemaphoreGive(I2CSemaphore);
|
|
||||||
}
|
|
||||||
|
|
||||||
bool FRToSI2C::writeRegistersBulk(const uint8_t address, const I2C_REG *registers, const uint8_t registersLength) {
|
bool FRToSI2C::writeRegistersBulk(const uint8_t address,
|
||||||
for (int index = 0; index < registersLength; index++) {
|
const I2C_REG *registers,
|
||||||
if (!I2C_RegisterWrite(address, registers[index].reg, registers[index].val)) {
|
const uint8_t registersLength) {
|
||||||
return false;
|
for (int index = 0; index < registersLength; index++) {
|
||||||
}
|
if (!I2C_RegisterWrite(address, registers[index].reg,
|
||||||
if (registers[index].pause_ms) {
|
registers[index].val)) {
|
||||||
delay_ms(registers[index].pause_ms);
|
return false;
|
||||||
}
|
}
|
||||||
}
|
if (registers[index].pause_ms) {
|
||||||
return true;
|
delay_ms(registers[index].pause_ms);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool FRToSI2C::wakePart(uint16_t DevAddress) {
|
bool FRToSI2C::wakePart(uint16_t DevAddress) {
|
||||||
//wakepart is a special case where only the device address is sent
|
// wakepart is a special case where only the device address is sent
|
||||||
if (!lock())
|
if (!lock())
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
|
i2c_interrupt_disable(I2C0, I2C_INT_ERR);
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_EV);
|
i2c_interrupt_disable(I2C0, I2C_INT_EV);
|
||||||
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
|
i2c_interrupt_disable(I2C0, I2C_INT_BUF);
|
||||||
dma_parameter_struct dma_init_struct;
|
|
||||||
|
|
||||||
uint8_t state = I2C_START;
|
uint8_t state = I2C_START;
|
||||||
uint16_t timeout = 0;
|
uint16_t timeout = 0;
|
||||||
bool done = false;
|
bool done = false;
|
||||||
bool timedout = false;
|
bool timedout = false;
|
||||||
while (!(done || timedout)) {
|
while (!(done || timedout)) {
|
||||||
switch (state) {
|
switch (state) {
|
||||||
case I2C_START:
|
case I2C_START:
|
||||||
/* i2c master sends start signal only when the bus is idle */
|
/* i2c master sends start signal only when the bus is idle */
|
||||||
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
|
while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
if (timeout < I2C_TIME_OUT) {
|
||||||
i2c_start_on_bus(I2C0);
|
i2c_start_on_bus(I2C0);
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_SEND_ADDRESS;
|
state = I2C_SEND_ADDRESS;
|
||||||
} else {
|
} else {
|
||||||
I2C_Unstick();
|
I2C_Unstick();
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case I2C_SEND_ADDRESS:
|
case I2C_SEND_ADDRESS:
|
||||||
/* i2c master sends START signal successfully */
|
/* i2c master sends START signal successfully */
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) &&
|
||||||
timeout++;
|
(timeout < I2C_TIME_OUT)) {
|
||||||
}
|
timeout++;
|
||||||
if (timeout < I2C_TIME_OUT) {
|
}
|
||||||
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
|
||||||
state = I2C_CLEAR_ADDRESS_FLAG;
|
timeout = 0;
|
||||||
} else {
|
state = I2C_CLEAR_ADDRESS_FLAG;
|
||||||
timedout = true;
|
} else {
|
||||||
done = true;
|
timedout = true;
|
||||||
timeout = 0;
|
done = true;
|
||||||
state = I2C_START;
|
timeout = 0;
|
||||||
}
|
state = I2C_START;
|
||||||
break;
|
}
|
||||||
case I2C_CLEAR_ADDRESS_FLAG:
|
break;
|
||||||
/* address flag set means i2c slave sends ACK */
|
case I2C_CLEAR_ADDRESS_FLAG:
|
||||||
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
|
/* address flag set means i2c slave sends ACK */
|
||||||
timeout++;
|
while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) &&
|
||||||
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
(timeout < I2C_TIME_OUT)) {
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
timeout++;
|
||||||
i2c_stop_on_bus(I2C0);
|
if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
|
||||||
/* i2c master sends STOP signal successfully */
|
i2c_flag_clear(I2C0, I2C_FLAG_AERR);
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
i2c_stop_on_bus(I2C0);
|
||||||
timeout++;
|
/* i2c master sends STOP signal successfully */
|
||||||
}
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
//Address NACK'd
|
timeout++;
|
||||||
unlock();
|
}
|
||||||
return false;
|
// Address NACK'd
|
||||||
}
|
unlock();
|
||||||
}
|
return false;
|
||||||
if (timeout < I2C_TIME_OUT) {
|
}
|
||||||
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
}
|
||||||
timeout = 0;
|
if (timeout < I2C_TIME_OUT) {
|
||||||
state = I2C_STOP;
|
i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
|
||||||
} else {
|
timeout = 0;
|
||||||
//Dont retry as this means a NAK
|
state = I2C_STOP;
|
||||||
i2c_stop_on_bus(I2C0);
|
} else {
|
||||||
/* i2c master sends STOP signal successfully */
|
// Dont retry as this means a NAK
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
i2c_stop_on_bus(I2C0);
|
||||||
timeout++;
|
/* i2c master sends STOP signal successfully */
|
||||||
}
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
unlock();
|
timeout++;
|
||||||
return false;
|
}
|
||||||
}
|
unlock();
|
||||||
break;
|
return false;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
case I2C_STOP:
|
case I2C_STOP:
|
||||||
/* send a stop condition to I2C bus */
|
/* send a stop condition to I2C bus */
|
||||||
i2c_stop_on_bus(I2C0);
|
i2c_stop_on_bus(I2C0);
|
||||||
/* i2c master sends STOP signal successfully */
|
/* i2c master sends STOP signal successfully */
|
||||||
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
|
while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT)) {
|
||||||
timeout++;
|
timeout++;
|
||||||
}
|
}
|
||||||
if (timeout < I2C_TIME_OUT) {
|
if (timeout < I2C_TIME_OUT) {
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_END;
|
state = I2C_END;
|
||||||
done = true;
|
done = true;
|
||||||
} else {
|
} else {
|
||||||
timedout = true;
|
timedout = true;
|
||||||
done = true;
|
done = true;
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
state = I2C_START;
|
state = I2C_START;
|
||||||
timeout = 0;
|
timeout = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
unlock();
|
unlock();
|
||||||
return timedout == false;
|
return timedout == false;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -8,11 +8,13 @@
|
|||||||
#include "BSP.h"
|
#include "BSP.h"
|
||||||
#include "Pins.h"
|
#include "Pins.h"
|
||||||
#include "gd32vf103.h"
|
#include "gd32vf103.h"
|
||||||
#include <string.h>
|
|
||||||
#include "systick.h"
|
#include "systick.h"
|
||||||
|
#include <string.h>
|
||||||
#define ADC_NORM_CHANNELS 2
|
#define ADC_NORM_CHANNELS 2
|
||||||
#define ADC_NORM_SAMPLES 32
|
#define ADC_NORM_SAMPLES 32
|
||||||
uint16_t ADCReadings[ADC_NORM_SAMPLES * ADC_NORM_CHANNELS]; // room for 32 lots of the pair of readings
|
uint16_t
|
||||||
|
ADCReadings[ADC_NORM_SAMPLES *
|
||||||
|
ADC_NORM_CHANNELS]; // room for 32 lots of the pair of readings
|
||||||
|
|
||||||
// Functions
|
// Functions
|
||||||
void setup_gpio();
|
void setup_gpio();
|
||||||
@@ -23,272 +25,275 @@ void setup_timers();
|
|||||||
void setup_iwdg();
|
void setup_iwdg();
|
||||||
|
|
||||||
void hardware_init() {
|
void hardware_init() {
|
||||||
|
// GPIO
|
||||||
|
setup_gpio();
|
||||||
|
// DMA
|
||||||
|
setup_dma();
|
||||||
|
// I2C
|
||||||
|
setup_i2c();
|
||||||
|
// ADC's
|
||||||
|
setup_adc();
|
||||||
|
// Timers
|
||||||
|
setup_timers();
|
||||||
|
// Watchdog
|
||||||
|
setup_iwdg();
|
||||||
|
|
||||||
//GPIO
|
/* enable TIMER1 - PWM control timing*/
|
||||||
setup_gpio();
|
timer_enable(TIMER1);
|
||||||
//DMA
|
timer_enable(TIMER2);
|
||||||
setup_dma();
|
eclic_priority_group_set(ECLIC_PRIGROUP_LEVEL4_PRIO0);
|
||||||
//I2C
|
eclic_global_interrupt_enable();
|
||||||
setup_i2c();
|
|
||||||
//ADC's
|
|
||||||
setup_adc();
|
|
||||||
//Timers
|
|
||||||
setup_timers();
|
|
||||||
//Watchdog
|
|
||||||
setup_iwdg();
|
|
||||||
|
|
||||||
/* enable TIMER1 - PWM control timing*/
|
|
||||||
timer_enable(TIMER1);
|
|
||||||
timer_enable(TIMER2);
|
|
||||||
eclic_priority_group_set(ECLIC_PRIGROUP_LEVEL4_PRIO0);
|
|
||||||
eclic_global_interrupt_enable();
|
|
||||||
}
|
}
|
||||||
// channel 0 -> temperature sensor, 1-> VIN
|
// channel 0 -> temperature sensor, 1-> VIN
|
||||||
uint16_t getADC(uint8_t channel) {
|
uint16_t getADC(uint8_t channel) {
|
||||||
uint32_t sum = 0;
|
uint32_t sum = 0;
|
||||||
for (uint8_t i = 0; i < ADC_NORM_SAMPLES; i++)
|
for (uint8_t i = 0; i < ADC_NORM_SAMPLES; i++)
|
||||||
sum += ADCReadings[channel + (i * ADC_NORM_CHANNELS)];
|
sum += ADCReadings[channel + (i * ADC_NORM_CHANNELS)];
|
||||||
return sum >> 2;
|
return sum >> 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
void setup_gpio() {
|
void setup_gpio() {
|
||||||
/* enable GPIOB clock */
|
/* enable GPIOB clock */
|
||||||
rcu_periph_clock_enable(RCU_GPIOA);
|
rcu_periph_clock_enable(RCU_GPIOA);
|
||||||
/* enable GPIOB clock */
|
/* enable GPIOB clock */
|
||||||
rcu_periph_clock_enable(RCU_GPIOB);
|
rcu_periph_clock_enable(RCU_GPIOB);
|
||||||
//Alternate function clock enable
|
// Alternate function clock enable
|
||||||
rcu_periph_clock_enable(RCU_AF);
|
rcu_periph_clock_enable(RCU_AF);
|
||||||
//Buttons as input
|
// Buttons as input
|
||||||
gpio_init(KEY_A_GPIO_Port, GPIO_MODE_IPD, GPIO_OSPEED_2MHZ, KEY_A_Pin);
|
gpio_init(KEY_A_GPIO_Port, GPIO_MODE_IPD, GPIO_OSPEED_2MHZ, KEY_A_Pin);
|
||||||
gpio_init(KEY_B_GPIO_Port, GPIO_MODE_IPD, GPIO_OSPEED_2MHZ, KEY_B_Pin);
|
gpio_init(KEY_B_GPIO_Port, GPIO_MODE_IPD, GPIO_OSPEED_2MHZ, KEY_B_Pin);
|
||||||
//OLED reset as output
|
// OLED reset as output
|
||||||
gpio_init(OLED_RESET_GPIO_Port, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ,
|
gpio_init(OLED_RESET_GPIO_Port, GPIO_MODE_OUT_PP, GPIO_OSPEED_2MHZ,
|
||||||
OLED_RESET_Pin);
|
OLED_RESET_Pin);
|
||||||
//I2C as AF Open Drain
|
// I2C as AF Open Drain
|
||||||
gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, SDA_Pin | SCL_Pin);
|
gpio_init(SDA_GPIO_Port, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ,
|
||||||
//PWM output as AF Push Pull
|
SDA_Pin | SCL_Pin);
|
||||||
gpio_init(PWM_Out_GPIO_Port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ,
|
// PWM output as AF Push Pull
|
||||||
PWM_Out_Pin);
|
gpio_init(PWM_Out_GPIO_Port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, PWM_Out_Pin);
|
||||||
//Analog Inputs ... as analog inputs
|
// Analog Inputs ... as analog inputs
|
||||||
gpio_init(TMP36_INPUT_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ,
|
gpio_init(TMP36_INPUT_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ,
|
||||||
TMP36_INPUT_Pin);
|
TMP36_INPUT_Pin);
|
||||||
gpio_init(TIP_TEMP_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ,
|
gpio_init(TIP_TEMP_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, TIP_TEMP_Pin);
|
||||||
TIP_TEMP_Pin);
|
gpio_init(VIN_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, VIN_Pin);
|
||||||
gpio_init(VIN_GPIO_Port, GPIO_MODE_AIN, GPIO_OSPEED_50MHZ, VIN_Pin);
|
|
||||||
|
|
||||||
//Remap PB4 away from JTAG NJRST
|
// Remap PB4 away from JTAG NJRST
|
||||||
gpio_pin_remap_config(GPIO_SWJ_NONJTRST_REMAP, ENABLE);
|
gpio_pin_remap_config(GPIO_SWJ_NONJTRST_REMAP, ENABLE);
|
||||||
|
|
||||||
//TODO - rest of pins as floating
|
// TODO - rest of pins as floating
|
||||||
}
|
}
|
||||||
void setup_dma() {
|
void setup_dma() {
|
||||||
//Setup DMA for ADC0
|
// Setup DMA for ADC0
|
||||||
{
|
{
|
||||||
/* enable DMA0 clock */
|
/* enable DMA0 clock */
|
||||||
rcu_periph_clock_enable(RCU_DMA0);
|
rcu_periph_clock_enable(RCU_DMA0);
|
||||||
rcu_periph_clock_enable(RCU_DMA1);
|
rcu_periph_clock_enable(RCU_DMA1);
|
||||||
/* ADC_DMA_channel configuration */
|
/* ADC_DMA_channel configuration */
|
||||||
dma_parameter_struct dma_data_parameter;
|
dma_parameter_struct dma_data_parameter;
|
||||||
|
|
||||||
/* ADC DMA_channel configuration */
|
/* ADC DMA_channel configuration */
|
||||||
dma_deinit(DMA0, DMA_CH0);
|
dma_deinit(DMA0, DMA_CH0);
|
||||||
|
|
||||||
/* initialize DMA data mode */
|
/* initialize DMA data mode */
|
||||||
dma_data_parameter.periph_addr = (uint32_t) (&ADC_RDATA(ADC0));
|
dma_data_parameter.periph_addr = (uint32_t)(&ADC_RDATA(ADC0));
|
||||||
dma_data_parameter.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
dma_data_parameter.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
||||||
dma_data_parameter.memory_addr = (uint32_t) (ADCReadings);
|
dma_data_parameter.memory_addr = (uint32_t)(ADCReadings);
|
||||||
dma_data_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
dma_data_parameter.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
||||||
dma_data_parameter.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
|
dma_data_parameter.periph_width = DMA_PERIPHERAL_WIDTH_16BIT;
|
||||||
dma_data_parameter.memory_width = DMA_MEMORY_WIDTH_16BIT;
|
dma_data_parameter.memory_width = DMA_MEMORY_WIDTH_16BIT;
|
||||||
dma_data_parameter.direction = DMA_PERIPHERAL_TO_MEMORY;
|
dma_data_parameter.direction = DMA_PERIPHERAL_TO_MEMORY;
|
||||||
dma_data_parameter.number = ADC_NORM_SAMPLES * ADC_NORM_CHANNELS;
|
dma_data_parameter.number = ADC_NORM_SAMPLES * ADC_NORM_CHANNELS;
|
||||||
dma_data_parameter.priority = DMA_PRIORITY_HIGH;
|
dma_data_parameter.priority = DMA_PRIORITY_HIGH;
|
||||||
dma_init(DMA0, DMA_CH0, &dma_data_parameter);
|
dma_init(DMA0, DMA_CH0, &dma_data_parameter);
|
||||||
|
|
||||||
dma_circulation_enable(DMA0, DMA_CH0);
|
dma_circulation_enable(DMA0, DMA_CH0);
|
||||||
|
|
||||||
/* enable DMA channel */
|
/* enable DMA channel */
|
||||||
dma_channel_enable(DMA0, DMA_CH0);
|
dma_channel_enable(DMA0, DMA_CH0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
void setup_i2c() {
|
void setup_i2c() {
|
||||||
/* enable I2C0 clock */
|
/* enable I2C0 clock */
|
||||||
rcu_periph_clock_enable(RCU_I2C0);
|
rcu_periph_clock_enable(RCU_I2C0);
|
||||||
//Setup I20 at 400kHz
|
// Setup I20 at 400kHz
|
||||||
i2c_clock_config(I2C0, 400 * 1000, I2C_DTCY_16_9);
|
i2c_clock_config(I2C0, 400 * 1000, I2C_DTCY_16_9);
|
||||||
i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0x00);
|
i2c_mode_addr_config(I2C0, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, 0x00);
|
||||||
i2c_enable(I2C0);
|
i2c_enable(I2C0);
|
||||||
/* enable acknowledge */
|
/* enable acknowledge */
|
||||||
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
i2c_ack_config(I2C0, I2C_ACK_ENABLE);
|
||||||
eclic_irq_enable(I2C0_EV_IRQn, 1, 0);
|
eclic_irq_enable(I2C0_EV_IRQn, 1, 0);
|
||||||
eclic_irq_enable(I2C0_ER_IRQn, 2, 0);
|
eclic_irq_enable(I2C0_ER_IRQn, 2, 0);
|
||||||
}
|
}
|
||||||
void setup_adc() {
|
void setup_adc() {
|
||||||
|
|
||||||
//Setup ADC in normal + injected mode
|
// Setup ADC in normal + injected mode
|
||||||
//Want it to sample handle temp and input voltage normally via dma
|
// Want it to sample handle temp and input voltage normally via dma
|
||||||
//Then injected trigger to sample tip temp
|
// Then injected trigger to sample tip temp
|
||||||
memset(ADCReadings, 0, sizeof(ADCReadings));
|
memset(ADCReadings, 0, sizeof(ADCReadings));
|
||||||
rcu_periph_clock_enable(RCU_ADC0);
|
rcu_periph_clock_enable(RCU_ADC0);
|
||||||
rcu_periph_clock_enable(RCU_ADC1);
|
rcu_periph_clock_enable(RCU_ADC1);
|
||||||
adc_deinit(ADC0);
|
adc_deinit(ADC0);
|
||||||
adc_deinit(ADC1);
|
adc_deinit(ADC1);
|
||||||
/* config ADC clock */
|
/* config ADC clock */
|
||||||
rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV16);
|
rcu_adc_clock_config(RCU_CKADC_CKAPB2_DIV16);
|
||||||
//Run in normal parallel + inserted parallel
|
// Run in normal parallel + inserted parallel
|
||||||
adc_mode_config(ADC_DAUL_REGULAL_PARALLEL_INSERTED_PARALLEL);
|
adc_mode_config(ADC_DAUL_REGULAL_PARALLEL_INSERTED_PARALLEL);
|
||||||
adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
|
adc_special_function_config(ADC0, ADC_CONTINUOUS_MODE, ENABLE);
|
||||||
adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
|
adc_special_function_config(ADC0, ADC_SCAN_MODE, ENABLE);
|
||||||
adc_special_function_config(ADC1, ADC_CONTINUOUS_MODE, ENABLE);
|
adc_special_function_config(ADC1, ADC_CONTINUOUS_MODE, ENABLE);
|
||||||
adc_special_function_config(ADC1, ADC_SCAN_MODE, ENABLE);
|
adc_special_function_config(ADC1, ADC_SCAN_MODE, ENABLE);
|
||||||
//Align right
|
// Align right
|
||||||
adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
|
adc_data_alignment_config(ADC0, ADC_DATAALIGN_RIGHT);
|
||||||
adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
|
adc_data_alignment_config(ADC1, ADC_DATAALIGN_RIGHT);
|
||||||
//Setup reading 2 channels on regular mode (Handle Temp + dc in)
|
// Setup reading 2 channels on regular mode (Handle Temp + dc in)
|
||||||
adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC_NORM_CHANNELS);
|
adc_channel_length_config(ADC0, ADC_REGULAR_CHANNEL, ADC_NORM_CHANNELS);
|
||||||
adc_channel_length_config(ADC1, ADC_REGULAR_CHANNEL, ADC_NORM_CHANNELS);
|
adc_channel_length_config(ADC1, ADC_REGULAR_CHANNEL, ADC_NORM_CHANNELS);
|
||||||
//Setup the two channels
|
// Setup the two channels
|
||||||
adc_regular_channel_config(ADC0, 0, TMP36_ADC0_CHANNEL, ADC_SAMPLETIME_71POINT5); //temp sensor
|
adc_regular_channel_config(ADC0, 0, TMP36_ADC0_CHANNEL,
|
||||||
adc_regular_channel_config(ADC1, 0, TMP36_ADC1_CHANNEL, ADC_SAMPLETIME_71POINT5); //temp sensor
|
ADC_SAMPLETIME_71POINT5); // temp sensor
|
||||||
adc_regular_channel_config(ADC0, 1, VIN_ADC0_CHANNEL, ADC_SAMPLETIME_71POINT5); //DC Input voltage
|
adc_regular_channel_config(ADC1, 0, TMP36_ADC1_CHANNEL,
|
||||||
adc_regular_channel_config(ADC1, 1, VIN_ADC1_CHANNEL, ADC_SAMPLETIME_71POINT5); //DC Input voltage
|
ADC_SAMPLETIME_71POINT5); // temp sensor
|
||||||
//Setup that we want all 4 inserted readings to be the tip temp
|
adc_regular_channel_config(ADC0, 1, VIN_ADC0_CHANNEL,
|
||||||
adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 4);
|
ADC_SAMPLETIME_71POINT5); // DC Input voltage
|
||||||
adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 4);
|
adc_regular_channel_config(ADC1, 1, VIN_ADC1_CHANNEL,
|
||||||
for (int rank = 0; rank < 4; rank++) {
|
ADC_SAMPLETIME_71POINT5); // DC Input voltage
|
||||||
adc_inserted_channel_config(ADC0, rank, TIP_TEMP_ADC0_CHANNEL, ADC_SAMPLETIME_1POINT5);
|
// Setup that we want all 4 inserted readings to be the tip temp
|
||||||
adc_inserted_channel_config(ADC1, rank, TIP_TEMP_ADC1_CHANNEL, ADC_SAMPLETIME_1POINT5);
|
adc_channel_length_config(ADC0, ADC_INSERTED_CHANNEL, 4);
|
||||||
}
|
adc_channel_length_config(ADC1, ADC_INSERTED_CHANNEL, 4);
|
||||||
//Setup timer 1 channel 0 to trigger injected measurements
|
for (int rank = 0; rank < 4; rank++) {
|
||||||
adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL, ADC0_1_EXTTRIG_INSERTED_T1_CH0);
|
adc_inserted_channel_config(ADC0, rank, TIP_TEMP_ADC0_CHANNEL,
|
||||||
adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL, ADC0_1_EXTTRIG_INSERTED_T1_CH0);
|
ADC_SAMPLETIME_1POINT5);
|
||||||
|
adc_inserted_channel_config(ADC1, rank, TIP_TEMP_ADC1_CHANNEL,
|
||||||
|
ADC_SAMPLETIME_1POINT5);
|
||||||
|
}
|
||||||
|
// Setup timer 1 channel 0 to trigger injected measurements
|
||||||
|
adc_external_trigger_source_config(ADC0, ADC_INSERTED_CHANNEL,
|
||||||
|
ADC0_1_EXTTRIG_INSERTED_T1_CH0);
|
||||||
|
adc_external_trigger_source_config(ADC1, ADC_INSERTED_CHANNEL,
|
||||||
|
ADC0_1_EXTTRIG_INSERTED_T1_CH0);
|
||||||
|
|
||||||
adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL, ADC0_1_EXTTRIG_REGULAR_NONE);
|
adc_external_trigger_source_config(ADC0, ADC_REGULAR_CHANNEL,
|
||||||
adc_external_trigger_source_config(ADC1, ADC_REGULAR_CHANNEL, ADC0_1_EXTTRIG_REGULAR_NONE);
|
ADC0_1_EXTTRIG_REGULAR_NONE);
|
||||||
// Enable triggers for the ADC
|
adc_external_trigger_source_config(ADC1, ADC_REGULAR_CHANNEL,
|
||||||
adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
|
ADC0_1_EXTTRIG_REGULAR_NONE);
|
||||||
adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
|
// Enable triggers for the ADC
|
||||||
adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
|
adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);
|
||||||
adc_external_trigger_config(ADC1, ADC_REGULAR_CHANNEL, ENABLE);
|
adc_external_trigger_config(ADC1, ADC_INSERTED_CHANNEL, ENABLE);
|
||||||
|
adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
|
||||||
|
adc_external_trigger_config(ADC1, ADC_REGULAR_CHANNEL, ENABLE);
|
||||||
|
|
||||||
adc_watchdog_disable(ADC0);
|
adc_watchdog_disable(ADC0);
|
||||||
adc_watchdog_disable(ADC1);
|
adc_watchdog_disable(ADC1);
|
||||||
adc_resolution_config(ADC0, ADC_RESOLUTION_12B);
|
adc_resolution_config(ADC0, ADC_RESOLUTION_12B);
|
||||||
adc_resolution_config(ADC1, ADC_RESOLUTION_12B);
|
adc_resolution_config(ADC1, ADC_RESOLUTION_12B);
|
||||||
/* clear the ADC flag */
|
/* clear the ADC flag */
|
||||||
adc_oversample_mode_disable(ADC0);
|
adc_oversample_mode_disable(ADC0);
|
||||||
adc_oversample_mode_disable(ADC1);
|
adc_oversample_mode_disable(ADC1);
|
||||||
adc_enable(ADC0);
|
adc_enable(ADC0);
|
||||||
delay_1ms(1);
|
adc_calibration_enable(ADC0);
|
||||||
adc_calibration_enable(ADC0);
|
adc_enable(ADC1);
|
||||||
adc_enable(ADC1);
|
adc_calibration_enable(ADC1);
|
||||||
delay_1ms(1);
|
adc_dma_mode_enable(ADC0);
|
||||||
adc_calibration_enable(ADC1);
|
// Enable interrupt on end of injected readings
|
||||||
delay_1ms(1);
|
adc_interrupt_flag_clear(ADC0, ADC_INT_FLAG_EOC);
|
||||||
adc_dma_mode_enable(ADC0);
|
adc_interrupt_flag_clear(ADC0, ADC_INT_FLAG_EOIC);
|
||||||
//Enable interrupt on end of injected readings
|
adc_interrupt_enable(ADC0, ADC_INT_EOIC);
|
||||||
adc_interrupt_flag_clear(ADC0, ADC_INT_FLAG_EOC);
|
eclic_irq_enable(ADC0_1_IRQn, 2, 0);
|
||||||
adc_interrupt_flag_clear(ADC0, ADC_INT_FLAG_EOIC);
|
adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
|
||||||
adc_interrupt_enable(ADC0, ADC_INT_EOIC);
|
adc_software_trigger_enable(ADC1, ADC_REGULAR_CHANNEL);
|
||||||
eclic_irq_enable(ADC0_1_IRQn, 2, 0);
|
adc_tempsensor_vrefint_disable();
|
||||||
adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL);
|
|
||||||
adc_software_trigger_enable(ADC1, ADC_REGULAR_CHANNEL);
|
|
||||||
adc_tempsensor_vrefint_disable();
|
|
||||||
}
|
}
|
||||||
void setup_timers() {
|
void setup_timers() {
|
||||||
//Setup timer 1 to run the actual PWM level
|
// Setup timer 1 to run the actual PWM level
|
||||||
/* enable timer1 clock */
|
/* enable timer1 clock */
|
||||||
rcu_periph_clock_enable(RCU_TIMER1);
|
rcu_periph_clock_enable(RCU_TIMER1);
|
||||||
rcu_periph_clock_enable(RCU_TIMER2);
|
rcu_periph_clock_enable(RCU_TIMER2);
|
||||||
timer_oc_parameter_struct timer_ocintpara;
|
timer_oc_parameter_struct timer_ocintpara;
|
||||||
timer_parameter_struct timer_initpara;
|
timer_parameter_struct timer_initpara;
|
||||||
{
|
{
|
||||||
//deinit to reset the timer
|
// deinit to reset the timer
|
||||||
timer_deinit(TIMER1);
|
timer_deinit(TIMER1);
|
||||||
/* initialize TIMER init parameter struct */
|
/* initialize TIMER init parameter struct */
|
||||||
timer_struct_para_init(&timer_initpara);
|
timer_struct_para_init(&timer_initpara);
|
||||||
/* TIMER1 configuration */
|
/* TIMER1 configuration */
|
||||||
timer_initpara.prescaler = 24000;
|
timer_initpara.prescaler = 24000;
|
||||||
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
|
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
|
||||||
timer_initpara.counterdirection = TIMER_COUNTER_UP;
|
timer_initpara.counterdirection = TIMER_COUNTER_UP;
|
||||||
timer_initpara.period = powerPWM + tempMeasureTicks;
|
timer_initpara.period = powerPWM + tempMeasureTicks;
|
||||||
timer_initpara.clockdivision = TIMER_CKDIV_DIV4;
|
timer_initpara.clockdivision = TIMER_CKDIV_DIV4;
|
||||||
timer_initpara.repetitioncounter = 0;
|
timer_initpara.repetitioncounter = 0;
|
||||||
timer_init(TIMER1, &timer_initpara);
|
timer_init(TIMER1, &timer_initpara);
|
||||||
|
|
||||||
/* CH0 configured to implement the PWM irq's for the output control*/
|
/* CH0 configured to implement the PWM irq's for the output control*/
|
||||||
timer_channel_output_struct_para_init(&timer_ocintpara);
|
timer_channel_output_struct_para_init(&timer_ocintpara);
|
||||||
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
||||||
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
||||||
timer_channel_output_config(TIMER1, TIMER_CH_0, &timer_ocintpara);
|
timer_channel_output_config(TIMER1, TIMER_CH_0, &timer_ocintpara);
|
||||||
|
|
||||||
timer_channel_output_pulse_value_config(TIMER1, TIMER_CH_0, powerPWM + holdoffTicks);
|
timer_channel_output_pulse_value_config(TIMER1, TIMER_CH_0,
|
||||||
timer_channel_output_mode_config(TIMER1, TIMER_CH_0,
|
powerPWM + holdoffTicks);
|
||||||
TIMER_OC_MODE_PWM1);
|
timer_channel_output_mode_config(TIMER1, TIMER_CH_0, TIMER_OC_MODE_PWM1);
|
||||||
timer_channel_output_shadow_config(TIMER1, TIMER_CH_0,
|
timer_channel_output_shadow_config(TIMER1, TIMER_CH_0,
|
||||||
TIMER_OC_SHADOW_DISABLE);
|
TIMER_OC_SHADOW_DISABLE);
|
||||||
/* CH1 used for irq */
|
/* CH1 used for irq */
|
||||||
timer_channel_output_struct_para_init(&timer_ocintpara);
|
timer_channel_output_struct_para_init(&timer_ocintpara);
|
||||||
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
||||||
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
||||||
timer_channel_output_config(TIMER1, TIMER_CH_1, &timer_ocintpara);
|
timer_channel_output_config(TIMER1, TIMER_CH_1, &timer_ocintpara);
|
||||||
|
|
||||||
timer_channel_output_pulse_value_config(TIMER1, TIMER_CH_1, 0);
|
timer_channel_output_pulse_value_config(TIMER1, TIMER_CH_1, 0);
|
||||||
timer_channel_output_mode_config(TIMER1, TIMER_CH_1,
|
timer_channel_output_mode_config(TIMER1, TIMER_CH_1, TIMER_OC_MODE_PWM0);
|
||||||
TIMER_OC_MODE_PWM0);
|
timer_channel_output_shadow_config(TIMER1, TIMER_CH_1,
|
||||||
timer_channel_output_shadow_config(TIMER1, TIMER_CH_1,
|
TIMER_OC_SHADOW_DISABLE);
|
||||||
TIMER_OC_SHADOW_DISABLE);
|
// IRQ
|
||||||
//IRQ
|
timer_interrupt_enable(TIMER1, TIMER_INT_UP);
|
||||||
timer_interrupt_enable(TIMER1, TIMER_INT_UP);
|
timer_interrupt_enable(TIMER1, TIMER_INT_CH1);
|
||||||
timer_interrupt_enable(TIMER1, TIMER_INT_CH1);
|
}
|
||||||
|
|
||||||
}
|
eclic_irq_enable(TIMER1_IRQn, 2, 5);
|
||||||
|
// Setup timer 2 to control the output signal
|
||||||
|
{
|
||||||
|
timer_deinit(TIMER2);
|
||||||
|
/* initialize TIMER init parameter struct */
|
||||||
|
timer_struct_para_init(&timer_initpara);
|
||||||
|
/* TIMER1 configuration */
|
||||||
|
timer_initpara.prescaler = 200;
|
||||||
|
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
|
||||||
|
timer_initpara.counterdirection = TIMER_COUNTER_UP;
|
||||||
|
timer_initpara.period = 100;
|
||||||
|
timer_initpara.clockdivision = TIMER_CKDIV_DIV4;
|
||||||
|
timer_initpara.repetitioncounter = 0;
|
||||||
|
timer_init(TIMER2, &timer_initpara);
|
||||||
|
|
||||||
eclic_irq_enable(TIMER1_IRQn, 2, 5);
|
/* CH0 configuration in PWM mode0 */
|
||||||
//Setup timer 2 to control the output signal
|
timer_channel_output_struct_para_init(&timer_ocintpara);
|
||||||
{
|
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
||||||
timer_deinit(TIMER2);
|
timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
|
||||||
/* initialize TIMER init parameter struct */
|
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
||||||
timer_struct_para_init(&timer_initpara);
|
timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
|
||||||
/* TIMER1 configuration */
|
timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
|
||||||
timer_initpara.prescaler = 200;
|
timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
|
||||||
timer_initpara.alignedmode = TIMER_COUNTER_EDGE;
|
timer_channel_output_config(TIMER2, TIMER_CH_0, &timer_ocintpara);
|
||||||
timer_initpara.counterdirection = TIMER_COUNTER_UP;
|
timer_channel_output_pulse_value_config(TIMER2, TIMER_CH_0, 50);
|
||||||
timer_initpara.period = 100;
|
timer_channel_output_mode_config(TIMER2, TIMER_CH_0, TIMER_OC_MODE_PWM0);
|
||||||
timer_initpara.clockdivision = TIMER_CKDIV_DIV4;
|
timer_channel_output_shadow_config(TIMER2, TIMER_CH_0,
|
||||||
timer_initpara.repetitioncounter = 0;
|
TIMER_OC_SHADOW_DISABLE);
|
||||||
timer_init(TIMER2, &timer_initpara);
|
timer_auto_reload_shadow_enable(TIMER2);
|
||||||
|
timer_enable(TIMER2);
|
||||||
/* CH0 configuration in PWM mode0 */
|
}
|
||||||
timer_channel_output_struct_para_init(&timer_ocintpara);
|
|
||||||
timer_ocintpara.outputstate = TIMER_CCX_ENABLE;
|
|
||||||
timer_ocintpara.outputnstate = TIMER_CCXN_DISABLE;
|
|
||||||
timer_ocintpara.ocpolarity = TIMER_OC_POLARITY_HIGH;
|
|
||||||
timer_ocintpara.ocnpolarity = TIMER_OCN_POLARITY_HIGH;
|
|
||||||
timer_ocintpara.ocidlestate = TIMER_OC_IDLE_STATE_LOW;
|
|
||||||
timer_ocintpara.ocnidlestate = TIMER_OCN_IDLE_STATE_LOW;
|
|
||||||
timer_channel_output_config(TIMER2, TIMER_CH_0, &timer_ocintpara);
|
|
||||||
timer_channel_output_pulse_value_config(TIMER2, TIMER_CH_0, 50);
|
|
||||||
timer_channel_output_mode_config(TIMER2, TIMER_CH_0,
|
|
||||||
TIMER_OC_MODE_PWM0);
|
|
||||||
timer_channel_output_shadow_config(TIMER2, TIMER_CH_0,
|
|
||||||
TIMER_OC_SHADOW_DISABLE);
|
|
||||||
timer_auto_reload_shadow_enable(TIMER2);
|
|
||||||
timer_enable(TIMER2);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
void setup_iwdg() {
|
void setup_iwdg() {
|
||||||
//TODO
|
// TODO
|
||||||
}
|
}
|
||||||
|
|
||||||
void setupFUSBIRQ() {
|
void setupFUSBIRQ() {
|
||||||
//Setup IRQ for USB-PD
|
// Setup IRQ for USB-PD
|
||||||
gpio_init(FUSB302_IRQ_GPIO_Port, GPIO_MODE_IPU, GPIO_OSPEED_2MHZ, FUSB302_IRQ_Pin);
|
gpio_init(FUSB302_IRQ_GPIO_Port, GPIO_MODE_IPU, GPIO_OSPEED_2MHZ,
|
||||||
eclic_irq_enable(EXTI5_9_IRQn, 1, 1);
|
FUSB302_IRQ_Pin);
|
||||||
/* connect key EXTI line to key GPIO pin */
|
eclic_irq_enable(EXTI5_9_IRQn, 1, 1);
|
||||||
gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_5);
|
/* connect key EXTI line to key GPIO pin */
|
||||||
|
gpio_exti_source_select(GPIO_PORT_SOURCE_GPIOB, GPIO_PIN_SOURCE_5);
|
||||||
|
|
||||||
/* configure key EXTI line */
|
/* configure key EXTI line */
|
||||||
exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
|
exti_init(EXTI_5, EXTI_INTERRUPT, EXTI_TRIG_FALLING);
|
||||||
exti_interrupt_flag_clear(EXTI_5);
|
exti_interrupt_flag_clear(EXTI_5);
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user