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Try side-port of different linker and ram for PinecilV2 (#1730)

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Try side-port of different linker and ram
This commit is contained in:
Ben V. Brown
2023-07-06 07:35:01 +10:00
committed by GitHub
parent cbde61edb4
commit 0be83598f1
5 changed files with 605 additions and 29 deletions
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8
source/Core/BSP/Pinecilv2/Setup.cpp
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@@ -19,15 +19,13 @@ uint16_t ADCReadings[ADC_NORM_SAMPLES]; // room for 32 lots of the pair of readi
// Heap
extern uint8_t __HeapBase;
extern uint8_t __HeapLimit; // @suppress("Type cannot be resolved")
const uint32_t _heap_size = ((&__HeapLimit) - (&__HeapBase));
extern uint8_t _heap_start;
extern uint8_t _heap_size; // @suppress("Type cannot be resolved")
static HeapRegion_t xHeapRegions[] = {
{&__HeapBase, (unsigned int)_heap_size},
{&_heap_start, (unsigned int)&_heap_size},
{NULL, 0}, /* Terminates the array. */
{NULL, 0} /* Terminates the array. */
};
// Functions
void setup_timer_scheduler(void);