mirror of
https://github.com/Ralim/IronOS.git
synced 2025-02-26 07:53:55 +00:00
remove float compute from adc (as we dont use it)
This commit is contained in:
committed by
Ben V. Brown
parent
44f57acd19
commit
ec3124140b
@@ -40,7 +40,6 @@
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#include "bl702_common.h"
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#include "gpip_reg.h"
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/** @addtogroup BL702_Peripheral_Driver
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* @{
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*/
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@@ -273,7 +272,7 @@ typedef struct {
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int8_t posChan; /*!< Positive channel */
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int8_t negChan; /*!< Negative channel */
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uint16_t value; /*!< ADC value */
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float volt; /*!< ADC voltage result */
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// float volt; /*!< ADC voltage result */
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} ADC_Result_Type;
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/**
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@@ -325,11 +324,11 @@ typedef struct {
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/** @defgroup ADC_CHAN_TYPE
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* @{
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*/
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#define IS_ADC_CHAN_TYPE(type) \
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(((type) == ADC_CHAN0) || ((type) == ADC_CHAN1) || ((type) == ADC_CHAN2) || ((type) == ADC_CHAN3) || ((type) == ADC_CHAN4) || ((type) == ADC_CHAN5) || ((type) == ADC_CHAN6) \
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|| ((type) == ADC_CHAN7) || ((type) == ADC_CHAN8) || ((type) == ADC_CHAN9) || ((type) == ADC_CHAN10) || ((type) == ADC_CHAN11) || ((type) == ADC_CHAN_DAC_OUTA) || ((type) == ADC_CHAN_DAC_OUTB) \
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|| ((type) == ADC_CHAN_TSEN_P) || ((type) == ADC_CHAN_TSEN_N) || ((type) == ADC_CHAN_VREF) || ((type) == ADC_CHAN_DCTEST) || ((type) == ADC_CHAN_VABT_HALF) || ((type) == ADC_CHAN_SENP3) \
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|| ((type) == ADC_CHAN_SENP2) || ((type) == ADC_CHAN_SENP1) || ((type) == ADC_CHAN_SENP0) || ((type) == ADC_CHAN_GND))
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#define IS_ADC_CHAN_TYPE(type) \
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(((type) == ADC_CHAN0) || ((type) == ADC_CHAN1) || ((type) == ADC_CHAN2) || ((type) == ADC_CHAN3) || ((type) == ADC_CHAN4) || ((type) == ADC_CHAN5) || ((type) == ADC_CHAN6) || \
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((type) == ADC_CHAN7) || ((type) == ADC_CHAN8) || ((type) == ADC_CHAN9) || ((type) == ADC_CHAN10) || ((type) == ADC_CHAN11) || ((type) == ADC_CHAN_DAC_OUTA) || ((type) == ADC_CHAN_DAC_OUTB) || \
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((type) == ADC_CHAN_TSEN_P) || ((type) == ADC_CHAN_TSEN_N) || ((type) == ADC_CHAN_VREF) || ((type) == ADC_CHAN_DCTEST) || ((type) == ADC_CHAN_VABT_HALF) || ((type) == ADC_CHAN_SENP3) || \
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((type) == ADC_CHAN_SENP2) || ((type) == ADC_CHAN_SENP1) || ((type) == ADC_CHAN_SENP0) || ((type) == ADC_CHAN_GND))
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/** @defgroup ADC_V18_SEL_TYPE
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* @{
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@@ -344,23 +343,23 @@ typedef struct {
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/** @defgroup ADC_CLK_TYPE
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* @{
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*/
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#define IS_ADC_CLK_TYPE(type) \
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(((type) == ADC_CLK_DIV_1) || ((type) == ADC_CLK_DIV_4) || ((type) == ADC_CLK_DIV_8) || ((type) == ADC_CLK_DIV_12) || ((type) == ADC_CLK_DIV_16) || ((type) == ADC_CLK_DIV_20) \
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|| ((type) == ADC_CLK_DIV_24) || ((type) == ADC_CLK_DIV_32))
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#define IS_ADC_CLK_TYPE(type) \
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(((type) == ADC_CLK_DIV_1) || ((type) == ADC_CLK_DIV_4) || ((type) == ADC_CLK_DIV_8) || ((type) == ADC_CLK_DIV_12) || ((type) == ADC_CLK_DIV_16) || ((type) == ADC_CLK_DIV_20) || \
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((type) == ADC_CLK_DIV_24) || ((type) == ADC_CLK_DIV_32))
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/** @defgroup ADC_DELAY_SEL_TYPE
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* @{
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*/
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#define IS_ADC_DELAY_SEL_TYPE(type) \
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(((type) == ADC_DELAY_SEL_0) || ((type) == ADC_DELAY_SEL_1) || ((type) == ADC_DELAY_SEL_2) || ((type) == ADC_DELAY_SEL_3) || ((type) == ADC_DELAY_SEL_4) || ((type) == ADC_DELAY_SEL_5) \
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|| ((type) == ADC_DELAY_SEL_6) || ((type) == ADC_DELAY_SEL_7))
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#define IS_ADC_DELAY_SEL_TYPE(type) \
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(((type) == ADC_DELAY_SEL_0) || ((type) == ADC_DELAY_SEL_1) || ((type) == ADC_DELAY_SEL_2) || ((type) == ADC_DELAY_SEL_3) || ((type) == ADC_DELAY_SEL_4) || ((type) == ADC_DELAY_SEL_5) || \
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((type) == ADC_DELAY_SEL_6) || ((type) == ADC_DELAY_SEL_7))
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/** @defgroup ADC_PGA_GAIN_TYPE
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* @{
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*/
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#define IS_ADC_PGA_GAIN_TYPE(type) \
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(((type) == ADC_PGA_GAIN_NONE) || ((type) == ADC_PGA_GAIN_1) || ((type) == ADC_PGA_GAIN_2) || ((type) == ADC_PGA_GAIN_4) || ((type) == ADC_PGA_GAIN_8) || ((type) == ADC_PGA_GAIN_16) \
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|| ((type) == ADC_PGA_GAIN_32))
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#define IS_ADC_PGA_GAIN_TYPE(type) \
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(((type) == ADC_PGA_GAIN_NONE) || ((type) == ADC_PGA_GAIN_1) || ((type) == ADC_PGA_GAIN_2) || ((type) == ADC_PGA_GAIN_4) || ((type) == ADC_PGA_GAIN_8) || ((type) == ADC_PGA_GAIN_16) || \
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((type) == ADC_PGA_GAIN_32))
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/** @defgroup ADC_BIAS_SEL_TYPE
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* @{
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@@ -395,9 +394,9 @@ typedef struct {
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/** @defgroup ADC_DATA_WIDTH_TYPE
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* @{
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*/
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#define IS_ADC_DATA_WIDTH_TYPE(type) \
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(((type) == ADC_DATA_WIDTH_12) || ((type) == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || ((type) == ADC_DATA_WIDTH_14_WITH_64_AVERAGE) || ((type) == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) \
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|| ((type) == ADC_DATA_WIDTH_16_WITH_256_AVERAGE))
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#define IS_ADC_DATA_WIDTH_TYPE(type) \
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(((type) == ADC_DATA_WIDTH_12) || ((type) == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || ((type) == ADC_DATA_WIDTH_14_WITH_64_AVERAGE) || ((type) == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || \
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((type) == ADC_DATA_WIDTH_16_WITH_256_AVERAGE))
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/** @defgroup ADC_MICBOOST_DB_TYPE
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* @{
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@@ -422,9 +421,9 @@ typedef struct {
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/** @defgroup ADC_INT_TYPE
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* @{
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*/
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#define IS_ADC_INT_TYPE(type) \
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(((type) == ADC_INT_POS_SATURATION) || ((type) == ADC_INT_NEG_SATURATION) || ((type) == ADC_INT_FIFO_UNDERRUN) || ((type) == ADC_INT_FIFO_OVERRUN) || ((type) == ADC_INT_ADC_READY) \
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|| ((type) == ADC_INT_FIFO_READY) || ((type) == ADC_INT_ALL))
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#define IS_ADC_INT_TYPE(type) \
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(((type) == ADC_INT_POS_SATURATION) || ((type) == ADC_INT_NEG_SATURATION) || ((type) == ADC_INT_FIFO_UNDERRUN) || ((type) == ADC_INT_FIFO_OVERRUN) || ((type) == ADC_INT_ADC_READY) || \
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((type) == ADC_INT_FIFO_READY) || ((type) == ADC_INT_ALL))
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/*@} end of group ADC_Public_Constants */
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@@ -74,11 +74,11 @@
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/** @defgroup ADC_Private_Variables
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* @{
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*/
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static intCallback_Type *adcIntCbfArra[ADC_INT_ALL] = {NULL};
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static ADC_Gain_Coeff_Type adcGainCoeffCal = {
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.adcGainCoeffEnable = DISABLE,
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.adcgainCoeffVal = 0,
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.coe = 1,
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static intCallback_Type *adcIntCbfArra[ADC_INT_ALL] = {NULL};
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ADC_Gain_Coeff_Type adcGainCoeffCal = {
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.adcGainCoeffEnable = DISABLE,
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.adcgainCoeffVal = 0,
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.coe = 1,
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};
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/*@} end of group ADC_Private_Variables */
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@@ -510,8 +510,7 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result) {
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uint32_t tmpVal1 = 0, tmpVal2 = 0;
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ADC_Data_Width_Type dataType;
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ADC_SIG_INPUT_Type sigType;
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float ref = 2.0;
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uint32_t i = 0;
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uint32_t i = 0;
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float coe = 1.0;
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@@ -524,10 +523,6 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result) {
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dataType = BL_GET_REG_BITS_VAL(tmpVal1, AON_GPADC_RES_SEL);
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sigType = BL_GET_REG_BITS_VAL(tmpVal2, AON_GPADC_DIFF_MODE);
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if (BL_GET_REG_BITS_VAL(tmpVal2, AON_GPADC_VREF_SEL) == ADC_VREF_3P2V) {
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ref = 3.2;
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}
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if (sigType == ADC_INPUT_SINGLE_END) {
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for (i = 0; i < len; i++) {
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result[i].posChan = orgVal[i] >> 21;
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@@ -535,13 +530,10 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result) {
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if (dataType == ADC_DATA_WIDTH_12) {
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result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 4) / coe);
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result[i].volt = result[i].value / 4096.0 * ref;
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} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || (dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
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result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 2) / coe);
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result[i].volt = result[i].value / 16384.0 * ref;
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} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || (dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
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result[i].value = (unsigned int)((orgVal[i] & 0xffff) / coe);
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result[i].volt = result[i].value / 65536.0 * ref;
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}
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}
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} else {
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@@ -558,17 +550,10 @@ void ADC_Parse_Result(uint32_t *orgVal, uint32_t len, ADC_Result_Type *result) {
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if (dataType == ADC_DATA_WIDTH_12) {
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result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 4) / coe);
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result[i].volt = result[i].value / 2048.0 * ref;
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} else if ((dataType == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || (dataType == ADC_DATA_WIDTH_14_WITH_64_AVERAGE)) {
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result[i].value = (unsigned int)(((orgVal[i] & 0xffff) >> 2) / coe);
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result[i].volt = result[i].value / 8192.0 * ref;
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} else if ((dataType == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || (dataType == ADC_DATA_WIDTH_16_WITH_256_AVERAGE)) {
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result[i].value = (unsigned int)((orgVal[i] & 0xffff) / coe);
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result[i].volt = result[i].value / 32768.0 * ref;
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}
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if (neg) {
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result[i].volt = -result[i].volt;
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}
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}
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}
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