diff --git a/source/Core/BSP/Pinecilv2/bl_mcu_sdk/drivers/bl702_driver/std_drv/src/bl702_adc.c b/source/Core/BSP/Pinecilv2/bl_mcu_sdk/drivers/bl702_driver/std_drv/src/bl702_adc.c
index 9f239157..6a895bea 100644
--- a/source/Core/BSP/Pinecilv2/bl_mcu_sdk/drivers/bl702_driver/std_drv/src/bl702_adc.c
+++ b/source/Core/BSP/Pinecilv2/bl_mcu_sdk/drivers/bl702_driver/std_drv/src/bl702_adc.c
@@ -185,7 +185,7 @@ void ADC_Init(ADC_CFG_Type *cfg) {
   CHECK_PARAM(IS_ADC_DATA_WIDTH_TYPE(cfg->resWidth));
 
   /* config 1 */
-  regCfg1 = 0; // BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG1);
+  regCfg1 = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG1);
   regCfg1 = BL_SET_REG_BITS_VAL(regCfg1, AON_GPADC_V18_SEL, cfg->v18Sel);
   regCfg1 = BL_SET_REG_BITS_VAL(regCfg1, AON_GPADC_V11_SEL, cfg->v11Sel);
   regCfg1 = BL_CLR_REG_BIT(regCfg1, AON_GPADC_DITHER_EN);
@@ -200,13 +200,11 @@ void ADC_Init(ADC_CFG_Type *cfg) {
 
   /* config 2 */
   regCfg2 = BL_RD_REG(AON_BASE, AON_GPADC_REG_CONFIG2);
-  regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_DLY_SEL, 0x00);
+  regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_DLY_SEL, 0x02);
   regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_PGA1_GAIN, cfg->gain1);
   regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_PGA2_GAIN, cfg->gain2);
   regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_BIAS_SEL, cfg->biasSel);
   regCfg2 = BL_SET_REG_BITS_VAL(regCfg2, AON_GPADC_CHOP_MODE, cfg->chopMode);
-  regCfg2 = BL_CLR_REG_BIT(regCfg2, AON_GPADC_VBAT_EN);   // vbat enabled (off)
-  regCfg2 = BL_CLR_REG_BIT(regCfg2, AON_GPADC_TSVBE_LOW); // tsen didoe current
   /* pga_vcmi_en is for mic */
   regCfg2 = BL_CLR_REG_BIT(regCfg2, AON_GPADC_PGA_VCMI_EN);
 
@@ -233,7 +231,7 @@ void ADC_Init(ADC_CFG_Type *cfg) {
   Interrupt_Handler_Register(GPADC_DMA_IRQn, GPADC_DMA_IRQHandler);
 #endif
 
-  // ADC_Gain_Trim();
+  ADC_Gain_Trim();
 }
 
 /****************************************************************************/
@@ -353,12 +351,12 @@ void ADC_Scan_Channel_Config(const ADC_Chan_Type posChList[], const ADC_Chan_Typ
 void ADC_Start(void) {
   uint32_t regCmd;
 
-  // /* disable convert start */
-  // regCmd = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
-  // regCmd = BL_CLR_REG_BIT(regCmd, AON_GPADC_CONV_START);
-  // BL_WR_REG(AON_BASE, AON_GPADC_REG_CMD, regCmd);
+  /* disable convert start */
+  regCmd = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);
+  regCmd = BL_CLR_REG_BIT(regCmd, AON_GPADC_CONV_START);
+  BL_WR_REG(AON_BASE, AON_GPADC_REG_CMD, regCmd);
 
-  // ADC_RESTART_DUMMY_WAIT;
+  ADC_RESTART_DUMMY_WAIT;
 
   /* enable convert start */
   regCmd = BL_RD_REG(AON_BASE, AON_GPADC_REG_CMD);