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This commit is contained in:
Ben V. Brown
@@ -47,11 +47,181 @@ struct i2c_state {
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i2c_step currentStep;
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i2c_step currentStep;
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bool isMemoryWrite;
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bool isMemoryWrite;
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bool wakePart;
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bool wakePart;
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uint8_t deviceAddress;
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uint8_t memoryAddress;
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uint8_t * buffer;
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uint16_t numberOfBytes;
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dma_parameter_struct dma_init_struct;
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dma_parameter_struct dma_init_struct;
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};
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};
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volatile i2c_state currentState;
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volatile i2c_state currentState;
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void perform_i2c_step() {
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//Performs next step of the i2c state machine
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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//Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
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i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_PECERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_PECERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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}
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switch (currentState.currentStep) {
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case Error_occured:
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i2c_stop_on_bus(I2C0);
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break;
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case Write_start:
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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/* i2c master sends start signal only when the bus is idle */
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if (!i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)) {
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/* send the start signal */
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Write_device_address;
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}
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break;
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case Write_device_address:
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/* i2c master sends START signal successfully */
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_TRANSMITTER);
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currentState.currentStep = Write_device_memory_address;
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}
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break;
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case Write_device_memory_address:
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//Send the device memory location
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { //addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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//Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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} else if (currentState.wakePart) {
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//We are stopping here
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currentState.currentStep = Send_stop;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_TBE)) {
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// Write out the 8 byte address
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i2c_data_transmit(I2C0, currentState.memoryAddress);
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if (currentState.isMemoryWrite) {
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currentState.currentStep = Write_device_data_start;
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} else {
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currentState.currentStep = Read_start;
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}
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}
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}
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break;
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case Write_device_data_start:
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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/* enable I2C0 DMA */
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i2c_dma_enable(I2C0, I2C_DMA_ON);
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/* enable DMA0 channel5 */
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dma_channel_enable(DMA0, DMA_CH5);
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currentState.currentStep = Write_device_data_finish;
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}
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break;
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case Write_device_data_finish: //Wait for complete then goto stop
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/* wait until BTC bit is set */
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if (dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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currentState.currentStep = Send_stop;
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}
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}
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break;
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case Read_start:
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Read_device_address;
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}
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break;
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case Read_device_address:
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_master_addressing(I2C0, currentState.deviceAddress, I2C_RECEIVER);
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currentState.currentStep = Read_device_data_start;
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}
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break;
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case Read_device_data_start:
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { //addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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//Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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}
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/* one byte master reception procedure (polling) */
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if (currentState.numberOfBytes == 0) {
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currentState.currentStep = Send_stop;
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} else if (currentState.numberOfBytes == 1) {
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/* disable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register
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* (I2C_STAT0 has already been read) */
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i2c_flag_get(I2C0, I2C_FLAG_ADDSEND); //sat0
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i2c_flag_get(I2C0, I2C_FLAG_I2CBSY); //sat1
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/* send a stop condition to I2C bus*/
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i2c_stop_on_bus(I2C0);
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/* wait for the byte to be received */
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while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
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;
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/* read the byte received from the EEPROM */
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*currentState.buffer = i2c_data_receive(I2C0);
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currentState.currentStep = Wait_stop;
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} else { /* more than one byte master reception procedure (DMA) */
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/* enable I2C0 DMA */
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i2c_dma_enable(I2C0, I2C_DMA_ON);
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/* enable DMA0 channel5 */
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dma_channel_enable(DMA0, DMA_CH6);
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currentState.currentStep = Read_device_data_finish;
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}
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}
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break;
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case Read_device_data_finish: //Wait for complete then goto stop
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/* wait until BTC bit is set */
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if (dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
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currentState.currentStep = Send_stop;
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}
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break;
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case Send_stop:
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/* send a stop condition to I2C bus*/
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i2c_stop_on_bus(I2C0);
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currentState.currentStep = Wait_stop;
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break;
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case Wait_stop:
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/* i2c master sends STOP signal successfully */
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if ((I2C_CTL0(I2C0) & 0x0200) != 0x0200) {
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currentState.currentStep = Done;
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}
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break;
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default:
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//If we get here something is amiss
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return;
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}
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}
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bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8_t *p_buffer, uint16_t number_of_byte, bool isWrite, bool isWakeOnly) {
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bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8_t *p_buffer, uint16_t number_of_byte, bool isWrite, bool isWakeOnly) {
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{
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{
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//TODO is this required
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//TODO is this required
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@@ -66,6 +236,10 @@ bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8
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currentState.isMemoryWrite = isWrite;
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currentState.isMemoryWrite = isWrite;
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currentState.wakePart = isWakeOnly;
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currentState.wakePart = isWakeOnly;
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currentState.deviceAddress = DevAddress;
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currentState.memoryAddress = memory_address;
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currentState.numberOfBytes = number_of_byte;
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currentState.buffer = p_buffer;
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if (!isWakeOnly) {
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if (!isWakeOnly) {
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//Setup DMA
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//Setup DMA
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currentState.dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
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currentState.dma_init_struct.memory_width = DMA_MEMORY_WIDTH_8BIT;
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@@ -102,170 +276,7 @@ bool perform_i2c_transaction(uint16_t DevAddress, uint16_t memory_address, uint8
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i2c_stop_on_bus(I2C0);
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i2c_stop_on_bus(I2C0);
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return false;
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return false;
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}
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}
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// if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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perform_i2c_step();
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// i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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// //Arb error - we lost the bus / nacked
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// currentState.currentStep = Error_occured;
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// } else if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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// i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// // Bus Error
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// currentState.currentStep = Error_occured;
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// } else if (i2c_flag_get(I2C0, I2C_FLAG_LOSTARB)) {
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// i2c_flag_clear(I2C0, I2C_FLAG_LOSTARB);
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// // Bus Error
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// currentState.currentStep = Error_occured;
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// } else if (i2c_flag_get(I2C0, I2C_FLAG_PECERR)) {
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// i2c_flag_clear(I2C0, I2C_FLAG_PECERR);
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// // Bus Error
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// currentState.currentStep = Error_occured;
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// }
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switch (currentState.currentStep) {
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case Error_occured:
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i2c_stop_on_bus(I2C0);
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return false;
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break;
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case Write_start:
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/* enable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_ENABLE);
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/* i2c master sends start signal only when the bus is idle */
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if (!i2c_flag_get(I2C0, I2C_FLAG_I2CBSY)) {
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/* send the start signal */
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Write_device_address;
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}
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break;
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case Write_device_address:
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/* i2c master sends START signal successfully */
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
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currentState.currentStep = Write_device_memory_address;
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}
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break;
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case Write_device_memory_address:
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//Send the device memory location
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { //addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_BERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_BERR);
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// Bus Error
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currentState.currentStep = Error_occured;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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//Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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} else if (currentState.wakePart) {
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//We are stopping here
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currentState.currentStep = Send_stop;
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} else if (i2c_flag_get(I2C0, I2C_FLAG_TBE)) {
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// Write out the 8 byte address
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i2c_data_transmit(I2C0, memory_address);
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if (currentState.isMemoryWrite) {
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currentState.currentStep = Write_device_data_start;
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} else {
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currentState.currentStep = Read_start;
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}
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}
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}
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break;
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case Write_device_data_start:
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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/* enable I2C0 DMA */
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i2c_dma_enable(I2C0, I2C_DMA_ON);
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/* enable DMA0 channel5 */
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dma_channel_enable(DMA0, DMA_CH5);
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currentState.currentStep = Write_device_data_finish;
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}
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break;
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case Write_device_data_finish: //Wait for complete then goto stop
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/* wait until BTC bit is set */
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if (dma_flag_get(DMA0, DMA_CH5, DMA_FLAG_FTF)) {
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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currentState.currentStep = Send_stop;
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}
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}
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break;
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case Read_start:
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/* wait until BTC bit is set */
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if (i2c_flag_get(I2C0, I2C_FLAG_BTC)) {
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i2c_start_on_bus(I2C0);
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currentState.currentStep = Read_device_address;
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}
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break;
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case Read_device_address:
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if (i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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i2c_master_addressing(I2C0, DevAddress, I2C_RECEIVER);
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currentState.currentStep = Read_device_data_start;
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}
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break;
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case Read_device_data_start:
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if (i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) { //addr sent
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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//Arb error - we lost the bus / nacked
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currentState.currentStep = Error_occured;
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}
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/* one byte master reception procedure (polling) */
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if (number_of_byte == 0) {
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currentState.currentStep = Send_stop;
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} else if (number_of_byte == 1) {
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/* disable acknowledge */
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i2c_ack_config(I2C0, I2C_ACK_DISABLE);
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/* clear ADDSEND register by reading I2C_STAT0 then I2C_STAT1 register
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* (I2C_STAT0 has already been read) */
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i2c_flag_get(I2C0, I2C_FLAG_ADDSEND); //sat0
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i2c_flag_get(I2C0, I2C_FLAG_I2CBSY); //sat1
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/* send a stop condition to I2C bus*/
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i2c_stop_on_bus(I2C0);
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/* wait for the byte to be received */
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|
||||||
while (!i2c_flag_get(I2C0, I2C_FLAG_RBNE))
|
|
||||||
;
|
|
||||||
/* read the byte received from the EEPROM */
|
|
||||||
*p_buffer = i2c_data_receive(I2C0);
|
|
||||||
currentState.currentStep = Wait_stop;
|
|
||||||
} else { /* more than one byte master reception procedure (DMA) */
|
|
||||||
/* enable I2C0 DMA */
|
|
||||||
i2c_dma_enable(I2C0, I2C_DMA_ON);
|
|
||||||
/* enable DMA0 channel5 */
|
|
||||||
dma_channel_enable(DMA0, DMA_CH6);
|
|
||||||
currentState.currentStep = Read_device_data_finish;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case Read_device_data_finish: //Wait for complete then goto stop
|
|
||||||
/* wait until BTC bit is set */
|
|
||||||
if (dma_flag_get(DMA0, DMA_CH6, DMA_FLAG_FTF)) {
|
|
||||||
currentState.currentStep = Send_stop;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
case Send_stop:
|
|
||||||
/* send a stop condition to I2C bus*/
|
|
||||||
i2c_stop_on_bus(I2C0);
|
|
||||||
currentState.currentStep = Wait_stop;
|
|
||||||
break;
|
|
||||||
case Wait_stop:
|
|
||||||
/* i2c master sends STOP signal successfully */
|
|
||||||
if ((I2C_CTL0(I2C0) & 0x0200) != 0x0200) {
|
|
||||||
currentState.currentStep = Done;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
//If we get here something is amiss
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|||||||
Reference in New Issue
Block a user