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Hall Effect sensor working in higher range
This commit is contained in:
@@ -293,9 +293,9 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *p_bu
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return false;
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}
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}
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timeout = 0;
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if (timeout < I2C_TIME_OUT) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout = 0;
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state = I2C_TRANSMIT_DATA;
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} else {
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//Dont retry as this means a NAK
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@@ -416,106 +416,106 @@ bool FRToSI2C::writeRegistersBulk(const uint8_t address, const I2C_REG *register
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bool FRToSI2C::wakePart(uint16_t DevAddress) {
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//wakepart is a special case where only the device address is sent
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if (!lock())
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return false;
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return false;
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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i2c_interrupt_disable(I2C0, I2C_INT_EV);
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i2c_interrupt_disable(I2C0, I2C_INT_BUF);
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dma_parameter_struct dma_init_struct;
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i2c_interrupt_disable(I2C0, I2C_INT_ERR);
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i2c_interrupt_disable(I2C0, I2C_INT_EV);
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i2c_interrupt_disable(I2C0, I2C_INT_BUF);
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dma_parameter_struct dma_init_struct;
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uint8_t state = I2C_START;
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uint16_t timeout = 0;
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bool done = false;
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bool timedout = false;
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while (!(done || timedout)) {
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switch (state) {
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case I2C_START:
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_SEND_ADDRESS;
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} else {
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I2C_Unstick();
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timeout = 0;
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state = I2C_START;
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}
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break;
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case I2C_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_CLEAR_ADDRESS_FLAG;
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} else {
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timedout = true;
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done = true;
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timeout = 0;
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state = I2C_START;
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}
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break;
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case I2C_CLEAR_ADDRESS_FLAG:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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//Address NACK'd
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unlock();
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return false;
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}
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout = 0;
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state = I2C_STOP;
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} else {
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//Dont retry as this means a NAK
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uint8_t state = I2C_START;
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uint16_t timeout = 0;
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bool done = false;
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bool timedout = false;
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while (!(done || timedout)) {
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switch (state) {
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case I2C_START:
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/* i2c master sends start signal only when the bus is idle */
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while (i2c_flag_get(I2C0, I2C_FLAG_I2CBSY) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_start_on_bus(I2C0);
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timeout = 0;
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state = I2C_SEND_ADDRESS;
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} else {
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I2C_Unstick();
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timeout = 0;
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state = I2C_START;
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}
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break;
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case I2C_SEND_ADDRESS:
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/* i2c master sends START signal successfully */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_SBSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_master_addressing(I2C0, DevAddress, I2C_TRANSMITTER);
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timeout = 0;
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state = I2C_CLEAR_ADDRESS_FLAG;
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} else {
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timedout = true;
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done = true;
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timeout = 0;
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state = I2C_START;
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}
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break;
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case I2C_CLEAR_ADDRESS_FLAG:
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/* address flag set means i2c slave sends ACK */
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while ((!i2c_flag_get(I2C0, I2C_FLAG_ADDSEND)) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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if (i2c_flag_get(I2C0, I2C_FLAG_AERR)) {
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i2c_flag_clear(I2C0, I2C_FLAG_AERR);
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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//Address NACK'd
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unlock();
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return false;
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}
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break;
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case I2C_STOP:
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/* send a stop condition to I2C bus */
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}
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if (timeout < I2C_TIME_OUT) {
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i2c_flag_clear(I2C0, I2C_FLAG_ADDSEND);
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timeout = 0;
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state = I2C_STOP;
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} else {
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//Dont retry as this means a NAK
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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timeout = 0;
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state = I2C_END;
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done = true;
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} else {
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timedout = true;
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done = true;
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timeout = 0;
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state = I2C_START;
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}
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break;
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default:
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state = I2C_START;
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timeout = 0;
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break;
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unlock();
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return false;
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}
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break;
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case I2C_STOP:
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(I2C0);
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/* i2c master sends STOP signal successfully */
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while ((I2C_CTL0(I2C0) & 0x0200) && (timeout < I2C_TIME_OUT )) {
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timeout++;
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}
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if (timeout < I2C_TIME_OUT) {
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timeout = 0;
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state = I2C_END;
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done = true;
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} else {
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timedout = true;
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done = true;
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timeout = 0;
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state = I2C_START;
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}
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break;
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default:
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state = I2C_START;
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timeout = 0;
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break;
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}
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unlock();
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return timedout == false;
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}
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unlock();
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return timedout == false;
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}
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@@ -3,27 +3,61 @@
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*
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* Created on: 5 Oct. 2020
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* Author: Ralim
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*
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* This is based on the very nice sample code by Sean Farrelly (@FARLY7)
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* Over here : https://github.com/FARLY7/si7210-driver
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*
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* This class is licensed as MIT to match this code base
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*/
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#include <Si7210.h>
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#include "Si7210_defines.h"
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#include "I2C_Wrapper.hpp"
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bool Si7210::detect() {
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uint8_t temp;
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return FRToSI2C::wakePart(SI7210_ADDRESS);
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}
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bool Si7210::init() {
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//Turn on auto increment and sanity check ID
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//Load OTP cal
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uint8_t temp;
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if (FRToSI2C::Mem_Read(SI7210_ADDRESS, SI7210_REG_ID, &temp, 1)) {
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// We don't really care what model it is etc, just probing to check its probably this iC
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if (temp != 0x00 && temp != 0xFF) {
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temp = 0x01; //turn on auto increment
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if (FRToSI2C::Mem_Write(SI7210_ADDRESS, SI7210_REG_INCR, &temp, 1)) {
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return true;
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temp = 0x00;
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/* Set device and internal driver settings */
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if (!write_reg( SI7210_CTRL1, (uint8_t) ~SW_LOW4FIELD_MASK, 0)) {
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return false;
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}
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/* Disable periodic auto-wakeup by device, and tamper detect. */
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if ((!write_reg(SI7210_CTRL3, (uint8_t) ~SL_TIMEENA_MASK, 0)))
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return false;
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/* Disable tamper detection by setting sw_tamper to 63 */
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if (!write_reg(SI7210_CTRL3, SL_FAST_MASK | SL_TIMEENA_MASK, 63 << 2))
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return false;
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if (!set_high_range())
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return false;
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/* Stop the control loop by setting stop bit */
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if (!write_reg( SI7210_POWER_CTRL, MEAS_MASK | USESTORE_MASK, STOP_MASK)) /* WARNING: Removed USE_STORE MASK */
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return false;
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/* Use a burst size of 128/4096 samples in FIR and IIR modes */
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if (!write_reg(SI7210_CTRL4, 0, DF_BURSTSIZE_128 | DF_BW_4096))
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return false;
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/* Select field strength measurement */
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if (!write_reg( SI7210_DSPSIGSEL, 0, DSP_SIGSEL_FIELD_MASK))
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return false;
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return true; //start_periodic_measurement();
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}
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}
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return false;
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@@ -32,6 +66,119 @@ bool Si7210::init() {
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int16_t Si7210::read() {
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//Read the two regs
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int16_t temp = 0;
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FRToSI2C::Mem_Read(SI7210_ADDRESS, SI7210_REG_DATAH, (uint8_t*) &temp, 2);
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return __builtin_bswap16(temp);
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if (!get_field_strength(&temp)) {
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temp = 0;
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}
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return temp;
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}
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bool Si7210::write_reg(const uint8_t reg, const uint8_t mask, const uint8_t val) {
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uint8_t temp = 0;
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if (mask) {
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if (!read_reg(reg, &temp)) {
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return false;
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}
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temp &= mask;
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}
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temp |= val;
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return FRToSI2C::Mem_Write(SI7210_ADDRESS, reg, &temp, 1);
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}
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bool Si7210::read_reg(const uint8_t reg, uint8_t* val) {
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return FRToSI2C::Mem_Read(SI7210_ADDRESS, reg, val, 1);
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}
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bool Si7210::start_periodic_measurement() {
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/* Enable periodic wakeup */
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if (!write_reg(SI7210_CTRL3, (uint8_t) ~SL_TIMEENA_MASK, SL_TIMEENA_MASK))
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return false;
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/* Start measurement */
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/* Change to ~STOP_MASK with STOP_MASK */
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return write_reg( SI7210_POWER_CTRL, MEAS_MASK | USESTORE_MASK, 0);
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}
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bool Si7210::get_field_strength(int16_t* field) {
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*field = 0;
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uint8_t val = 0;
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FRToSI2C::wakePart(SI7210_ADDRESS);
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if (!write_reg( SI7210_POWER_CTRL, MEAS_MASK | USESTORE_MASK, STOP_MASK))
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return false;
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/* Read most-significant byte */
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if (!read_reg( SI7210_DSPSIGM, &val))
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return false;
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*field = (val & DSP_SIGM_DATA_MASK) << 8;
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/* Read least-significant byte of data */
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if (!read_reg( SI7210_DSPSIGL, &val))
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return false;
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*field += val;
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*field -= 16384U;
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//field is now a +- measurement
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//In units of 0.0125 mT
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// Aka 12.5uT
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//Clear flags
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read_reg( SI7210_CTRL1, &val);
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read_reg( SI7210_CTRL2, &val);
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//Start next one
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/* Use a burst size of 128/4096 samples in FIR and IIR modes */
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write_reg( SI7210_CTRL4, 0, DF_BURSTSIZE_128 | DF_BW_4096);
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/* Selet field strength measurement */
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write_reg( SI7210_DSPSIGSEL, 0, DSP_SIGSEL_FIELD_MASK);
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/* Start measurement */
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write_reg( SI7210_POWER_CTRL, MEAS_MASK | USESTORE_MASK, ONEBURST_MASK);
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return true;
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}
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bool Si7210::set_high_range() {
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//To set the unit into 200mT range, no magnet temperature calibration
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// We want to copy OTP 0x27->0x2C into a0->a5
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uint8_t base_addr = 0x27; // You can change this to pick the temp calibration
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bool worked = true;
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uint8_t val = 0;
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/* Load A0 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A0, 0, val);
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/* Load A1 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr + 1);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A1, 0, val);
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/* Load A2 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr + 2);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A2, 0, val);
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/* Load A3 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr + 3);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A3, 0, val);
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/* Load A4 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr + 4);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A4, 0, val);
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/* Load A5 register */
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worked &= write_reg( SI7210_OTP_ADDR, 0, base_addr + 5);
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worked &= write_reg( SI7210_OTP_CTRL, 0, OTP_READ_EN_MASK);
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worked &= read_reg( SI7210_OTP_DATA, &val);
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worked &= write_reg( SI7210_A5, 0, val);
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return worked;
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}
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@@ -16,6 +16,12 @@ public:
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static bool init();
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static int16_t read();
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private:
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static bool write_reg(const uint8_t reg,const uint8_t mask,const uint8_t val);
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static bool read_reg(const uint8_t reg, uint8_t *val);
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static bool start_periodic_measurement();
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static bool get_field_strength(int16_t *field);
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static bool set_high_range();
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};
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#endif /* CORE_DRIVERS_SI7210_H_ */
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@@ -10,9 +10,81 @@
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#define SI7210_ADDRESS (0x30<<1)
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#define SI7210_REG_ID 0xC0
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#define SI7210_REG_DATAH 0xC1
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#define SI7210_REG_DATAL 0xC2
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#define SI7210_REG_INCR 0xC5
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/* Si7210 Register addresses */
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#define SI7210_HREVID 0xC0U
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#define SI7210_DSPSIGM 0xC1U
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#define SI7210_DSPSIGL 0xC2U
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#define SI7210_DSPSIGSEL 0xC3U
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#define SI7210_POWER_CTRL 0xC4U
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#define SI7210_ARAUTOINC 0xC5U
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#define SI7210_CTRL1 0xC6U
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#define SI7210_CTRL2 0xC7U
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#define SI7210_SLTIME 0xC8U
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#define SI7210_CTRL3 0xC9U
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#define SI7210_A0 0xCAU
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#define SI7210_A1 0xCBU
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#define SI7210_A2 0xCCU
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#define SI7210_CTRL4 0xCDU
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#define SI7210_A3 0xCEU
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#define SI7210_A4 0xCFU
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#define SI7210_A5 0xD0U
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#define SI7210_OTP_ADDR 0xE1U
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#define SI7210_OTP_DATA 0xE2U
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#define SI7210_OTP_CTRL 0xE3U
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#define SI7210_TM_FG 0xE4U
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/* Si7210 Register bit masks */
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#define CHIP_ID_MASK 0xF0U
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||||
#define REV_ID_MASK 0x0FU
|
||||
#define DSP_SIGSEL_MASK 0x07U
|
||||
#define MEAS_MASK 0x80U
|
||||
#define USESTORE_MASK 0x08U
|
||||
#define ONEBURST_MASK 0x04U
|
||||
#define STOP_MASK 0x02U
|
||||
#define SLEEP_MASK 0x01U
|
||||
#define ARAUTOINC_MASK 0x01U
|
||||
#define SW_LOW4FIELD_MASK 0x80U
|
||||
#define SW_OP_MASK 0x7FU
|
||||
#define SW_FIELDPOLSEL_MASK 0xC0U
|
||||
#define SW_HYST_MASK 0x3FU
|
||||
#define SW_TAMPER_MASK 0xFCU
|
||||
#define SL_FAST_MASK 0x02U
|
||||
#define SL_TIMEENA_MASK 0x01U
|
||||
#define DF_BURSTSIZE_MASK 0xE0U
|
||||
#define DF_BW_MASK 0x1EU
|
||||
#define DF_IIR_MASK 0x01U
|
||||
#define OTP_READ_EN_MASK 0x02U
|
||||
#define OTP_BUSY_MASK 0x01U
|
||||
#define TM_FG_MASK 0x03U
|
||||
|
||||
#define DSP_SIGM_DATA_FLAG 0x80U
|
||||
#define DSP_SIGM_DATA_MASK 0x7FU
|
||||
#define DSP_SIGSEL_TEMP_MASK 0x01U
|
||||
#define DSP_SIGSEL_FIELD_MASK 0x04U
|
||||
|
||||
/* Burst sizes */
|
||||
#define DF_BW_1 0x0U << 1
|
||||
#define DF_BW_2 0x1U << 1
|
||||
#define DF_BW_4 0x2U << 1
|
||||
#define DF_BW_8 0x3U << 1
|
||||
#define DF_BW_16 0x4U << 1
|
||||
#define DF_BW_32 0x5U << 1
|
||||
#define DF_BW_64 0x6U << 1
|
||||
#define DF_BW_128 0x7U << 1
|
||||
#define DF_BW_256 0x8U << 1
|
||||
#define DF_BW_512 0x9U << 1
|
||||
#define DF_BW_1024 0xAU << 1
|
||||
#define DF_BW_2048 0xBU << 1
|
||||
#define DF_BW_4096 0xCU << 1
|
||||
#define DF_BURSTSIZE_1 0x0U << 5
|
||||
#define DF_BURSTSIZE_2 0x1U << 5
|
||||
#define DF_BURSTSIZE_4 0x2U << 5
|
||||
#define DF_BURSTSIZE_8 0x3U << 5
|
||||
#define DF_BURSTSIZE_16 0x4U << 5
|
||||
#define DF_BURSTSIZE_32 0x5U << 5
|
||||
#define DF_BURSTSIZE_64 0x6U << 5
|
||||
#define DF_BURSTSIZE_128 0x7U << 5
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user