diff --git a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c index 0dd8003c..ec9f7eb1 100644 --- a/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c +++ b/source/Core/BSP/Miniware/Vendor/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c @@ -191,11 +191,11 @@ * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - uint32_t position; - uint32_t ioposition = 0x00U; - uint32_t iocurrent = 0x00U; - uint32_t temp = 0x00U; - uint32_t config = 0x00U; + uint32_t position; + uint32_t ioposition = 0x00U; + uint32_t iocurrent = 0x00U; + uint32_t temp = 0x00U; + uint32_t config = 0x00U; __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ uint32_t registeroffset = 0U; /* offset used during computation of CNF and MODE bits placement inside CRL or CRH register */ @@ -340,9 +340,9 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { * @retval None */ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { - uint32_t position = 0x00U; - uint32_t iocurrent = 0x00U; - uint32_t tmp = 0x00U; + uint32_t position = 0x00U; + uint32_t iocurrent = 0x00U; + uint32_t tmp = 0x00U; __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */ uint32_t registeroffset = 0U; diff --git a/source/Core/BSP/Pinecilv2/BSP.cpp b/source/Core/BSP/Pinecilv2/BSP.cpp index d3121515..3af1b474 100644 --- a/source/Core/BSP/Pinecilv2/BSP.cpp +++ b/source/Core/BSP/Pinecilv2/BSP.cpp @@ -155,7 +155,7 @@ const uint8_t numTipResistanceReadings = 3; uint32_t tipResistanceReadings[3] = {0, 0, 0}; uint8_t tipResistanceReadingSlot = 0; uint8_t getTipResistanceX10() { - // Return tip resistance in x10 ohms + // Return tip resistance in x10 ohms // We can measure this using the op-amp return lastTipResistance; }