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This commit is contained in:
@@ -22,8 +22,7 @@ static bool fastPWM;
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//2 second filter (ADC is PID_TIM_HZ Hz)
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history<uint16_t, PID_TIM_HZ> rawTempFilter = { { 0 }, 0, 0 };
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void resetWatchdog()
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{
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void resetWatchdog() {
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HAL_IWDG_Refresh(&hiwdg);
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}
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#ifdef TEMP_NTC
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@@ -95,18 +94,15 @@ static const uint16_t NTCHandleLookup[] = {
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};
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#endif
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uint16_t getHandleTemperature()
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{
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uint16_t getHandleTemperature() {
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#ifdef TEMP_NTC
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//TS80P uses 100k NTC resistors instead
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//NTCG104EF104FT1X from TDK
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//For now not doing interpolation
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int32_t result = getADC(0);
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for (uint32_t i = 0; i < (sizeof(NTCHandleLookup) / (2 * sizeof(uint16_t)));
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i++)
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{
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if (result > NTCHandleLookup[(i * 2) + 0])
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{
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i++) {
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if (result > NTCHandleLookup[(i * 2) + 0]) {
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return NTCHandleLookup[(i * 2) + 1] * 10;
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}
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}
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@@ -130,8 +126,7 @@ uint16_t getHandleTemperature()
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#endif
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}
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uint16_t getTipInstantTemperature()
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{
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uint16_t getTipInstantTemperature() {
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uint16_t sum = 0; // 12 bit readings * 8 -> 15 bits
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uint16_t readings[8];
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//Looking to reject the highest outlier readings.
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@@ -146,29 +141,23 @@ uint16_t getTipInstantTemperature()
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readings[6] = hadc2.Instance->JDR3;
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readings[7] = hadc2.Instance->JDR4;
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for (int i = 0; i < 8; i++)
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{
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for (int i = 0; i < 8; i++) {
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sum += readings[i];
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}
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return sum; // 8x over sample
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}
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uint16_t getTipRawTemp(uint8_t refresh)
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{
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if (refresh)
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{
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uint16_t getTipRawTemp(uint8_t refresh) {
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if (refresh) {
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uint16_t lastSample = getTipInstantTemperature();
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rawTempFilter.update(lastSample);
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return lastSample;
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}
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else
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{
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} else {
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return rawTempFilter.average();
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}
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}
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uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample)
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{
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uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample) {
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// ADC maximum is 32767 == 3.3V at input == 28.05V at VIN
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// Therefore we can divide down from there
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// Multiplying ADC max by 4 for additional calibration options,
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@@ -182,14 +171,12 @@ uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample)
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static uint8_t preFillneeded = 10;
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static uint32_t samples[BATTFILTERDEPTH];
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static uint8_t index = 0;
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if (preFillneeded)
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{
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if (preFillneeded) {
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for (uint8_t i = 0; i < BATTFILTERDEPTH; i++)
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samples[i] = getADC(1);
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preFillneeded--;
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}
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if (sample)
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{
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if (sample) {
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samples[index] = getADC(1);
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index = (index + 1) % BATTFILTERDEPTH;
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}
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@@ -199,23 +186,20 @@ uint16_t getInputVoltageX10(uint16_t divisor, uint8_t sample)
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sum += samples[i];
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sum /= BATTFILTERDEPTH;
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if (divisor == 0)
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{
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if (divisor == 0) {
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divisor = 1;
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}
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return sum * 4 / divisor;
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}
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void setTipPWM(uint8_t pulse)
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{
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void setTipPWM(uint8_t pulse) {
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PWMSafetyTimer = 10; // This is decremented in the handler for PWM so that the tip pwm is
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// disabled if the PID task is not scheduled often enough.
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pendingPWM = pulse;
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}
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static void switchToFastPWM(void)
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{
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static void switchToFastPWM(void) {
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fastPWM = true;
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totalPWM = powerPWM + tempMeasureTicks * 2;
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htim2.Instance->ARR = totalPWM;
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@@ -225,8 +209,7 @@ static void switchToFastPWM(void)
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htim2.Instance->PSC = 2000;
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}
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static void switchToSlowPWM(void)
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{
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static void switchToSlowPWM(void) {
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fastPWM = false;
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totalPWM = powerPWM + tempMeasureTicks;
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htim2.Instance->ARR = totalPWM;
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@@ -236,16 +219,12 @@ static void switchToSlowPWM(void)
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htim2.Instance->PSC = 4000;
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}
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bool tryBetterPWM(uint8_t pwm)
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{
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if (fastPWM && pwm == powerPWM)
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{
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bool tryBetterPWM(uint8_t pwm) {
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if (fastPWM && pwm == powerPWM) {
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// maximum power for fast PWM reached, need to go slower to get more
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switchToSlowPWM();
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return true;
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}
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else if (!fastPWM && pwm < 230)
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{
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} else if (!fastPWM && pwm < 230) {
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// 254 in fast PWM mode gives the same power as 239 in slow
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// allow for some reasonable hysteresis by switching only when it goes
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// below 230 (equivalent to 245 in fast mode)
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@@ -258,11 +237,9 @@ bool tryBetterPWM(uint8_t pwm)
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// These are called by the HAL after the corresponding events from the system
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// timers.
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void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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{
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void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) {
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// Period has elapsed
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if (htim->Instance == TIM2)
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{
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if (htim->Instance == TIM2) {
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// we want to turn on the output again
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PWMSafetyTimer--;
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// We decrement this safety value so that lockups in the
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@@ -271,32 +248,24 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
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// While we could assume this could never happen, its a small price for
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// increased safety
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htim2.Instance->CCR4 = pendingPWM;
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if (htim2.Instance->CCR4 && PWMSafetyTimer)
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{
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if (htim2.Instance->CCR4 && PWMSafetyTimer) {
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HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1);
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}
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else
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{
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} else {
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HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_1);
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}
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}
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else if (htim->Instance == TIM1)
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{
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} else if (htim->Instance == TIM1) {
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// STM uses this for internal functions as a counter for timeouts
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HAL_IncTick();
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}
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}
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void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
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{
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void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) {
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// This was a when the PWM for the output has timed out
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if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_4)
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{
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if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_4) {
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HAL_TIM_PWM_Stop(&htim3, TIM_CHANNEL_1);
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}
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}
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void unstick_I2C()
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{
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void unstick_I2C() {
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GPIO_InitTypeDef GPIO_InitStruct;
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int timeout = 100;
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int timeout_cnt = 0;
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@@ -320,8 +289,7 @@ void unstick_I2C()
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HAL_GPIO_Init(SDA_GPIO_Port, &GPIO_InitStruct);
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HAL_GPIO_WritePin(SDA_GPIO_Port, SDA_Pin, GPIO_PIN_SET);
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while (GPIO_PIN_SET != HAL_GPIO_ReadPin(SDA_GPIO_Port, SDA_Pin))
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{
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while (GPIO_PIN_SET != HAL_GPIO_ReadPin(SDA_GPIO_Port, SDA_Pin)) {
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//Move clock to release I2C
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HAL_GPIO_WritePin(SCL_GPIO_Port, SCL_Pin, GPIO_PIN_RESET);
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asm("nop");
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@@ -366,26 +334,23 @@ void unstick_I2C()
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HAL_I2C_Init(&hi2c1);
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}
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uint8_t getButtonA()
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{
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return HAL_GPIO_ReadPin(KEY_A_GPIO_Port, KEY_A_Pin) == GPIO_PIN_RESET ? 1 : 0;
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uint8_t getButtonA() {
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return HAL_GPIO_ReadPin(KEY_A_GPIO_Port, KEY_A_Pin) == GPIO_PIN_RESET ?
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1 : 0;
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}
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uint8_t getButtonB()
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{
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return HAL_GPIO_ReadPin(KEY_B_GPIO_Port, KEY_B_Pin) == GPIO_PIN_RESET ? 1 : 0;
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uint8_t getButtonB() {
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return HAL_GPIO_ReadPin(KEY_B_GPIO_Port, KEY_B_Pin) == GPIO_PIN_RESET ?
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1 : 0;
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}
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void BSPInit(void)
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{
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void BSPInit(void) {
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switchToFastPWM();
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}
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void reboot()
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{
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void reboot() {
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NVIC_SystemReset();
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}
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void delay_ms(uint16_t count)
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{
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void delay_ms(uint16_t count) {
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HAL_Delay(count);
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}
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@@ -17,11 +17,13 @@ void FRToSI2C::CpltCallback() {
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}
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}
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t MemAddress, uint8_t *pData, uint16_t Size) {
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bool FRToSI2C::Mem_Read(uint16_t DevAddress, uint16_t MemAddress,
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uint8_t *pData, uint16_t Size) {
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if (!lock())
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return false;
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if (HAL_I2C_Mem_Read(&hi2c1, DevAddress, MemAddress, I2C_MEMADD_SIZE_8BIT, pData, Size, 500) != HAL_OK) {
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if (HAL_I2C_Mem_Read(&hi2c1, DevAddress, MemAddress, I2C_MEMADD_SIZE_8BIT,
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pData, Size, 500) != HAL_OK) {
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I2C_Unstick();
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unlock();
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@@ -40,11 +42,13 @@ uint8_t FRToSI2C::I2C_RegisterRead(uint8_t add, uint8_t reg) {
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Mem_Read(add, reg, tx_data, 1);
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return tx_data[0];
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}
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bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *pData, uint16_t Size) {
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bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress,
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uint8_t *pData, uint16_t Size) {
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if (!lock())
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return false;
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if (HAL_I2C_Mem_Write(&hi2c1, DevAddress, MemAddress, I2C_MEMADD_SIZE_8BIT, pData, Size, 500) != HAL_OK) {
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if (HAL_I2C_Mem_Write(&hi2c1, DevAddress, MemAddress, I2C_MEMADD_SIZE_8BIT,
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pData, Size, 500) != HAL_OK) {
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I2C_Unstick();
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unlock();
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@@ -58,7 +62,8 @@ bool FRToSI2C::Mem_Write(uint16_t DevAddress, uint16_t MemAddress, uint8_t *pDat
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bool FRToSI2C::Transmit(uint16_t DevAddress, uint8_t *pData, uint16_t Size) {
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if (!lock())
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return false;
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if (HAL_I2C_Master_Transmit_DMA(&hi2c1, DevAddress, pData, Size) != HAL_OK) {
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if (HAL_I2C_Master_Transmit_DMA(&hi2c1, DevAddress, pData, Size)
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!= HAL_OK) {
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I2C_Unstick();
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unlock();
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return false;
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@@ -70,7 +75,8 @@ bool FRToSI2C::probe(uint16_t DevAddress) {
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if (!lock())
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return false;
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uint8_t buffer[1];
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bool worked = HAL_I2C_Mem_Read(&hi2c1, DevAddress, 0x0F, I2C_MEMADD_SIZE_8BIT, buffer, 1, 1000) == HAL_OK;
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bool worked = HAL_I2C_Mem_Read(&hi2c1, DevAddress, 0x0F,
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I2C_MEMADD_SIZE_8BIT, buffer, 1, 1000) == HAL_OK;
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unlock();
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return worked;
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}
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@@ -87,9 +93,11 @@ bool FRToSI2C::lock() {
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return xSemaphoreTake(I2CSemaphore, (TickType_t)50) == pdTRUE;
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}
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bool FRToSI2C::writeRegistersBulk(const uint8_t address, const I2C_REG *registers, const uint8_t registersLength) {
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bool FRToSI2C::writeRegistersBulk(const uint8_t address,
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const I2C_REG *registers, const uint8_t registersLength) {
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for (int index = 0; index < registersLength; index++) {
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if (!I2C_RegisterWrite(address, registers[index].reg, registers[index].val)) {
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if (!I2C_RegisterWrite(address, registers[index].reg,
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registers[index].val)) {
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return false;
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}
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if (registers[index].pause_ms)
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@@ -66,7 +66,9 @@ void QC_Post_Probe_En() {
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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}
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uint8_t QC_DM_PulledDown() { return HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_11) == GPIO_PIN_RESET ? 1 : 0; }
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uint8_t QC_DM_PulledDown() {
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return HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_11) == GPIO_PIN_RESET ? 1 : 0;
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}
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#endif
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void QC_resync() {
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#ifdef POW_QC
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@@ -22,6 +22,4 @@
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#endif
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#endif /* BSP_MINIWARE_SOFTWARE_I2C_H_ */
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@@ -33,8 +33,8 @@ uint8_t flash_save_buffer(const uint8_t *buffer, const uint16_t length) {
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HAL_FLASH_Unlock();
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for (uint8_t i = 0; i < (length / 2); i++) {
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resetWatchdog();
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HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, (uint32_t)&settings_page[i],
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data[i]);
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HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD,
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(uint32_t) &settings_page[i], data[i]);
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}
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HAL_FLASH_Lock();
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return 1;
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@@ -15,8 +15,7 @@ static uint8_t logo_page[1024] __attribute__ ((section (".logo_page")));
|
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uint8_t showBootLogoIfavailable() {
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// Do not show logo data if signature is not found.
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if (LOGO_HEADER_VALUE
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!= *(reinterpret_cast<const uint32_t*>(logo_page))) {
|
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if (LOGO_HEADER_VALUE != *(reinterpret_cast<const uint32_t*>(logo_page))) {
|
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return 0;
|
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}
|
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|
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|
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@@ -163,7 +163,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
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#if( configASSERT_DEFINED == 1 )
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static uint8_t ucMaxSysCallPriority = 0;
|
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static uint32_t ulMaxPRIGROUPValue = 0;
|
||||
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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static const volatile uint8_t *const pcInterruptPriorityRegisters =
|
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(const volatile uint8_t* const ) portNVIC_IP_REGISTERS_OFFSET_16;
|
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#endif /* configASSERT_DEFINED */
|
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|
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/*-----------------------------------------------------------*/
|
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@@ -171,8 +172,8 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
|
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/*
|
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* See header file for description.
|
||||
*/
|
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
{
|
||||
StackType_t* pxPortInitialiseStack(StackType_t *pxTopOfStack,
|
||||
TaskFunction_t pxCode, void *pvParameters) {
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
interrupt. */
|
||||
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
|
||||
@@ -189,8 +190,7 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvTaskExitError( void )
|
||||
{
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||||
static void prvTaskExitError(void) {
|
||||
volatile uint32_t ulDummy = 0UL;
|
||||
|
||||
/* A function that implements a task must not exit or attempt to return to
|
||||
@@ -201,8 +201,7 @@ volatile uint32_t ulDummy = 0UL;
|
||||
defined, then stop here so application writers can catch the error. */
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||||
configASSERT(uxCriticalNesting == ~0UL);
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portDISABLE_INTERRUPTS();
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||||
while( ulDummy == 0 )
|
||||
{
|
||||
while (ulDummy == 0) {
|
||||
/* This file calls prvTaskExitError() after the scheduler has been
|
||||
started to remove a compiler warning about the function being defined
|
||||
but never called. ulDummy is used purely to quieten other warnings
|
||||
@@ -214,8 +213,7 @@ volatile uint32_t ulDummy = 0UL;
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}
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/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortSVCHandler( void )
|
||||
{
|
||||
void vPortSVCHandler(void) {
|
||||
__asm volatile (
|
||||
" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
|
||||
" ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
|
||||
@@ -234,8 +232,7 @@ void vPortSVCHandler( void )
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvPortStartFirstTask( void )
|
||||
{
|
||||
static void prvPortStartFirstTask(void) {
|
||||
__asm volatile(
|
||||
" ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
|
||||
" ldr r0, [r0] \n"
|
||||
@@ -254,8 +251,7 @@ static void prvPortStartFirstTask( void )
|
||||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
BaseType_t xPortStartScheduler(void) {
|
||||
/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
|
||||
configASSERT(configMAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
@@ -263,7 +259,9 @@ BaseType_t xPortStartScheduler( void )
|
||||
#if( configASSERT_DEFINED == 1 )
|
||||
{
|
||||
volatile uint32_t ulOriginalPriority;
|
||||
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
|
||||
volatile uint8_t *const pucFirstUserPriorityRegister =
|
||||
(volatile uint8_t* const ) ( portNVIC_IP_REGISTERS_OFFSET_16
|
||||
+ portFIRST_USER_INTERRUPT_NUMBER);
|
||||
volatile uint8_t ucMaxPriorityValue;
|
||||
|
||||
/* Determine the maximum priority from which ISR safe FreeRTOS API
|
||||
@@ -282,13 +280,13 @@ BaseType_t xPortStartScheduler( void )
|
||||
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
|
||||
|
||||
/* Use the same mask on the maximum system call priority. */
|
||||
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
|
||||
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
& ucMaxPriorityValue;
|
||||
|
||||
/* Calculate the maximum acceptable priority group value for the number
|
||||
of bits read back. */
|
||||
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
|
||||
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
|
||||
{
|
||||
while ((ucMaxPriorityValue & portTOP_BIT_OF_BYTE) == portTOP_BIT_OF_BYTE) {
|
||||
ulMaxPRIGROUPValue--;
|
||||
ucMaxPriorityValue <<= (uint8_t) 0x01;
|
||||
}
|
||||
@@ -350,16 +348,14 @@ BaseType_t xPortStartScheduler( void )
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
void vPortEndScheduler(void) {
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
Artificially force an assert. */
|
||||
configASSERT(uxCriticalNesting == 1000UL);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
void vPortEnterCritical(void) {
|
||||
portDISABLE_INTERRUPTS();
|
||||
uxCriticalNesting++;
|
||||
|
||||
@@ -368,26 +364,22 @@ void vPortEnterCritical( void )
|
||||
functions that end in "FromISR" can be used in an interrupt. Only assert if
|
||||
the critical nesting count is 1 to protect against recursive calls if the
|
||||
assert function also uses a critical section. */
|
||||
if( uxCriticalNesting == 1 )
|
||||
{
|
||||
if (uxCriticalNesting == 1) {
|
||||
configASSERT(( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK) == 0);
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
void vPortExitCritical(void) {
|
||||
configASSERT(uxCriticalNesting);
|
||||
uxCriticalNesting--;
|
||||
if( uxCriticalNesting == 0 )
|
||||
{
|
||||
if (uxCriticalNesting == 0) {
|
||||
portENABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void xPortPendSVHandler( void )
|
||||
{
|
||||
void xPortPendSVHandler(void) {
|
||||
/* This is a naked function. */
|
||||
|
||||
__asm volatile
|
||||
@@ -423,8 +415,7 @@ void xPortPendSVHandler( void )
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void xPortSysTickHandler( void )
|
||||
{
|
||||
void xPortSysTickHandler(void) {
|
||||
/* The SysTick runs at the lowest interrupt priority, so when this interrupt
|
||||
executes all interrupts must be unmasked. There is therefore no need to
|
||||
save and then restore the interrupt mask value as its value is already
|
||||
@@ -432,8 +423,7 @@ void xPortSysTickHandler( void )
|
||||
portDISABLE_INTERRUPTS();
|
||||
{
|
||||
/* Increment the RTOS tick. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
if (xTaskIncrementTick() != pdFALSE) {
|
||||
/* A context switch is required. Context switching is performed in
|
||||
the PendSV interrupt. Pend the PendSV interrupt. */
|
||||
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
||||
@@ -614,8 +604,7 @@ void xPortSysTickHandler( void )
|
||||
* Setup the systick timer to generate the tick interrupts at the required
|
||||
* frequency.
|
||||
*/
|
||||
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
||||
{
|
||||
__attribute__(( weak )) void vPortSetupTimerInterrupt(void) {
|
||||
/* Calculate the constants required to configure the tick interrupt. */
|
||||
#if( configUSE_TICKLESS_IDLE == 1 )
|
||||
{
|
||||
@@ -630,15 +619,16 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
||||
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate. */
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
|
||||
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ)
|
||||
- 1UL;
|
||||
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT
|
||||
| portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if( configASSERT_DEFINED == 1 )
|
||||
|
||||
void vPortValidateInterruptPriority( void )
|
||||
{
|
||||
void vPortValidateInterruptPriority(void) {
|
||||
uint32_t ulCurrentInterrupt;
|
||||
uint8_t ucCurrentPriority;
|
||||
|
||||
@@ -646,8 +636,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
||||
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
|
||||
|
||||
/* Is the interrupt number a user defined interrupt? */
|
||||
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
|
||||
{
|
||||
if (ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER) {
|
||||
/* Look up the interrupt's priority. */
|
||||
ucCurrentPriority = pcInterruptPriorityRegisters[ulCurrentInterrupt];
|
||||
|
||||
@@ -690,28 +679,9 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void )
|
||||
scheduler. Note however that some vendor specific peripheral libraries
|
||||
assume a non-zero priority group setting, in which cases using a value
|
||||
of zero will result in unpredictable behaviour. */
|
||||
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
|
||||
configASSERT(
|
||||
( portAIRCR_REG & portPRIORITY_GROUP_MASK) <= ulMaxPRIGROUPValue);
|
||||
}
|
||||
|
||||
#endif /* configASSERT_DEFINED */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -25,7 +25,6 @@
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
@@ -127,8 +126,8 @@ not necessary for to use this port. They are defined so the common demo files
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Generic helper function. */
|
||||
__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
|
||||
{
|
||||
__attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros(
|
||||
uint32_t ulBitmap) {
|
||||
uint8_t ucReturn;
|
||||
|
||||
__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
|
||||
@@ -168,20 +167,16 @@ not necessary for to use this port. They are defined so the common demo files
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
|
||||
{
|
||||
portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt(void) {
|
||||
uint32_t ulCurrentInterrupt;
|
||||
BaseType_t xReturn;
|
||||
|
||||
/* Obtain the number of the currently executing interrupt. */
|
||||
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
|
||||
|
||||
if( ulCurrentInterrupt == 0 )
|
||||
{
|
||||
if (ulCurrentInterrupt == 0) {
|
||||
xReturn = pdFALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
xReturn = pdTRUE;
|
||||
}
|
||||
|
||||
@@ -190,33 +185,31 @@ BaseType_t xReturn;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portFORCE_INLINE static void vPortRaiseBASEPRI( void )
|
||||
{
|
||||
portFORCE_INLINE static void vPortRaiseBASEPRI(void) {
|
||||
uint32_t ulNewBASEPRI;
|
||||
|
||||
__asm volatile
|
||||
(
|
||||
" mov %0, %1 \n" \
|
||||
" msr basepri, %0 \n" \
|
||||
" isb \n" \
|
||||
" dsb \n" \
|
||||
" mov %0, %1 \n"
|
||||
" msr basepri, %0 \n"
|
||||
" isb \n"
|
||||
" dsb \n"
|
||||
:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
|
||||
);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
|
||||
{
|
||||
portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI(void) {
|
||||
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
|
||||
|
||||
__asm volatile
|
||||
(
|
||||
" mrs %0, basepri \n" \
|
||||
" mov %1, %2 \n" \
|
||||
" msr basepri, %1 \n" \
|
||||
" isb \n" \
|
||||
" dsb \n" \
|
||||
" mrs %0, basepri \n"
|
||||
" mov %1, %2 \n"
|
||||
" msr basepri, %1 \n"
|
||||
" isb \n"
|
||||
" dsb \n"
|
||||
:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
|
||||
);
|
||||
|
||||
@@ -226,8 +219,7 @@ uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
|
||||
{
|
||||
portFORCE_INLINE static void vPortSetBASEPRI(uint32_t ulNewMaskValue) {
|
||||
__asm volatile
|
||||
(
|
||||
" msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"
|
||||
|
||||
@@ -26,7 +26,6 @@ void HAL_MspInit(void) {
|
||||
/* SysTick_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(SysTick_IRQn, 15, 0);
|
||||
|
||||
|
||||
}
|
||||
|
||||
void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc) {
|
||||
|
||||
@@ -75,8 +75,7 @@ uint32_t uwIncrementState = 0;
|
||||
* @param TickPriority: Tick interrupt priorty.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
{
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
|
||||
RCC_ClkInitTypeDef clkconfig;
|
||||
uint32_t uwTimclock = 0;
|
||||
uint32_t uwPrescalerValue = 0;
|
||||
@@ -113,8 +112,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
htim1.Init.Prescaler = uwPrescalerValue;
|
||||
htim1.Init.ClockDivision = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
if(HAL_TIM_Base_Init(&htim1) == HAL_OK)
|
||||
{
|
||||
if (HAL_TIM_Base_Init(&htim1) == HAL_OK) {
|
||||
/* Start the TIM time Base generation in interrupt mode */
|
||||
return HAL_TIM_Base_Start_IT(&htim1);
|
||||
}
|
||||
@@ -129,8 +127,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SuspendTick(void)
|
||||
{
|
||||
void HAL_SuspendTick(void) {
|
||||
/* Disable TIM1 update Interrupt */
|
||||
__HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
@@ -141,8 +138,7 @@ void HAL_SuspendTick(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ResumeTick(void)
|
||||
{
|
||||
void HAL_ResumeTick(void) {
|
||||
/* Enable TIM1 Update interrupt */
|
||||
__HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE);
|
||||
}
|
||||
|
||||
@@ -27,10 +27,10 @@
|
||||
uint32_t SystemCoreClock = 64000000U; /*!< System Clock Frequency (Core Clock) */
|
||||
#endif
|
||||
|
||||
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t AHBPrescTable[16U] = { 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7,
|
||||
8, 9 };
|
||||
const uint8_t APBPrescTable[8U] = { 0, 0, 0, 0, 1, 2, 3, 4 };
|
||||
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
@@ -39,8 +39,7 @@ const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
void SystemInit(void) {
|
||||
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= 0x00000001U;
|
||||
@@ -129,8 +128,7 @@ void SystemInit (void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
void SystemCoreClockUpdate(void) {
|
||||
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
|
||||
|
||||
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||
@@ -144,8 +142,7 @@ void SystemCoreClockUpdate (void)
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
switch (tmp) {
|
||||
case 0x00U: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
@@ -161,25 +158,19 @@ void SystemCoreClockUpdate (void)
|
||||
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||
pllmull = (pllmull >> 18U) + 2U;
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
if (pllsource == 0x00U) {
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
#else
|
||||
/* HSE selected as PLL clock entry */
|
||||
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
|
||||
{/* HSE oscillator clock divided by 2 */
|
||||
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t) RESET) {/* HSE oscillator clock divided by 2 */
|
||||
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
SystemCoreClock = HSE_VALUE * pllmull;
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user