From 76099406efa42a8cf1f455037e8c04bf4440cad1 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 15 Jun 2020 14:32:54 +0300 Subject: [PATCH 1/5] Update FreeRTOS port-specific files to V10.3.1 This updates Cortex-M3 port files to version found in V10.3.1-kernel-only tag of FreeRTOS-Kernel. The new upstream release includes memory barriers which are essential for use with modern optimising compilers. Without those firmware certainly breaks with -O3 -flto and might be also broken with other optimisation configurations. Fixes: d59ec10c4ef5 ("Update FreeRTOS to v10.3.1") --- .../Source/portable/GCC/ARM_CM3/port.c | 239 +++++++++--------- .../Source/portable/GCC/ARM_CM3/portmacro.h | 111 +++----- 2 files changed, 159 insertions(+), 191 deletions(-) diff --git a/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c b/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c index bb8336f7..53592606 100644 --- a/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c +++ b/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/port.c @@ -1,71 +1,29 @@ /* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ + * FreeRTOS Kernel V10.3.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ /*----------------------------------------------------------- * Implementation of functions defined in portable.h for the ARM CM3 port. @@ -144,10 +102,6 @@ debugger. */ #define portTASK_RETURN_ADDRESS prvTaskExitError #endif -/* Each task maintains its own interrupt status in the critical nesting -variable. */ -static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; - /* * Setup the timer to generate the tick interrupts. The implementation in this * file is weak to allow application writers to change the timer used to @@ -174,10 +128,14 @@ static void prvTaskExitError( void ); /*-----------------------------------------------------------*/ +/* Each task maintains its own interrupt status in the critical nesting +variable. */ +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + /* * The number of SysTick increments that make up one tick period. */ -#if configUSE_TICKLESS_IDLE == 1 +#if( configUSE_TICKLESS_IDLE == 1 ) static uint32_t ulTimerCountsForOneTick = 0; #endif /* configUSE_TICKLESS_IDLE */ @@ -185,7 +143,7 @@ static void prvTaskExitError( void ); * The maximum number of tick periods that can be suppressed is limited by the * 24 bit resolution of the SysTick timer. */ -#if configUSE_TICKLESS_IDLE == 1 +#if( configUSE_TICKLESS_IDLE == 1 ) static uint32_t xMaximumPossibleSuppressedTicks = 0; #endif /* configUSE_TICKLESS_IDLE */ @@ -193,7 +151,7 @@ static void prvTaskExitError( void ); * Compensate for the CPU cycles that pass while the SysTick is stopped (low * power functionality only. */ -#if configUSE_TICKLESS_IDLE == 1 +#if( configUSE_TICKLESS_IDLE == 1 ) static uint32_t ulStoppedTimerCompensation = 0; #endif /* configUSE_TICKLESS_IDLE */ @@ -202,7 +160,7 @@ static void prvTaskExitError( void ); * FreeRTOS API functions are not called from interrupts that have been assigned * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. */ -#if ( configASSERT_DEFINED == 1 ) +#if( configASSERT_DEFINED == 1 ) static uint8_t ucMaxSysCallPriority = 0; static uint32_t ulMaxPRIGROUPValue = 0; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( const volatile uint8_t * const ) portNVIC_IP_REGISTERS_OFFSET_16; @@ -233,6 +191,8 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px static void prvTaskExitError( void ) { +volatile uint32_t ulDummy = 0UL; + /* A function that implements a task must not exit or attempt to return to its caller as there is nothing to return to. If a task wants to exit it should instead call vTaskDelete( NULL ). @@ -241,7 +201,16 @@ static void prvTaskExitError( void ) defined, then stop here so application writers can catch the error. */ configASSERT( uxCriticalNesting == ~0UL ); portDISABLE_INTERRUPTS(); - for( ;; ); + while( ulDummy == 0 ) + { + /* This file calls prvTaskExitError() after the scheduler has been + started to remove a compiler warning about the function being defined + but never called. ulDummy is used purely to quieten other warnings + about code appearing after this function is called - making ulDummy + volatile makes the compiler think the function could return and + therefore not output an 'unreachable code' warning for code that appears + after it. */ + } } /*-----------------------------------------------------------*/ @@ -324,6 +293,24 @@ BaseType_t xPortStartScheduler( void ) ucMaxPriorityValue <<= ( uint8_t ) 0x01; } + #ifdef __NVIC_PRIO_BITS + { + /* Check the CMSIS configuration that defines the number of + priority bits matches the number of priority bits actually queried + from the hardware. */ + configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS ); + } + #endif + + #ifdef configPRIO_BITS + { + /* Check the FreeRTOS configuration that defines the number of + priority bits matches the number of priority bits actually queried + from the hardware. */ + configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS ); + } + #endif + /* Shift the priority group value back to its position within the AIRCR register. */ ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; @@ -352,7 +339,10 @@ BaseType_t xPortStartScheduler( void ) /* Should never get here as the tasks will now be executing! Call the task exit error function to prevent compiler warnings about a static function not being called in the case that the application writer overrides this - functionality by defining configTASK_RETURN_ADDRESS. */ + functionality by defining configTASK_RETURN_ADDRESS. Call + vTaskSwitchContext() so link time optimisation does not remove the + symbol. */ + vTaskSwitchContext(); prvTaskExitError(); /* Should not get here! */ @@ -418,7 +408,7 @@ void xPortPendSVHandler( void ) " mov r0, #0 \n" " msr basepri, r0 \n" " ldmia sp!, {r3, r14} \n" - " \n" /* Restore the context, including the critical nesting count. */ + " \n" /* Restore the context, including the critical nesting count. */ " ldr r1, [r3] \n" " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */ " ldmia r0!, {r4-r11} \n" /* Pop the registers. */ @@ -453,11 +443,11 @@ void xPortSysTickHandler( void ) } /*-----------------------------------------------------------*/ -#if configUSE_TICKLESS_IDLE == 1 +#if( configUSE_TICKLESS_IDLE == 1 ) __attribute__((weak)) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) { - uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL; + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; TickType_t xModifiableIdleTime; /* Make sure the SysTick reload value does not overflow the counter. */ @@ -483,7 +473,7 @@ void xPortSysTickHandler( void ) /* Enter a critical section but don't use the taskENTER_CRITICAL() method as that will mask interrupts that should exit sleep mode. */ - __asm volatile( "cpsid i" ); + __asm volatile( "cpsid i" ::: "memory" ); __asm volatile( "dsb" ); __asm volatile( "isb" ); @@ -504,7 +494,7 @@ void xPortSysTickHandler( void ) /* Re-enable interrupts - see comments above the cpsid instruction() above. */ - __asm volatile( "cpsie i" ); + __asm volatile( "cpsie i" ::: "memory" ); } else { @@ -524,32 +514,50 @@ void xPortSysTickHandler( void ) should not be executed again. However, the original expected idle time variable must remain unmodified, so a copy is taken. */ xModifiableIdleTime = xExpectedIdleTime; - configPRE_SLEEP_PROCESSING( &xModifiableIdleTime ); + configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); if( xModifiableIdleTime > 0 ) { - __asm volatile( "dsb" ); + __asm volatile( "dsb" ::: "memory" ); __asm volatile( "wfi" ); __asm volatile( "isb" ); } - configPOST_SLEEP_PROCESSING( &xExpectedIdleTime ); + configPOST_SLEEP_PROCESSING( xExpectedIdleTime ); - /* Stop SysTick. Again, the time the SysTick is stopped for is - accounted for as best it can be, but using the tickless mode will - inevitably result in some tiny drift of the time maintained by the - kernel with respect to calendar time. */ - ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG; - portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT ); + /* Re-enable interrupts to allow the interrupt that brought the MCU + out of sleep mode to execute immediately. see comments above + __disable_interrupt() call above. */ + __asm volatile( "cpsie i" ::: "memory" ); + __asm volatile( "dsb" ); + __asm volatile( "isb" ); - /* Re-enable interrupts - see comments above the cpsid instruction() - above. */ - __asm volatile( "cpsie i" ); + /* Disable interrupts again because the clock is about to be stopped + and interrupts that execute while the clock is stopped will increase + any slippage between the time maintained by the RTOS and calendar + time. */ + __asm volatile( "cpsid i" ::: "memory" ); + __asm volatile( "dsb" ); + __asm volatile( "isb" ); - if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) + /* Disable the SysTick clock without reading the + portNVIC_SYSTICK_CTRL_REG register to ensure the + portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again, + the time the SysTick is stopped for is accounted for as best it can + be, but using the tickless mode will inevitably result in some tiny + drift of the time maintained by the kernel with respect to calendar + time*/ + portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT ); + + /* Determine if the SysTick clock has already counted to zero and + been set back to the current reload value (the reload back being + correct for the entire expected idle time) or if the SysTick is yet + to count to zero (in which case an interrupt other than the SysTick + must have brought the system out of sleep mode). */ + if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) { uint32_t ulCalculatedLoadValue; - /* The tick interrupt has already executed, and the SysTick - count reloaded with ulReloadValue. Reset the + /* The tick interrupt is already pending, and the SysTick count + reloaded with ulReloadValue. Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick period. */ ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); @@ -564,11 +572,9 @@ void xPortSysTickHandler( void ) portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue; - /* The tick interrupt handler will already have pended the tick - processing in the kernel. As the pending tick will be - processed as soon as this function exits, the tick value - maintained by the tick is stepped forward by one less than the - time spent waiting. */ + /* As the pending tick will be processed as soon as this + function exits, the tick value maintained by the tick is stepped + forward by one less than the time spent waiting. */ ulCompleteTickPeriods = xExpectedIdleTime - 1UL; } else @@ -590,21 +596,18 @@ void xPortSysTickHandler( void ) /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG again, then set portNVIC_SYSTICK_LOAD_REG back to its standard - value. The critical section is used to ensure the tick interrupt - can only execute once in the case that the reload register is near - zero. */ + value. */ portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; - portENTER_CRITICAL(); - { - portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; - vTaskStepTick( ulCompleteTickPeriods ); - portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; - } - portEXIT_CRITICAL(); + portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; + vTaskStepTick( ulCompleteTickPeriods ); + portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; + + /* Exit with interrupts enabled. */ + __asm volatile( "cpsie i" ::: "memory" ); } } -#endif /* #if configUSE_TICKLESS_IDLE */ +#endif /* configUSE_TICKLESS_IDLE */ /*-----------------------------------------------------------*/ /* @@ -614,7 +617,7 @@ void xPortSysTickHandler( void ) __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) { /* Calculate the constants required to configure the tick interrupt. */ - #if configUSE_TICKLESS_IDLE == 1 + #if( configUSE_TICKLESS_IDLE == 1 ) { ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; @@ -622,6 +625,10 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) } #endif /* configUSE_TICKLESS_IDLE */ + /* Stop and clear the SysTick. */ + portNVIC_SYSTICK_CTRL_REG = 0UL; + portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; + /* Configure SysTick to interrupt at the requested rate. */ portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); @@ -636,7 +643,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ - __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) ); + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); /* Is the interrupt number a user defined interrupt? */ if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) @@ -682,7 +689,7 @@ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the scheduler. Note however that some vendor specific peripheral libraries assume a non-zero priority group setting, in which cases using a value - of zero will result in unpredicable behaviour. */ + of zero will result in unpredictable behaviour. */ configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue ); } diff --git a/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h b/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h index b72042d4..29bccbb2 100644 --- a/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h +++ b/workspace/TS100/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM3/portmacro.h @@ -1,71 +1,29 @@ /* - FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd. - All rights reserved - - VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. - - *************************************************************************** - >>! NOTE: The modification to the GPL is included to allow you to !<< - >>! distribute a combined work that includes FreeRTOS without being !<< - >>! obliged to provide the source code for proprietary components !<< - >>! outside of the FreeRTOS kernel. !<< - *************************************************************************** - - FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY - WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. Full license text is available on the following - link: http://www.freertos.org/a00114.html - - *************************************************************************** - * * - * FreeRTOS provides completely free yet professionally developed, * - * robust, strictly quality controlled, supported, and cross * - * platform software that is more than just the market leader, it * - * is the industry's de facto standard. * - * * - * Help yourself get started quickly while simultaneously helping * - * to support the FreeRTOS project by purchasing a FreeRTOS * - * tutorial book, reference manual, or both: * - * http://www.FreeRTOS.org/Documentation * - * * - *************************************************************************** - - http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading - the FAQ page "My application does not run, what could be wrong?". Have you - defined configASSERT()? - - http://www.FreeRTOS.org/support - In return for receiving this top quality - embedded software for free we request you assist our global community by - participating in the support forum. - - http://www.FreeRTOS.org/training - Investing in training allows your team to - be as productive as possible as early as possible. Now you can receive - FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers - Ltd, and the world's leading authority on the world's leading RTOS. - - http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, a DOS - compatible FAT file system, and our tiny thread aware UDP/IP stack. - - http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. - Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. - - http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High - Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS - licenses offer ticketed support, indemnification and commercial middleware. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and - mission critical applications that require provable dependability. - - 1 tab == 4 spaces! -*/ + * FreeRTOS Kernel V10.3.1 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ #ifndef PORTMACRO_H @@ -125,7 +83,7 @@ typedef unsigned long UBaseType_t; \ /* Barriers are normally not required but do ensure the code is completely \ within the specified behaviour for the architecture. */ \ - __asm volatile( "dsb" ); \ + __asm volatile( "dsb" ::: "memory" ); \ __asm volatile( "isb" ); \ } @@ -173,7 +131,7 @@ not necessary for to use this port. They are defined so the common demo files { uint8_t ucReturn; - __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) ); + __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" ); return ucReturn; } @@ -208,13 +166,15 @@ not necessary for to use this port. They are defined so the common demo files #define portFORCE_INLINE inline __attribute__(( always_inline)) #endif +/*-----------------------------------------------------------*/ + portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void ) { uint32_t ulCurrentInterrupt; BaseType_t xReturn; /* Obtain the number of the currently executing interrupt. */ - __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) ); + __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); if( ulCurrentInterrupt == 0 ) { @@ -236,11 +196,11 @@ uint32_t ulNewBASEPRI; __asm volatile ( - " mov %0, %1 \n" \ + " mov %0, %1 \n" \ " msr basepri, %0 \n" \ " isb \n" \ " dsb \n" \ - :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } @@ -253,11 +213,11 @@ uint32_t ulOriginalBASEPRI, ulNewBASEPRI; __asm volatile ( " mrs %0, basepri \n" \ - " mov %1, %2 \n" \ + " mov %1, %2 \n" \ " msr basepri, %1 \n" \ " isb \n" \ " dsb \n" \ - :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) + :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); /* This return will not be reached but is necessary to prevent compiler @@ -270,11 +230,12 @@ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) { __asm volatile ( - " msr basepri, %0 " :: "r" ( ulNewMaskValue ) + " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory" ); } /*-----------------------------------------------------------*/ +#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #ifdef __cplusplus } From 780f1f35ca47f2ba6b92e2fdd078ef0b81d550d9 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 15 Jun 2020 14:48:51 +0300 Subject: [PATCH 2/5] Make flash and bootloader sizes configurable This patch makes allocating special pages automatic and flexible, allowing flash size and application start offset specification with linker command line arguments. It should allow easier porting to different targets and experimentation without adding code complexity. Many original STM32F103x8 chips have fully functional 128 kiB flash and so this additional space might come useful for experimentation, additional optional features etc. Tested on v2.51A board, including writing and verifying 128 kiB of random data. Make variables are added to control that, so to build for the full undocumented flash size and dapboot configured to start the app from 8 kiB offset one can run: make flash_size=128k bootldr_size=0x2000 --- workspace/TS100/Core/BSP/Miniware/flash.c | 15 ++++----- workspace/TS100/Core/BSP/Miniware/logo.cpp | 8 ++--- .../Core/BSP/Miniware/system_stm32f1xx.c | 11 +++---- workspace/TS100/Core/Src/Settings.cpp | 4 +-- workspace/TS100/LinkerScript.ld | 31 ++++++++++++------- workspace/TS100/Makefile | 6 +++- 6 files changed, 40 insertions(+), 35 deletions(-) diff --git a/workspace/TS100/Core/BSP/Miniware/flash.c b/workspace/TS100/Core/BSP/Miniware/flash.c index 26432da8..05f2b3d0 100644 --- a/workspace/TS100/Core/BSP/Miniware/flash.c +++ b/workspace/TS100/Core/BSP/Miniware/flash.c @@ -9,15 +9,15 @@ #include "BSP.h" #include "string.h" #include "stm32f1xx_hal.h" -/*Flash start OR'ed with the maximum amount of flash - 1024 bytes*/ -/*We use the last 1024 byte page*/ -#define FLASH_ADDR (0x8000000 |0xFC00) + +static uint16_t settings_page[512] __attribute__ ((section (".settings_page"))); + uint8_t flash_save_buffer(const uint8_t *buffer, const uint16_t length) { FLASH_EraseInitTypeDef pEraseInit; pEraseInit.TypeErase = FLASH_TYPEERASE_PAGES; pEraseInit.Banks = FLASH_BANK_1; pEraseInit.NbPages = 1; - pEraseInit.PageAddress = FLASH_ADDR; + pEraseInit.PageAddress = (uint32_t)settings_page; uint32_t failingAddress = 0; resetWatchdog(); __HAL_FLASH_CLEAR_FLAG( @@ -33,7 +33,7 @@ uint8_t flash_save_buffer(const uint8_t *buffer, const uint16_t length) { HAL_FLASH_Unlock(); for (uint8_t i = 0; i < (length / 2); i++) { resetWatchdog(); - HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, FLASH_ADDR + (i * 2), + HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, (uint32_t)&settings_page[i], data[i]); } HAL_FLASH_Lock(); @@ -42,8 +42,5 @@ uint8_t flash_save_buffer(const uint8_t *buffer, const uint16_t length) { void flash_read_buffer(uint8_t *buffer, const uint16_t length) { - uint16_t *data = (uint16_t*) buffer; - for (uint8_t i = 0; i < (length / 2); i++) { - data[i] = *((uint16_t*) (FLASH_ADDR + (i * 2))); - } + memcpy(buffer, settings_page, length); } diff --git a/workspace/TS100/Core/BSP/Miniware/logo.cpp b/workspace/TS100/Core/BSP/Miniware/logo.cpp index f71df93d..b0ad3cb4 100644 --- a/workspace/TS100/Core/BSP/Miniware/logo.cpp +++ b/workspace/TS100/Core/BSP/Miniware/logo.cpp @@ -7,8 +7,8 @@ #include "BSP.h" #include "OLED.hpp" -// Second last page of flash set aside for logo image. -#define FLASH_LOGOADDR (0x8000000 | 0xF800) + +static uint8_t logo_page[1024] __attribute__ ((section (".logo_page"))); // Logo header signature. #define LOGO_HEADER_VALUE 0xF00DAA55 @@ -16,11 +16,11 @@ uint8_t showBootLogoIfavailable() { // Do not show logo data if signature is not found. if (LOGO_HEADER_VALUE - != *(reinterpret_cast(FLASH_LOGOADDR))) { + != *(reinterpret_cast(logo_page))) { return 0; } - OLED::drawAreaSwapped(0, 0, 96, 16, (uint8_t*) (FLASH_LOGOADDR + 4)); + OLED::drawAreaSwapped(0, 0, 96, 16, (uint8_t*) (logo_page + 4)); OLED::refresh(); return 1; } diff --git a/workspace/TS100/Core/BSP/Miniware/system_stm32f1xx.c b/workspace/TS100/Core/BSP/Miniware/system_stm32f1xx.c index fabf4234..5c5c0297 100644 --- a/workspace/TS100/Core/BSP/Miniware/system_stm32f1xx.c +++ b/workspace/TS100/Core/BSP/Miniware/system_stm32f1xx.c @@ -11,16 +11,13 @@ #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) /* #define DATA_IN_ExtSRAM */ #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ -//#define LOCAL_BUILD -#ifndef LOCAL_BUILD + +#ifndef VECT_TAB_OFFSET #define VECT_TAB_OFFSET 0x00004000U /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ -#warning LOCAL_BUILD SETUP - #endif //We offset this by 0x4000 to because of the bootloader +#endif + /******************************************************************************* * Clock Definitions *******************************************************************************/ diff --git a/workspace/TS100/Core/Src/Settings.cpp b/workspace/TS100/Core/Src/Settings.cpp index 716d7c9c..3fe8a2ad 100644 --- a/workspace/TS100/Core/Src/Settings.cpp +++ b/workspace/TS100/Core/Src/Settings.cpp @@ -12,9 +12,7 @@ #include "Setup.h" #include "../../configuration.h" #include "BSP.h" -#define FLASH_ADDR \ - (0x8000000 | \ - 0xFC00) /*Flash start OR'ed with the maximum amount of flash - 1024 bytes*/ + #include "string.h" volatile systemSettingsType systemSettings; diff --git a/workspace/TS100/LinkerScript.ld b/workspace/TS100/LinkerScript.ld index 75be14f8..a3a5a942 100644 --- a/workspace/TS100/LinkerScript.ld +++ b/workspace/TS100/LinkerScript.ld @@ -9,17 +9,15 @@ _estack = 0x20005000; /* end of RAM */ _Min_Heap_Size = 0x300; /* required amount of heap */ _Min_Stack_Size = 1024; /* required amount of stack */ +__APP_BASE_ADDRESS__ = 0x08000000 + __BOOTLDR_SIZE__; +__ROM_REGION_LENGTH__ = __FLASH_SIZE__ - __BOOTLDR_SIZE__; +__FLASH_END_ADDR__ = __APP_BASE_ADDRESS__ + __ROM_REGION_LENGTH__; + /* Memories definition */ MEMORY { RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K - /* LOCAL_BUILD*/ -/*ROM (rx) : ORIGIN = 0x08000000, LENGTH = 48K*/ - /* production*/ - ROM (rx) : ORIGIN = 0x08004000, LENGTH = 46K - - - + ROM (rx) : ORIGIN = __APP_BASE_ADDRESS__, LENGTH = __ROM_REGION_LENGTH__ } /* ROM is normally 48K after the bootloader, however we allocate the last page for settings, and the second last one for display boot logo*/ @@ -118,11 +116,22 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> ROM - - /* Uninitialized data section into RAM memory */ - . = ALIGN(4); + .logo_page (NOLOAD) : + { + . = ABSOLUTE(__FLASH_END_ADDR__ - 2048); + KEEP (*(.logo_page*)) + } > ROM + + .settings_page (NOLOAD) : + { + . = ABSOLUTE(__FLASH_END_ADDR__ - 1024); + KEEP (*(.settings_page*)) + } > ROM + .bss : { + /* Uninitialized data section into RAM memory */ + . = ALIGN(4); /* This is used by the startup in order to initialize the .bss secion */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; @@ -157,4 +166,4 @@ SECTIONS } .ARM.attributes 0 : { *(.ARM.attributes) } -} \ No newline at end of file +} diff --git a/workspace/TS100/Makefile b/workspace/TS100/Makefile index ba6ba490..222aea12 100644 --- a/workspace/TS100/Makefile +++ b/workspace/TS100/Makefile @@ -49,9 +49,11 @@ OUTPUT_DIR=Objects # code optimisation ------------------------------------------------------------ OPTIM=-Os -flto -ffat-lto-objects -finline-small-functions -findirect-inlining -fdiagnostics-color -ffunction-sections -fdata-sections +flash_size=64k +bootldr_size=0x4000 # global defines --------------------------------------------------------------- -GLOBAL_DEFINES += -D STM32F103T8Ux -D STM32F1 -D STM32 -D USE_HAL_DRIVER -D STM32F103xB -D USE_RTOS_SYSTICK -D LANG_$(lang) -D LANG -D MODEL_$(model) +GLOBAL_DEFINES += -D STM32F103T8Ux -D STM32F1 -D STM32 -D USE_HAL_DRIVER -D STM32F103xB -D USE_RTOS_SYSTICK -D LANG_$(lang) -D LANG -D MODEL_$(model) -DVECT_TAB_OFFSET=$(bootldr_size)U # Enable debug code generation DEBUG=-g3 @@ -93,6 +95,8 @@ LINKER_FLAGS=-Wl,--gc-sections \ -mthumb \ -mfloat-abi=soft \ -lm -Os -flto -Wl,--undefined=vTaskSwitchContext \ + -Wl,--defsym=__FLASH_SIZE__=$(flash_size) \ + -Wl,--defsym=__BOOTLDR_SIZE__=$(bootldr_size) \ --specs=nano.specs # compiler flags --------------------------------------------------------------- From c1dd88ba532bdc87d73eb82cd926a5cfc7848787 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 15 Jun 2020 15:22:52 +0300 Subject: [PATCH 3/5] Allow SWD debugging when built with swd_enable=1 --- workspace/TS100/Core/BSP/Miniware/Setup.c | 24 +++++++++++++++++------ workspace/TS100/Makefile | 4 ++++ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/workspace/TS100/Core/BSP/Miniware/Setup.c b/workspace/TS100/Core/BSP/Miniware/Setup.c index 2d7f2c15..9f50feec 100644 --- a/workspace/TS100/Core/BSP/Miniware/Setup.c +++ b/workspace/TS100/Core/BSP/Miniware/Setup.c @@ -33,9 +33,13 @@ static void MX_ADC2_Init(void); void Setup_HAL() { SystemClock_Config(); - __HAL_AFIO_REMAP_SWJ_DISABLE() - ; -// __HAL_AFIO_REMAP_SWJ_NOJTAG(); + +#ifndef SWD_ENABLE + __HAL_AFIO_REMAP_SWJ_DISABLE(); +#else + __HAL_AFIO_REMAP_SWJ_NOJTAG(); +#endif + MX_GPIO_Init(); MX_DMA_Init(); MX_I2C1_Init(); @@ -244,7 +248,7 @@ static void MX_IWDG_Init(void) { hiwdg.Instance = IWDG; hiwdg.Init.Prescaler = IWDG_PRESCALER_256; hiwdg.Init.Reload = 100; -#ifndef LOCAL_BUILD +#ifndef SWD_ENABLE HAL_IWDG_Init(&hiwdg); #endif } @@ -425,8 +429,10 @@ static void MX_GPIO_Init(void) { HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); #ifdef MODEL_TS100 - /* Pull USB lines low to disable, pull down debug too*/ - GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_14 | GPIO_PIN_13; +#ifndef SWD_ENABLE + /* Pull USB and SWD lines low to prevent enumeration attempts and EMI affecting + * the debug core */ + GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); @@ -434,6 +440,12 @@ static void MX_GPIO_Init(void) { HAL_GPIO_WritePin(GPIOA, GPIO_PIN_12, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_13, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_14, GPIO_PIN_RESET); +#else + /* Make all lines affecting SWD floating to allow debugging */ + GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_14 | GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +#endif #else /* TS80 */ /* Leave USB lines open circuit*/ diff --git a/workspace/TS100/Makefile b/workspace/TS100/Makefile index 222aea12..1d4af101 100644 --- a/workspace/TS100/Makefile +++ b/workspace/TS100/Makefile @@ -55,6 +55,10 @@ bootldr_size=0x4000 # global defines --------------------------------------------------------------- GLOBAL_DEFINES += -D STM32F103T8Ux -D STM32F1 -D STM32 -D USE_HAL_DRIVER -D STM32F103xB -D USE_RTOS_SYSTICK -D LANG_$(lang) -D LANG -D MODEL_$(model) -DVECT_TAB_OFFSET=$(bootldr_size)U +ifdef swd_enable + GLOBAL_DEFINES += -DSWD_ENABLE +endif + # Enable debug code generation DEBUG=-g3 # Without debug code From 25aee6b661ea239cd9a0b7e92fefc4429e780cd6 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 15 Jun 2020 15:46:42 +0300 Subject: [PATCH 4/5] Move I2CSemaphore creation outside postRToSInit The code assumes that whenever scheduler is running I2CSemaphore is available. Initialising it in a task might lead to race conditions and is also not happening at all if the task is disabled (for debugging or due to lack of need for a particular usecase). The race condition can't happen with the current code though, as GUI task has lower priority than the MOV task, and they're the only tasks that currently use I2C. However, this might change in the future with the code refactoring or introduction of new features. --- workspace/TS100/Core/BSP/Miniware/postRTOS.cpp | 4 ++-- workspace/TS100/Core/Src/main.cpp | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/workspace/TS100/Core/BSP/Miniware/postRTOS.cpp b/workspace/TS100/Core/BSP/Miniware/postRTOS.cpp index fa55ab11..e8a78a1d 100644 --- a/workspace/TS100/Core/BSP/Miniware/postRTOS.cpp +++ b/workspace/TS100/Core/BSP/Miniware/postRTOS.cpp @@ -9,9 +9,9 @@ #include "task.h" #include "I2C_Wrapper.hpp" #include "fusbpd.h" + +// Initialisation to be performed with scheduler active void postRToSInit() { - // Any after RTos setup - FRToSI2C::FRToSInit(); #ifdef POW_PD //Spawn all of the USB-C processors fusb302_start_processing(); diff --git a/workspace/TS100/Core/Src/main.cpp b/workspace/TS100/Core/Src/main.cpp index 89d2bc45..ed4e7637 100644 --- a/workspace/TS100/Core/Src/main.cpp +++ b/workspace/TS100/Core/Src/main.cpp @@ -85,6 +85,9 @@ int main(void) { resetWatchdog(); + /* Init the IPC objects */ + FRToSI2C::FRToSInit(); + /* Start scheduler */ osKernelStart(); /* We should never get here as control is now taken by the scheduler */ From b331032f30a7686743824cc59ae36464ac4555a4 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Sat, 20 Jun 2020 20:19:18 +0300 Subject: [PATCH 5/5] Makefile: remove duplicated code generation options from LINKER_FLAGS LINKER_FLAGS already includes CPUFLAGS via CXXFLAGS (and that's the right way to have the correct options defined at a single place). --- workspace/TS100/Makefile | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/workspace/TS100/Makefile b/workspace/TS100/Makefile index 1d4af101..20c43f58 100644 --- a/workspace/TS100/Makefile +++ b/workspace/TS100/Makefile @@ -95,10 +95,7 @@ LINKER_FLAGS=-Wl,--gc-sections \ -Wl,--wrap=free \ -o$(OUT_HEXFILE).elf \ -Wl,-Map=$(OUT_HEXFILE).map \ - -mcpu=cortex-m3 \ - -mthumb \ - -mfloat-abi=soft \ - -lm -Os -flto -Wl,--undefined=vTaskSwitchContext \ + -lm -Wl,--undefined=vTaskSwitchContext \ -Wl,--defsym=__FLASH_SIZE__=$(flash_size) \ -Wl,--defsym=__BOOTLDR_SIZE__=$(bootldr_size) \ --specs=nano.specs